| a565d16c | 04-Aug-2020 |
anzhou <anzhou@nvidia.com> |
Tegra: common: fixup the bl31 code size to be copied at reset
If the CPU doesn't run from BL31_BASE, the firmware needs to be
copied from load address to BL31_BASE during cold boot. The size
should
Tegra: common: fixup the bl31 code size to be copied at reset
If the CPU doesn't run from BL31_BASE, the firmware needs to be
copied from load address to BL31_BASE during cold boot. The size
should be the actual size of the code, which is indicated by the
__RELA_END__ linker variable.
This patch updates the copy routine to use this variable as a
result.
Signed-off-by: anzhou <anzhou@nvidia.com>
Change-Id: Ie3a48dd54cda1dc152204903d609da3117a0ced9
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| 923c221b | 26-Jun-2020 |
anzhou <anzhou@nvidia.com> |
Tegra: fixup CNTPS_TVAL_EL1 delay timer reads
The delay_timer driver for Tegra uses the CNTPS_TVAL_EL1 secure, physical,
decrementing timer as the source. The current logic incorrectly marks this
as
Tegra: fixup CNTPS_TVAL_EL1 delay timer reads
The delay_timer driver for Tegra uses the CNTPS_TVAL_EL1 secure, physical,
decrementing timer as the source. The current logic incorrectly marks this
as an incrementing timer, by negating the timer value.
This patch fixes the anomaly and updates the driver to remove this logic.
Signed-off-by: anzhou <anzhou@nvidia.com>
Change-Id: I60490bdcaf0b66bf4553a6de3f4e4e32109017f4
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| e9b9c2c8 | 04-Dec-2019 |
Anthony Zhou <anzhou@nvidia.com> |
Tegra: sip: add VPR resize enabled check
The Memory Controller provides a control register to check
if the video memory can be resized. The previous bootloader
might have locked this feature, which
Tegra: sip: add VPR resize enabled check
The Memory Controller provides a control register to check
if the video memory can be resized. The previous bootloader
might have locked this feature, which will be reflected by
this register.
This patch reads the control register before processing
a video memory resize request. An error code, -ENOTSUP,
is returned if the feature is locked.
Change-Id: Ia1d67f7a94aa15c6b18ff5c9b9b952e179596ae3
Signed-off-by: Anthony Zhou <anzhou@nvidia.com>
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