1 /* 2 * Copyright (c) 2013-2021, ARM Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #include <assert.h> 8 #include <string.h> 9 10 #include <arch.h> 11 #include <arch_features.h> 12 #include <arch_helpers.h> 13 #include <bl31/bl31.h> 14 #include <bl31/ehf.h> 15 #include <common/bl_common.h> 16 #include <common/debug.h> 17 #include <common/runtime_svc.h> 18 #include <drivers/console.h> 19 #include <lib/el3_runtime/context_mgmt.h> 20 #include <lib/pmf/pmf.h> 21 #include <lib/runtime_instr.h> 22 #include <plat/common/platform.h> 23 #include <services/std_svc.h> 24 25 #if ENABLE_RUNTIME_INSTRUMENTATION 26 PMF_REGISTER_SERVICE_SMC(rt_instr_svc, PMF_RT_INSTR_SVC_ID, 27 RT_INSTR_TOTAL_IDS, PMF_STORE_ENABLE) 28 #endif 29 30 /******************************************************************************* 31 * This function pointer is used to initialise the BL32 image. It's initialized 32 * by SPD calling bl31_register_bl32_init after setting up all things necessary 33 * for SP execution. In cases where both SPD and SP are absent, or when SPD 34 * finds it impossible to execute SP, this pointer is left as NULL 35 ******************************************************************************/ 36 static int32_t (*bl32_init)(void); 37 38 /***************************************************************************** 39 * Function used to initialise RMM if RME is enabled 40 *****************************************************************************/ 41 #if ENABLE_RME 42 static int32_t (*rmm_init)(void); 43 #endif 44 45 /******************************************************************************* 46 * Variable to indicate whether next image to execute after BL31 is BL33 47 * (non-secure & default) or BL32 (secure). 48 ******************************************************************************/ 49 static uint32_t next_image_type = NON_SECURE; 50 51 #ifdef SUPPORT_UNKNOWN_MPID 52 /* 53 * Flag to know whether an unsupported MPID has been detected. To avoid having it 54 * landing on the .bss section, it is initialized to a non-zero value, this way 55 * we avoid potential WAW hazards during system bring up. 56 * */ 57 volatile uint32_t unsupported_mpid_flag = 1; 58 #endif 59 60 /* 61 * Implement the ARM Standard Service function to get arguments for a 62 * particular service. 63 */ 64 uintptr_t get_arm_std_svc_args(unsigned int svc_mask) 65 { 66 /* Setup the arguments for PSCI Library */ 67 DEFINE_STATIC_PSCI_LIB_ARGS_V1(psci_args, bl31_warm_entrypoint); 68 69 /* PSCI is the only ARM Standard Service implemented */ 70 assert(svc_mask == PSCI_FID_MASK); 71 72 return (uintptr_t)&psci_args; 73 } 74 75 /******************************************************************************* 76 * Simple function to initialise all BL31 helper libraries. 77 ******************************************************************************/ 78 void __init bl31_lib_init(void) 79 { 80 cm_init(); 81 } 82 83 /******************************************************************************* 84 * Setup function for BL31. 85 ******************************************************************************/ 86 void bl31_setup(u_register_t arg0, u_register_t arg1, u_register_t arg2, 87 u_register_t arg3) 88 { 89 /* Perform early platform-specific setup */ 90 bl31_early_platform_setup2(arg0, arg1, arg2, arg3); 91 92 /* Perform late platform-specific setup */ 93 bl31_plat_arch_setup(); 94 95 #if ENABLE_FEAT_HCX 96 /* 97 * Assert that FEAT_HCX is supported on this system, without this check 98 * an exception would occur during context save/restore if enabled but 99 * not supported. 100 */ 101 assert(is_feat_hcx_present()); 102 #endif /* ENABLE_FEAT_HCX */ 103 104 #if CTX_INCLUDE_PAUTH_REGS 105 /* 106 * Assert that the ARMv8.3-PAuth registers are present or an access 107 * fault will be triggered when they are being saved or restored. 108 */ 109 assert(is_armv8_3_pauth_present()); 110 #endif /* CTX_INCLUDE_PAUTH_REGS */ 111 } 112 113 /******************************************************************************* 114 * BL31 is responsible for setting up the runtime services for the primary cpu 115 * before passing control to the bootloader or an Operating System. This 116 * function calls runtime_svc_init() which initializes all registered runtime 117 * services. The run time services would setup enough context for the core to 118 * switch to the next exception level. When this function returns, the core will 119 * switch to the programmed exception level via an ERET. 120 ******************************************************************************/ 121 void bl31_main(void) 122 { 123 NOTICE("BL31: %s\n", version_string); 124 NOTICE("BL31: %s\n", build_message); 125 126 #ifdef SUPPORT_UNKNOWN_MPID 127 if (unsupported_mpid_flag == 0) { 128 NOTICE("Unsupported MPID detected!\n"); 129 } 130 #endif 131 132 /* Perform platform setup in BL31 */ 133 bl31_platform_setup(); 134 135 /* Initialise helper libraries */ 136 bl31_lib_init(); 137 138 #if EL3_EXCEPTION_HANDLING 139 INFO("BL31: Initialising Exception Handling Framework\n"); 140 ehf_init(); 141 #endif 142 143 /* Initialize the runtime services e.g. psci. */ 144 INFO("BL31: Initializing runtime services\n"); 145 runtime_svc_init(); 146 147 /* 148 * All the cold boot actions on the primary cpu are done. We now need to 149 * decide which is the next image and how to execute it. 150 * If the SPD runtime service is present, it would want to pass control 151 * to BL32 first in S-EL1. In that case, SPD would have registered a 152 * function to initialize bl32 where it takes responsibility of entering 153 * S-EL1 and returning control back to bl31_main. Similarly, if RME is 154 * enabled and a function is registered to initialize RMM, control is 155 * transferred to RMM in R-EL2. After RMM initialization, control is 156 * returned back to bl31_main. Once this is done we can prepare entry 157 * into BL33 as normal. 158 */ 159 160 /* 161 * If SPD had registered an init hook, invoke it. 162 */ 163 if (bl32_init != NULL) { 164 INFO("BL31: Initializing BL32\n"); 165 166 int32_t rc = (*bl32_init)(); 167 168 if (rc == 0) { 169 WARN("BL31: BL32 initialization failed\n"); 170 } 171 } 172 173 /* 174 * If RME is enabled and init hook is registered, initialize RMM 175 * in R-EL2. 176 */ 177 #if ENABLE_RME 178 if (rmm_init != NULL) { 179 INFO("BL31: Initializing RMM\n"); 180 181 int32_t rc = (*rmm_init)(); 182 183 if (rc == 0) { 184 WARN("BL31: RMM initialization failed\n"); 185 } 186 } 187 #endif 188 189 /* 190 * We are ready to enter the next EL. Prepare entry into the image 191 * corresponding to the desired security state after the next ERET. 192 */ 193 bl31_prepare_next_image_entry(); 194 195 console_flush(); 196 197 /* 198 * Perform any platform specific runtime setup prior to cold boot exit 199 * from BL31 200 */ 201 bl31_plat_runtime_setup(); 202 } 203 204 /******************************************************************************* 205 * Accessor functions to help runtime services decide which image should be 206 * executed after BL31. This is BL33 or the non-secure bootloader image by 207 * default but the Secure payload dispatcher could override this by requesting 208 * an entry into BL32 (Secure payload) first. If it does so then it should use 209 * the same API to program an entry into BL33 once BL32 initialisation is 210 * complete. 211 ******************************************************************************/ 212 void bl31_set_next_image_type(uint32_t security_state) 213 { 214 assert(sec_state_is_valid(security_state)); 215 next_image_type = security_state; 216 } 217 218 uint32_t bl31_get_next_image_type(void) 219 { 220 return next_image_type; 221 } 222 223 /******************************************************************************* 224 * This function programs EL3 registers and performs other setup to enable entry 225 * into the next image after BL31 at the next ERET. 226 ******************************************************************************/ 227 void __init bl31_prepare_next_image_entry(void) 228 { 229 entry_point_info_t *next_image_info; 230 uint32_t image_type; 231 232 #if CTX_INCLUDE_AARCH32_REGS 233 /* 234 * Ensure that the build flag to save AArch32 system registers in CPU 235 * context is not set for AArch64-only platforms. 236 */ 237 if (el_implemented(1) == EL_IMPL_A64ONLY) { 238 ERROR("EL1 supports AArch64-only. Please set build flag " 239 "CTX_INCLUDE_AARCH32_REGS = 0\n"); 240 panic(); 241 } 242 #endif 243 244 /* Determine which image to execute next */ 245 image_type = bl31_get_next_image_type(); 246 247 /* Program EL3 registers to enable entry into the next EL */ 248 next_image_info = bl31_plat_get_next_image_ep_info(image_type); 249 assert(next_image_info != NULL); 250 assert(image_type == GET_SECURITY_STATE(next_image_info->h.attr)); 251 252 INFO("BL31: Preparing for EL3 exit to %s world\n", 253 (image_type == SECURE) ? "secure" : "normal"); 254 print_entry_point_info(next_image_info); 255 cm_init_my_context(next_image_info); 256 cm_prepare_el3_exit(image_type); 257 } 258 259 /******************************************************************************* 260 * This function initializes the pointer to BL32 init function. This is expected 261 * to be called by the SPD after it finishes all its initialization 262 ******************************************************************************/ 263 void bl31_register_bl32_init(int32_t (*func)(void)) 264 { 265 bl32_init = func; 266 } 267 268 #if ENABLE_RME 269 /******************************************************************************* 270 * This function initializes the pointer to RMM init function. This is expected 271 * to be called by the RMMD after it finishes all its initialization 272 ******************************************************************************/ 273 void bl31_register_rmm_init(int32_t (*func)(void)) 274 { 275 rmm_init = func; 276 } 277 #endif 278