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Searched refs:REG_DELAY (Results 1 – 25 of 30) sorted by relevance

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/OK3568_Linux_fs/kernel/drivers/media/i2c/
H A Dar0822.c80 #define REG_DELAY 0xFFFE macro
182 {REG_DELAY, 2000},
694 {REG_DELAY,100},
918 {REG_DELAY, 2000},
1465 {REG_DELAY,100},
1691 {REG_DELAY, 2000},
2234 {REG_DELAY,100},
2460 {REG_DELAY, 2000},
3225 {REG_DELAY, 2000},
3741 {REG_DELAY,100},
[all …]
H A Dar0230.c62 #define REG_DELAY 0xFFFE macro
144 {REG_DELAY, 20000},
146 {REG_DELAY, 20000},
523 {REG_DELAY, 20000},
525 {REG_DELAY, 20000},
836 if (unlikely(regs[i].addr == REG_DELAY)) in ar0230_write_array()
H A Dimx307.c110 #define REG_DELAY 0xFFFE macro
217 {REG_DELAY, 0x10},
259 {REG_DELAY, 0x10},
324 {REG_DELAY, 0x10},
366 {REG_DELAY, 0x10},
408 {REG_DELAY, 0x10},
471 {REG_DELAY, 0x10},
541 {REG_DELAY, 0x10},
971 if (unlikely(regs[i].addr == REG_DELAY)) in imx307_write_array()
H A Dimx317.c78 #define REG_DELAY 0xFFFE macro
271 {REG_DELAY, 0x10},
273 {REG_DELAY, 0x07},
473 {REG_DELAY, 0x10},
475 {REG_DELAY, 0x07},
667 if (regs[i].addr == REG_DELAY) { in imx317_write_array()
H A Dov2718.c98 #define REG_DELAY 0xFFFE macro
188 {REG_DELAY, 0x10},
2027 {REG_DELAY, 0x10},
3885 {REG_DELAY, 0x10},
5724 {REG_DELAY, 0x10},
7711 if (unlikely(regs[i].addr == REG_DELAY)) in ov2718_write_array()
H A Djx_h65.c77 #define REG_DELAY 0xFE macro
234 {REG_DELAY, 0x00},
333 {REG_DELAY, 0x00},
417 if (regs[i].addr == REG_DELAY) { in jx_h65_write_array()
H A Dov9750.c69 #define REG_DELAY 0xFFFE macro
143 {REG_DELAY, 0x10},
145 {REG_DELAY, 0x10},
443 if (unlikely(regs[i].addr == REG_DELAY)) in ov9750_write_array()
H A Dimx327.c104 #define REG_DELAY 0xFFFE macro
206 {REG_DELAY, 0x10},
248 {REG_DELAY, 0x10},
311 {REG_DELAY, 0x10},
381 {REG_DELAY, 0x10},
667 if (unlikely(regs[i].addr == REG_DELAY)) in imx327_write_array()
H A Djx_h62.c80 #define REG_DELAY 0xFE macro
239 {REG_DELAY, 0x00},
313 if (regs[i].addr == REG_DELAY) { in jx_h62_write_array()
H A Dov2775.c85 #define REG_DELAY 0xFFFE macro
175 {REG_DELAY, 0x10},
1989 {REG_DELAY, 0x10},
3907 if (unlikely(regs[i].addr == REG_DELAY)) in ov2775_write_array()
H A Dos03b10.c98 #define REG_DELAY 0xEE macro
178 {REG_DELAY, 0x05},
345 if (regs[i].addr == REG_DELAY) in os03b10_write_array()
H A Dgc4023.c77 #define REG_DELAY 0xFFFE macro
364 {REG_DELAY, 0x14},
438 if (regs[i].addr == REG_DELAY) in gc4023_write_array()
H A Djx_k17.c86 #define REG_DELAY 0xFE macro
345 if (regs[i].addr == REG_DELAY) { in jx_k17_write_array()
H A Djx_f37.c76 #define REG_DELAY 0xFE macro
448 if (regs[i].addr == REG_DELAY) { in jx_f37_write_array()
H A Dov4688.c82 #define REG_DELAY 0xFFFE macro
787 if (regs[i].addr == REG_DELAY) { in ov4688_write_array()
H A Dimx378.c111 #define REG_DELAY 0xFFFE macro
1865 if (unlikely(regs[i].addr == REG_DELAY)) in imx378_write_array()
H A Dimx334.c115 #define REG_DELAY 0xFFFE macro
652 if (unlikely(regs[i].addr == REG_DELAY)) in imx334_write_array()
H A Dimx586.c112 #define REG_DELAY 0xFFFE macro
919 if (unlikely(regs[i].addr == REG_DELAY)) in imx586_write_array()
H A Dov7251.c77 #define REG_DELAY 0xFFFE macro
H A Dsc4336.c91 #define REG_DELAY 0xFFFE macro
H A Dsc5336.c88 #define REG_DELAY 0xFFFE macro
H A Dsc230ai.c108 #define REG_DELAY 0xFFFE macro
H A Dsc401ai.c103 #define REG_DELAY 0xFFFE macro
H A Dsc3338.c90 #define REG_DELAY 0xFFFE macro
H A Dsc223a.c89 #define REG_DELAY 0xFFFE macro

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