1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * sc223a driver
4 *
5 * Copyright (C) 2023 Rockchip Electronics Co., Ltd.
6 *
7 * V0.0X01.0X01 first version
8 */
9
10 //#define DEBUG
11 #include <linux/clk.h>
12 #include <linux/device.h>
13 #include <linux/delay.h>
14 #include <linux/gpio/consumer.h>
15 #include <linux/i2c.h>
16 #include <linux/module.h>
17 #include <linux/pm_runtime.h>
18 #include <linux/regulator/consumer.h>
19 #include <linux/sysfs.h>
20 #include <linux/slab.h>
21 #include <linux/version.h>
22 #include <linux/rk-camera-module.h>
23 #include <linux/rk-preisp.h>
24 #include <media/media-entity.h>
25 #include <media/v4l2-async.h>
26 #include <media/v4l2-ctrls.h>
27 #include <media/v4l2-subdev.h>
28 #include <linux/pinctrl/consumer.h>
29 #include "../platform/rockchip/isp/rkisp_tb_helper.h"
30
31 #define DRIVER_VERSION KERNEL_VERSION(0, 0x01, 0x01)
32
33 #ifndef V4L2_CID_DIGITAL_GAIN
34 #define V4L2_CID_DIGITAL_GAIN V4L2_CID_GAIN
35 #endif
36
37 #define SC223A_LANES 2
38 #define SC223A_BITS_PER_SAMPLE 10
39 #define SC223A_LINK_FREQ_405 202500000
40
41 #define PIXEL_RATE_WITH_405M_10BIT (SC223A_LINK_FREQ_405 * 2 * \
42 SC223A_LANES / SC223A_BITS_PER_SAMPLE)
43 #define SC223A_XVCLK_FREQ 24000000
44
45 #define CHIP_ID 0xcb3e
46 #define SC223A_REG_CHIP_ID 0x3107
47
48 #define SC223A_REG_CTRL_MODE 0x0100
49 #define SC223A_MODE_SW_STANDBY 0x0
50 #define SC223A_MODE_STREAMING BIT(0)
51
52 #define SC223A_REG_EXPOSURE_H 0x3e00
53 #define SC223A_REG_EXPOSURE_M 0x3e01
54 #define SC223A_REG_EXPOSURE_L 0x3e02
55 #define SC223A_EXPOSURE_MIN 3
56 #define SC223A_EXPOSURE_STEP 1
57 #define SC223A_VTS_MAX 0x7fff
58
59 #define SC223A_REG_DIG_GAIN 0x3e06
60 #define SC223A_REG_DIG_FINE_GAIN 0x3e07
61 #define SC223A_REG_ANA_GAIN 0x3e09
62 #define SC223A_GAIN_MIN 0x0080
63 #define SC223A_GAIN_MAX (29656) //57.92*4*128
64 #define SC223A_GAIN_STEP 1
65 #define SC223A_GAIN_DEFAULT 0x80
66
67 #define SC223A_REG_GROUP_HOLD 0x3812
68 #define SC223A_GROUP_HOLD_START 0x00
69 #define SC223A_GROUP_HOLD_END 0x30
70
71 #define SC223A_REG_TEST_PATTERN 0x4501
72 #define SC223A_TEST_PATTERN_BIT_MASK BIT(3)
73
74 #define SC223A_REG_VTS_H 0x320e
75 #define SC223A_REG_VTS_L 0x320f
76
77 #define SC223A_FLIP_MIRROR_REG 0x3221
78
79 #define SC223A_FETCH_EXP_H(VAL) (((VAL) >> 12) & 0xF)
80 #define SC223A_FETCH_EXP_M(VAL) (((VAL) >> 4) & 0xFF)
81 #define SC223A_FETCH_EXP_L(VAL) (((VAL) & 0xF) << 4)
82
83 #define SC223A_FETCH_AGAIN_H(VAL) (((VAL) >> 8) & 0x03)
84 #define SC223A_FETCH_AGAIN_L(VAL) ((VAL) & 0xFF)
85
86 #define SC223A_FETCH_MIRROR(VAL, ENABLE) (ENABLE ? VAL | 0x06 : VAL & 0xf9)
87 #define SC223A_FETCH_FLIP(VAL, ENABLE) (ENABLE ? VAL | 0x60 : VAL & 0x9f)
88
89 #define REG_DELAY 0xFFFE
90 #define REG_NULL 0xFFFF
91
92 #define SC223A_REG_VALUE_08BIT 1
93 #define SC223A_REG_VALUE_16BIT 2
94 #define SC223A_REG_VALUE_24BIT 3
95
96 #define OF_CAMERA_PINCTRL_STATE_DEFAULT "rockchip,camera_default"
97 #define OF_CAMERA_PINCTRL_STATE_SLEEP "rockchip,camera_sleep"
98 #define SC223A_NAME "sc223a"
99
100 static const char * const sc223a_supply_names[] = {
101 "avdd", /* Analog power */
102 "dovdd", /* Digital I/O power */
103 "dvdd", /* Digital core power */
104 };
105
106 #define SC223A_NUM_SUPPLIES ARRAY_SIZE(sc223a_supply_names)
107
108 struct regval {
109 u16 addr;
110 u8 val;
111 };
112
113 struct sc223a_mode {
114 u32 bus_fmt;
115 u32 width;
116 u32 height;
117 struct v4l2_fract max_fps;
118 u32 hts_def;
119 u32 vts_def;
120 u32 exp_def;
121 const struct regval *reg_list;
122 u32 hdr_mode;
123 u32 vc[PAD_MAX];
124 };
125
126 struct sc223a {
127 struct i2c_client *client;
128 struct clk *xvclk;
129 struct gpio_desc *reset_gpio;
130 struct gpio_desc *pwdn_gpio;
131 struct regulator_bulk_data supplies[SC223A_NUM_SUPPLIES];
132
133 struct pinctrl *pinctrl;
134 struct pinctrl_state *pins_default;
135 struct pinctrl_state *pins_sleep;
136
137 struct v4l2_subdev subdev;
138 struct media_pad pad;
139 struct v4l2_ctrl_handler ctrl_handler;
140 struct v4l2_ctrl *exposure;
141 struct v4l2_ctrl *anal_gain;
142 struct v4l2_ctrl *digi_gain;
143 struct v4l2_ctrl *hblank;
144 struct v4l2_ctrl *vblank;
145 struct v4l2_ctrl *test_pattern;
146 struct mutex mutex;
147 struct v4l2_fract cur_fps;
148 bool streaming;
149 bool power_on;
150 const struct sc223a_mode *cur_mode;
151 u32 module_index;
152 const char *module_facing;
153 const char *module_name;
154 const char *len_name;
155 u32 cur_vts;
156 bool has_init_exp;
157 bool is_thunderboot;
158 bool is_first_streamoff;
159 struct preisp_hdrae_exp_s init_hdrae_exp;
160 };
161
162 #define to_sc223a(sd) container_of(sd, struct sc223a, subdev)
163
164 /*
165 * Xclk 24Mhz
166 */
167 static const struct regval sc223a_global_regs[] = {
168 {REG_NULL, 0x00},
169 };
170
171 /*
172 * Xclk 24Mhz
173 * max_framerate 30fps
174 * mipi_datarate per lane 405Mbps, 2lane
175 */
176 static const struct regval sc223a_linear_10_1920x1080_30fps_regs[] = {
177 {0x0100, 0x00},
178 {0x36e9, 0x80},
179 {0x37f9, 0x80},
180 {0x301f, 0x08},
181 {0x30b8, 0x44},
182 {0x320c, 0x08},
183 {0x320d, 0xca},
184 {0x320e, 0x04},
185 {0x320f, 0xb0},
186 {0x3253, 0x0c},
187 {0x3281, 0x80},
188 {0x3301, 0x06},
189 {0x3302, 0x12},
190 {0x3306, 0x84},
191 {0x3309, 0x60},
192 {0x330a, 0x00},
193 {0x330b, 0xe0},
194 {0x330d, 0x20},
195 {0x3314, 0x15},
196 {0x331e, 0x41},
197 {0x331f, 0x51},
198 {0x3320, 0x0a},
199 {0x3326, 0x0e},
200 {0x3333, 0x10},
201 {0x3334, 0x40},
202 {0x335d, 0x60},
203 {0x335e, 0x06},
204 {0x335f, 0x08},
205 {0x3364, 0x56},
206 {0x337a, 0x06},
207 {0x337b, 0x0e},
208 {0x337c, 0x02},
209 {0x337d, 0x0a},
210 {0x3390, 0x03},
211 {0x3391, 0x0f},
212 {0x3392, 0x1f},
213 {0x3393, 0x06},
214 {0x3394, 0x06},
215 {0x3395, 0x06},
216 {0x3396, 0x48},
217 {0x3397, 0x4b},
218 {0x3398, 0x5f},
219 {0x3399, 0x06},
220 {0x339a, 0x06},
221 {0x339b, 0x9c},
222 {0x339c, 0x9c},
223 {0x33a2, 0x04},
224 {0x33a3, 0x0a},
225 {0x33ad, 0x1c},
226 {0x33af, 0x40},
227 {0x33b1, 0x80},
228 {0x33b3, 0x20},
229 {0x349f, 0x02},
230 {0x34a6, 0x48},
231 {0x34a7, 0x4b},
232 {0x34a8, 0x20},
233 {0x34a9, 0x20},
234 {0x34f8, 0x5f},
235 {0x34f9, 0x10},
236 {0x3616, 0xac},
237 {0x3630, 0xc0},
238 {0x3631, 0x86},
239 {0x3632, 0x26},
240 {0x3633, 0x32},
241 {0x3637, 0x29},
242 {0x363a, 0x84},
243 {0x363b, 0x04},
244 {0x363c, 0x08},
245 {0x3641, 0x3a},
246 {0x364f, 0x39},
247 {0x3670, 0xce},
248 {0x3674, 0xc0},
249 {0x3675, 0xc0},
250 {0x3676, 0xc0},
251 {0x3677, 0x86},
252 {0x3678, 0x8b},
253 {0x3679, 0x8c},
254 {0x367c, 0x4b},
255 {0x367d, 0x5f},
256 {0x367e, 0x4b},
257 {0x367f, 0x5f},
258 {0x3690, 0x62},
259 {0x3691, 0x63},
260 {0x3692, 0x63},
261 {0x3699, 0x86},
262 {0x369a, 0x92},
263 {0x369b, 0xa4},
264 {0x369c, 0x48},
265 {0x369d, 0x4b},
266 {0x36a2, 0x4b},
267 {0x36a3, 0x4f},
268 {0x36ea, 0x09},
269 {0x36eb, 0x0c},
270 {0x36ec, 0x1c},
271 {0x36ed, 0x28},
272 {0x370f, 0x01},
273 {0x3721, 0x6c},
274 {0x3722, 0x09},
275 {0x3724, 0x41},
276 {0x3725, 0xc4},
277 {0x37b0, 0x09},
278 {0x37b1, 0x09},
279 {0x37b2, 0x09},
280 {0x37b3, 0x48},
281 {0x37b4, 0x5f},
282 {0x37fa, 0x09},
283 {0x37fb, 0x32},
284 {0x37fc, 0x10},
285 {0x37fd, 0x37},
286 {0x3900, 0x19},
287 {0x3901, 0x02},
288 {0x3905, 0xb8},
289 {0x391b, 0x82},
290 {0x391c, 0x00},
291 {0x391f, 0x04},
292 {0x3933, 0x81},
293 {0x3934, 0x4c},
294 {0x393f, 0xff},
295 {0x3940, 0x73},
296 {0x3942, 0x01},
297 {0x3943, 0x4d},
298 {0x3946, 0x20},
299 {0x3957, 0x86},
300 {0x3e01, 0x95},
301 {0x3e02, 0x60},
302 {0x3e28, 0xc4},
303 {0x440e, 0x02},
304 {0x4501, 0xc0},
305 {0x4509, 0x14},
306 {0x450d, 0x11},
307 {0x4518, 0x00},
308 {0x451b, 0x0a},
309 {0x4819, 0x07},
310 {0x481b, 0x04},
311 {0x481d, 0x0e},
312 {0x481f, 0x03},
313 {0x4821, 0x09},
314 {0x4823, 0x04},
315 {0x4825, 0x03},
316 {0x4827, 0x03},
317 {0x4829, 0x06},
318 {0x501c, 0x00},
319 {0x501d, 0x60},
320 {0x501e, 0x00},
321 {0x501f, 0x40},
322 {0x5799, 0x06},
323 {0x5ae0, 0xfe},
324 {0x5ae1, 0x40},
325 {0x5ae2, 0x38},
326 {0x5ae3, 0x30},
327 {0x5ae4, 0x28},
328 {0x5ae5, 0x38},
329 {0x5ae6, 0x30},
330 {0x5ae7, 0x28},
331 {0x5ae8, 0x3f},
332 {0x5ae9, 0x34},
333 {0x5aea, 0x2c},
334 {0x5aeb, 0x3f},
335 {0x5aec, 0x34},
336 {0x5aed, 0x2c},
337 {0x5aee, 0xfe},
338 {0x5aef, 0x40},
339 {0x5af4, 0x38},
340 {0x5af5, 0x30},
341 {0x5af6, 0x28},
342 {0x5af7, 0x38},
343 {0x5af8, 0x30},
344 {0x5af9, 0x28},
345 {0x5afa, 0x3f},
346 {0x5afb, 0x34},
347 {0x5afc, 0x2c},
348 {0x5afd, 0x3f},
349 {0x5afe, 0x34},
350 {0x5aff, 0x2c},
351 {0x36e9, 0x53},
352 {0x37f9, 0x53},
353 {REG_NULL, 0x00},
354 };
355
356 static const struct sc223a_mode supported_modes[] = {
357 {
358 .width = 1920,
359 .height = 1080,
360 .max_fps = {
361 .numerator = 10000,
362 .denominator = 300000,
363 },
364 .exp_def = 0x0080,
365 .hts_def = 0x08ca,
366 .vts_def = 0x04b0,
367 .bus_fmt = MEDIA_BUS_FMT_SBGGR10_1X10,
368 .reg_list = sc223a_linear_10_1920x1080_30fps_regs,
369 .hdr_mode = NO_HDR,
370 .vc[PAD0] = V4L2_MBUS_CSI2_CHANNEL_0,
371 }
372 };
373
374 static const s64 link_freq_menu_items[] = {
375 SC223A_LINK_FREQ_405
376 };
377
378 static const char * const sc223a_test_pattern_menu[] = {
379 "Disabled",
380 "Vertical Color Bar Type 1",
381 "Vertical Color Bar Type 2",
382 "Vertical Color Bar Type 3",
383 "Vertical Color Bar Type 4"
384 };
385
386 /* Write registers up to 4 at a time */
sc223a_write_reg(struct i2c_client * client,u16 reg,u32 len,u32 val)387 static int sc223a_write_reg(struct i2c_client *client, u16 reg,
388 u32 len, u32 val)
389 {
390 u32 buf_i, val_i;
391 u8 buf[6];
392 u8 *val_p;
393 __be32 val_be;
394
395 if (len > 4)
396 return -EINVAL;
397
398 buf[0] = reg >> 8;
399 buf[1] = reg & 0xff;
400
401 val_be = cpu_to_be32(val);
402 val_p = (u8 *)&val_be;
403 buf_i = 2;
404 val_i = 4 - len;
405
406 while (val_i < 4)
407 buf[buf_i++] = val_p[val_i++];
408
409 if (i2c_master_send(client, buf, len + 2) != len + 2)
410 return -EIO;
411 return 0;
412 }
413
sc223a_write_array(struct i2c_client * client,const struct regval * regs)414 static int sc223a_write_array(struct i2c_client *client,
415 const struct regval *regs)
416 {
417 u32 i;
418 int ret = 0;
419
420 for (i = 0; ret == 0 && regs[i].addr != REG_NULL; i++)
421 ret = sc223a_write_reg(client, regs[i].addr,
422 SC223A_REG_VALUE_08BIT, regs[i].val);
423
424 return ret;
425 }
426
427 /* Read registers up to 4 at a time */
sc223a_read_reg(struct i2c_client * client,u16 reg,unsigned int len,u32 * val)428 static int sc223a_read_reg(struct i2c_client *client, u16 reg, unsigned int len,
429 u32 *val)
430 {
431 struct i2c_msg msgs[2];
432 u8 *data_be_p;
433 __be32 data_be = 0;
434 __be16 reg_addr_be = cpu_to_be16(reg);
435 int ret;
436
437 if (len > 4 || !len)
438 return -EINVAL;
439
440 data_be_p = (u8 *)&data_be;
441 /* Write register address */
442 msgs[0].addr = client->addr;
443 msgs[0].flags = 0;
444 msgs[0].len = 2;
445 msgs[0].buf = (u8 *)®_addr_be;
446
447 /* Read data from register */
448 msgs[1].addr = client->addr;
449 msgs[1].flags = I2C_M_RD;
450 msgs[1].len = len;
451 msgs[1].buf = &data_be_p[4 - len];
452
453 ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs));
454 if (ret != ARRAY_SIZE(msgs))
455 return -EIO;
456
457 *val = be32_to_cpu(data_be);
458
459 return 0;
460 }
461
sc223a_set_gain_reg(struct sc223a * sc223a,u32 gain)462 static int sc223a_set_gain_reg(struct sc223a *sc223a, u32 gain)
463 {
464 struct i2c_client *client = sc223a->client;
465 u32 coarse_again = 0, coarse_dgain = 0, fine_dgain = 0;
466 int ret = 0, gain_factor;
467
468 if (gain < 128)
469 gain = 128;
470 else if (gain > SC223A_GAIN_MAX)
471 gain = SC223A_GAIN_MAX;
472
473 gain_factor = gain * 1000 / 128;
474 if (gain_factor < 1810) {
475 coarse_again = 0x00;
476 coarse_dgain = 0x00;
477 fine_dgain = gain_factor * 128 / 1000;
478 } else if (gain_factor < 1810 * 2) {
479 coarse_again = 0x40;
480 coarse_dgain = 0x00;
481 fine_dgain = gain_factor * 128 / 1810;
482 } else if (gain_factor < 1810 * 4) {
483 coarse_again = 0x48;
484 coarse_dgain = 0x00;
485 fine_dgain = gain_factor * 128 / 1810 / 2;
486 } else if (gain_factor < 1810 * 8) {
487 coarse_again = 0x49;
488 coarse_dgain = 0x00;
489 fine_dgain = gain_factor * 128 / 1810 / 4;
490 } else if (gain_factor < 1810 * 16) {
491 coarse_again = 0x4b;
492 coarse_dgain = 0x00;
493 fine_dgain = gain_factor * 128 / 1810 / 8;
494 } else if (gain_factor < 1810 * 32) {
495 coarse_again = 0x4f;
496 coarse_dgain = 0x00;
497 fine_dgain = gain_factor * 128 / 1810 / 16;
498 } else if (gain_factor < 1810 * 64) {
499 //open dgain begin max digital gain 4X
500 coarse_again = 0x5f;
501 coarse_dgain = 0x00;
502 fine_dgain = gain_factor * 128 / 1810 / 32;
503 } else if (gain_factor < 1810 * 128) {
504 coarse_again = 0x5f;
505 coarse_dgain = 0x01;
506 fine_dgain = gain_factor * 128 / 1810 / 64;
507 } else {
508 coarse_again = 0x5f;
509 coarse_dgain = 0x03;
510 fine_dgain = 0x80;
511 }
512 dev_dbg(&client->dev, "c_again: 0x%x, c_dgain: 0x%x, f_dgain: 0x%0x\n",
513 coarse_again, coarse_dgain, fine_dgain);
514
515 ret = sc223a_write_reg(sc223a->client,
516 SC223A_REG_DIG_GAIN,
517 SC223A_REG_VALUE_08BIT,
518 coarse_dgain);
519 ret |= sc223a_write_reg(sc223a->client,
520 SC223A_REG_DIG_FINE_GAIN,
521 SC223A_REG_VALUE_08BIT,
522 fine_dgain);
523 ret |= sc223a_write_reg(sc223a->client,
524 SC223A_REG_ANA_GAIN,
525 SC223A_REG_VALUE_08BIT,
526 coarse_again);
527
528 return ret;
529 }
530
sc223a_get_reso_dist(const struct sc223a_mode * mode,struct v4l2_mbus_framefmt * framefmt)531 static int sc223a_get_reso_dist(const struct sc223a_mode *mode,
532 struct v4l2_mbus_framefmt *framefmt)
533 {
534 return abs(mode->width - framefmt->width) +
535 abs(mode->height - framefmt->height);
536 }
537
538 static const struct sc223a_mode *
sc223a_find_best_fit(struct v4l2_subdev_format * fmt)539 sc223a_find_best_fit(struct v4l2_subdev_format *fmt)
540 {
541 struct v4l2_mbus_framefmt *framefmt = &fmt->format;
542 int dist;
543 int cur_best_fit = 0;
544 int cur_best_fit_dist = -1;
545 unsigned int i;
546
547 for (i = 0; i < ARRAY_SIZE(supported_modes); i++) {
548 dist = sc223a_get_reso_dist(&supported_modes[i], framefmt);
549 if (cur_best_fit_dist == -1 || dist < cur_best_fit_dist) {
550 cur_best_fit_dist = dist;
551 cur_best_fit = i;
552 }
553 }
554
555 return &supported_modes[cur_best_fit];
556 }
557
sc223a_set_fmt(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_format * fmt)558 static int sc223a_set_fmt(struct v4l2_subdev *sd,
559 struct v4l2_subdev_pad_config *cfg,
560 struct v4l2_subdev_format *fmt)
561 {
562 struct sc223a *sc223a = to_sc223a(sd);
563 const struct sc223a_mode *mode;
564 s64 h_blank, vblank_def;
565
566 mutex_lock(&sc223a->mutex);
567
568 mode = sc223a_find_best_fit(fmt);
569 fmt->format.code = mode->bus_fmt;
570 fmt->format.width = mode->width;
571 fmt->format.height = mode->height;
572 fmt->format.field = V4L2_FIELD_NONE;
573 if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
574 #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
575 *v4l2_subdev_get_try_format(sd, cfg, fmt->pad) = fmt->format;
576 #else
577 mutex_unlock(&sc223a->mutex);
578 return -ENOTTY;
579 #endif
580 } else {
581 sc223a->cur_mode = mode;
582 h_blank = mode->hts_def - mode->width;
583 __v4l2_ctrl_modify_range(sc223a->hblank, h_blank,
584 h_blank, 1, h_blank);
585 vblank_def = mode->vts_def - mode->height;
586 __v4l2_ctrl_modify_range(sc223a->vblank, vblank_def,
587 SC223A_VTS_MAX - mode->height,
588 1, vblank_def);
589 sc223a->cur_fps = mode->max_fps;
590 }
591
592 mutex_unlock(&sc223a->mutex);
593
594 return 0;
595 }
596
sc223a_get_fmt(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_format * fmt)597 static int sc223a_get_fmt(struct v4l2_subdev *sd,
598 struct v4l2_subdev_pad_config *cfg,
599 struct v4l2_subdev_format *fmt)
600 {
601 struct sc223a *sc223a = to_sc223a(sd);
602 const struct sc223a_mode *mode = sc223a->cur_mode;
603
604 mutex_lock(&sc223a->mutex);
605 if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
606 #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
607 fmt->format = *v4l2_subdev_get_try_format(sd, cfg, fmt->pad);
608 #else
609 mutex_unlock(&sc223a->mutex);
610 return -ENOTTY;
611 #endif
612 } else {
613 fmt->format.width = mode->width;
614 fmt->format.height = mode->height;
615 fmt->format.code = mode->bus_fmt;
616 fmt->format.field = V4L2_FIELD_NONE;
617 /* format info: width/height/data type/virctual channel */
618 if (fmt->pad < PAD_MAX && mode->hdr_mode != NO_HDR)
619 fmt->reserved[0] = mode->vc[fmt->pad];
620 else
621 fmt->reserved[0] = mode->vc[PAD0];
622 }
623 mutex_unlock(&sc223a->mutex);
624
625 return 0;
626 }
627
sc223a_enum_mbus_code(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_mbus_code_enum * code)628 static int sc223a_enum_mbus_code(struct v4l2_subdev *sd,
629 struct v4l2_subdev_pad_config *cfg,
630 struct v4l2_subdev_mbus_code_enum *code)
631 {
632 struct sc223a *sc223a = to_sc223a(sd);
633
634 if (code->index != 0)
635 return -EINVAL;
636 code->code = sc223a->cur_mode->bus_fmt;
637
638 return 0;
639 }
640
sc223a_enum_frame_sizes(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_frame_size_enum * fse)641 static int sc223a_enum_frame_sizes(struct v4l2_subdev *sd,
642 struct v4l2_subdev_pad_config *cfg,
643 struct v4l2_subdev_frame_size_enum *fse)
644 {
645 if (fse->index >= ARRAY_SIZE(supported_modes))
646 return -EINVAL;
647
648 if (fse->code != supported_modes[0].bus_fmt)
649 return -EINVAL;
650
651 fse->min_width = supported_modes[fse->index].width;
652 fse->max_width = supported_modes[fse->index].width;
653 fse->max_height = supported_modes[fse->index].height;
654 fse->min_height = supported_modes[fse->index].height;
655
656 return 0;
657 }
658
sc223a_enable_test_pattern(struct sc223a * sc223a,u32 pattern)659 static int sc223a_enable_test_pattern(struct sc223a *sc223a, u32 pattern)
660 {
661 u32 val = 0;
662 int ret = 0;
663
664 ret = sc223a_read_reg(sc223a->client, SC223A_REG_TEST_PATTERN,
665 SC223A_REG_VALUE_08BIT, &val);
666 if (pattern)
667 val |= SC223A_TEST_PATTERN_BIT_MASK;
668 else
669 val &= ~SC223A_TEST_PATTERN_BIT_MASK;
670
671 ret |= sc223a_write_reg(sc223a->client, SC223A_REG_TEST_PATTERN,
672 SC223A_REG_VALUE_08BIT, val);
673 return ret;
674 }
675
sc223a_g_frame_interval(struct v4l2_subdev * sd,struct v4l2_subdev_frame_interval * fi)676 static int sc223a_g_frame_interval(struct v4l2_subdev *sd,
677 struct v4l2_subdev_frame_interval *fi)
678 {
679 struct sc223a *sc223a = to_sc223a(sd);
680 const struct sc223a_mode *mode = sc223a->cur_mode;
681
682 if (sc223a->streaming)
683 fi->interval = sc223a->cur_fps;
684 else
685 fi->interval = mode->max_fps;
686
687 return 0;
688 }
689
sc223a_g_mbus_config(struct v4l2_subdev * sd,unsigned int pad_id,struct v4l2_mbus_config * config)690 static int sc223a_g_mbus_config(struct v4l2_subdev *sd,
691 unsigned int pad_id,
692 struct v4l2_mbus_config *config)
693 {
694 struct sc223a *sc223a = to_sc223a(sd);
695 const struct sc223a_mode *mode = sc223a->cur_mode;
696
697 u32 val = 1 << (SC223A_LANES - 1) |
698 V4L2_MBUS_CSI2_CHANNEL_0 |
699 V4L2_MBUS_CSI2_CONTINUOUS_CLOCK;
700
701 if (mode->hdr_mode != NO_HDR)
702 val |= V4L2_MBUS_CSI2_CHANNEL_1;
703 if (mode->hdr_mode == HDR_X3)
704 val |= V4L2_MBUS_CSI2_CHANNEL_2;
705
706 config->type = V4L2_MBUS_CSI2_DPHY;
707 config->flags = val;
708
709 return 0;
710 }
711
sc223a_get_module_inf(struct sc223a * sc223a,struct rkmodule_inf * inf)712 static void sc223a_get_module_inf(struct sc223a *sc223a,
713 struct rkmodule_inf *inf)
714 {
715 memset(inf, 0, sizeof(*inf));
716 strscpy(inf->base.sensor, SC223A_NAME, sizeof(inf->base.sensor));
717 strscpy(inf->base.module, sc223a->module_name,
718 sizeof(inf->base.module));
719 strscpy(inf->base.lens, sc223a->len_name, sizeof(inf->base.lens));
720 }
721
sc223a_ioctl(struct v4l2_subdev * sd,unsigned int cmd,void * arg)722 static long sc223a_ioctl(struct v4l2_subdev *sd, unsigned int cmd, void *arg)
723 {
724 struct sc223a *sc223a = to_sc223a(sd);
725 struct rkmodule_hdr_cfg *hdr;
726 u32 i, h, w;
727 long ret = 0;
728 u32 stream = 0;
729
730 switch (cmd) {
731 case RKMODULE_GET_MODULE_INFO:
732 sc223a_get_module_inf(sc223a, (struct rkmodule_inf *)arg);
733 break;
734 case RKMODULE_GET_HDR_CFG:
735 hdr = (struct rkmodule_hdr_cfg *)arg;
736 hdr->esp.mode = HDR_NORMAL_VC;
737 hdr->hdr_mode = sc223a->cur_mode->hdr_mode;
738 break;
739 case RKMODULE_SET_HDR_CFG:
740 hdr = (struct rkmodule_hdr_cfg *)arg;
741 w = sc223a->cur_mode->width;
742 h = sc223a->cur_mode->height;
743 for (i = 0; i < ARRAY_SIZE(supported_modes); i++) {
744 if (w == supported_modes[i].width &&
745 h == supported_modes[i].height &&
746 supported_modes[i].hdr_mode == hdr->hdr_mode) {
747 sc223a->cur_mode = &supported_modes[i];
748 break;
749 }
750 }
751 if (i == ARRAY_SIZE(supported_modes)) {
752 dev_err(&sc223a->client->dev,
753 "not find hdr mode:%d %dx%d config\n",
754 hdr->hdr_mode, w, h);
755 ret = -EINVAL;
756 } else {
757 w = sc223a->cur_mode->hts_def - sc223a->cur_mode->width;
758 h = sc223a->cur_mode->vts_def - sc223a->cur_mode->height;
759 __v4l2_ctrl_modify_range(sc223a->hblank, w, w, 1, w);
760 __v4l2_ctrl_modify_range(sc223a->vblank, h,
761 SC223A_VTS_MAX - sc223a->cur_mode->height, 1, h);
762 sc223a->cur_fps = sc223a->cur_mode->max_fps;
763 }
764 break;
765 case PREISP_CMD_SET_HDRAE_EXP:
766 break;
767 case RKMODULE_SET_QUICK_STREAM:
768
769 stream = *((u32 *)arg);
770
771 if (stream)
772 ret = sc223a_write_reg(sc223a->client, SC223A_REG_CTRL_MODE,
773 SC223A_REG_VALUE_08BIT, SC223A_MODE_STREAMING);
774 else
775 ret = sc223a_write_reg(sc223a->client, SC223A_REG_CTRL_MODE,
776 SC223A_REG_VALUE_08BIT, SC223A_MODE_SW_STANDBY);
777 break;
778 default:
779 ret = -ENOIOCTLCMD;
780 break;
781 }
782
783 return ret;
784 }
785
786 #ifdef CONFIG_COMPAT
sc223a_compat_ioctl32(struct v4l2_subdev * sd,unsigned int cmd,unsigned long arg)787 static long sc223a_compat_ioctl32(struct v4l2_subdev *sd,
788 unsigned int cmd, unsigned long arg)
789 {
790 void __user *up = compat_ptr(arg);
791 struct rkmodule_inf *inf;
792 struct rkmodule_hdr_cfg *hdr;
793 struct preisp_hdrae_exp_s *hdrae;
794 long ret;
795 u32 stream = 0;
796
797 switch (cmd) {
798 case RKMODULE_GET_MODULE_INFO:
799 inf = kzalloc(sizeof(*inf), GFP_KERNEL);
800 if (!inf) {
801 ret = -ENOMEM;
802 return ret;
803 }
804
805 ret = sc223a_ioctl(sd, cmd, inf);
806 if (!ret) {
807 if (copy_to_user(up, inf, sizeof(*inf)))
808 ret = -EFAULT;
809 }
810 kfree(inf);
811 break;
812 case RKMODULE_GET_HDR_CFG:
813 hdr = kzalloc(sizeof(*hdr), GFP_KERNEL);
814 if (!hdr) {
815 ret = -ENOMEM;
816 return ret;
817 }
818
819 ret = sc223a_ioctl(sd, cmd, hdr);
820 if (!ret) {
821 if (copy_to_user(up, hdr, sizeof(*hdr)))
822 ret = -EFAULT;
823 }
824 kfree(hdr);
825 break;
826 case RKMODULE_SET_HDR_CFG:
827 hdr = kzalloc(sizeof(*hdr), GFP_KERNEL);
828 if (!hdr) {
829 ret = -ENOMEM;
830 return ret;
831 }
832
833 ret = copy_from_user(hdr, up, sizeof(*hdr));
834 if (!ret)
835 ret = sc223a_ioctl(sd, cmd, hdr);
836 else
837 ret = -EFAULT;
838 kfree(hdr);
839 break;
840 case PREISP_CMD_SET_HDRAE_EXP:
841 hdrae = kzalloc(sizeof(*hdrae), GFP_KERNEL);
842 if (!hdrae) {
843 ret = -ENOMEM;
844 return ret;
845 }
846
847 ret = copy_from_user(hdrae, up, sizeof(*hdrae));
848 if (!ret)
849 ret = sc223a_ioctl(sd, cmd, hdrae);
850 else
851 ret = -EFAULT;
852 kfree(hdrae);
853 break;
854 case RKMODULE_SET_QUICK_STREAM:
855 ret = copy_from_user(&stream, up, sizeof(u32));
856 if (!ret)
857 ret = sc223a_ioctl(sd, cmd, &stream);
858 else
859 ret = -EFAULT;
860 break;
861 default:
862 ret = -ENOIOCTLCMD;
863 break;
864 }
865
866 return ret;
867 }
868 #endif
869
__sc223a_start_stream(struct sc223a * sc223a)870 static int __sc223a_start_stream(struct sc223a *sc223a)
871 {
872 int ret;
873
874 if (!sc223a->is_thunderboot) {
875 ret = sc223a_write_array(sc223a->client, sc223a->cur_mode->reg_list);
876 if (ret)
877 return ret;
878 /* In case these controls are set before streaming */
879 ret = __v4l2_ctrl_handler_setup(&sc223a->ctrl_handler);
880 if (ret)
881 return ret;
882 if (sc223a->has_init_exp && sc223a->cur_mode->hdr_mode != NO_HDR) {
883 ret = sc223a_ioctl(&sc223a->subdev, PREISP_CMD_SET_HDRAE_EXP,
884 &sc223a->init_hdrae_exp);
885 if (ret) {
886 dev_err(&sc223a->client->dev,
887 "init exp fail in hdr mode\n");
888 return ret;
889 }
890 }
891 }
892 return sc223a_write_reg(sc223a->client, SC223A_REG_CTRL_MODE,
893 SC223A_REG_VALUE_08BIT, SC223A_MODE_STREAMING);
894 }
895
__sc223a_stop_stream(struct sc223a * sc223a)896 static int __sc223a_stop_stream(struct sc223a *sc223a)
897 {
898 sc223a->has_init_exp = false;
899 if (sc223a->is_thunderboot) {
900 sc223a->is_first_streamoff = true;
901 pm_runtime_put(&sc223a->client->dev);
902 }
903 return sc223a_write_reg(sc223a->client, SC223A_REG_CTRL_MODE,
904 SC223A_REG_VALUE_08BIT, SC223A_MODE_SW_STANDBY);
905 }
906
907 static int __sc223a_power_on(struct sc223a *sc223a);
sc223a_s_stream(struct v4l2_subdev * sd,int on)908 static int sc223a_s_stream(struct v4l2_subdev *sd, int on)
909 {
910 struct sc223a *sc223a = to_sc223a(sd);
911 struct i2c_client *client = sc223a->client;
912 int ret = 0;
913
914 mutex_lock(&sc223a->mutex);
915 on = !!on;
916 if (on == sc223a->streaming)
917 goto unlock_and_return;
918 if (on) {
919 if (sc223a->is_thunderboot && rkisp_tb_get_state() == RKISP_TB_NG) {
920 sc223a->is_thunderboot = false;
921 __sc223a_power_on(sc223a);
922 }
923 ret = pm_runtime_get_sync(&client->dev);
924 if (ret < 0) {
925 pm_runtime_put_noidle(&client->dev);
926 goto unlock_and_return;
927 }
928 ret = __sc223a_start_stream(sc223a);
929 if (ret) {
930 v4l2_err(sd, "start stream failed while write regs\n");
931 pm_runtime_put(&client->dev);
932 goto unlock_and_return;
933 }
934 } else {
935 __sc223a_stop_stream(sc223a);
936 pm_runtime_put(&client->dev);
937 }
938
939 sc223a->streaming = on;
940 unlock_and_return:
941 mutex_unlock(&sc223a->mutex);
942 return ret;
943 }
944
sc223a_s_power(struct v4l2_subdev * sd,int on)945 static int sc223a_s_power(struct v4l2_subdev *sd, int on)
946 {
947 struct sc223a *sc223a = to_sc223a(sd);
948 struct i2c_client *client = sc223a->client;
949 int ret = 0;
950
951 mutex_lock(&sc223a->mutex);
952
953 /* If the power state is not modified - no work to do. */
954 if (sc223a->power_on == !!on)
955 goto unlock_and_return;
956
957 if (on) {
958 ret = pm_runtime_get_sync(&client->dev);
959 if (ret < 0) {
960 pm_runtime_put_noidle(&client->dev);
961 goto unlock_and_return;
962 }
963
964 if (!sc223a->is_thunderboot) {
965 ret = sc223a_write_array(sc223a->client, sc223a_global_regs);
966 if (ret) {
967 v4l2_err(sd, "could not set init registers\n");
968 pm_runtime_put_noidle(&client->dev);
969 goto unlock_and_return;
970 }
971 }
972
973 sc223a->power_on = true;
974 } else {
975 pm_runtime_put(&client->dev);
976 sc223a->power_on = false;
977 }
978
979 unlock_and_return:
980 mutex_unlock(&sc223a->mutex);
981
982 return ret;
983 }
984
985 /* Calculate the delay in us by clock rate and clock cycles */
sc223a_cal_delay(u32 cycles)986 static inline u32 sc223a_cal_delay(u32 cycles)
987 {
988 return DIV_ROUND_UP(cycles, SC223A_XVCLK_FREQ / 1000 / 1000);
989 }
990
__sc223a_power_on(struct sc223a * sc223a)991 static int __sc223a_power_on(struct sc223a *sc223a)
992 {
993 int ret;
994 u32 delay_us;
995 struct device *dev = &sc223a->client->dev;
996
997 if (!IS_ERR_OR_NULL(sc223a->pins_default)) {
998 ret = pinctrl_select_state(sc223a->pinctrl,
999 sc223a->pins_default);
1000 if (ret < 0)
1001 dev_err(dev, "could not set pins\n");
1002 }
1003 ret = clk_set_rate(sc223a->xvclk, SC223A_XVCLK_FREQ);
1004 if (ret < 0)
1005 dev_warn(dev, "Failed to set xvclk rate (24MHz)\n");
1006 if (clk_get_rate(sc223a->xvclk) != SC223A_XVCLK_FREQ)
1007 dev_warn(dev, "xvclk mismatched, modes are based on 24MHz\n");
1008 ret = clk_prepare_enable(sc223a->xvclk);
1009 if (ret < 0) {
1010 dev_err(dev, "Failed to enable xvclk\n");
1011 return ret;
1012 }
1013
1014 if (sc223a->is_thunderboot)
1015 return 0;
1016
1017 if (!IS_ERR(sc223a->reset_gpio))
1018 gpiod_set_value_cansleep(sc223a->reset_gpio, 0);
1019
1020 ret = regulator_bulk_enable(SC223A_NUM_SUPPLIES, sc223a->supplies);
1021 if (ret < 0) {
1022 dev_err(dev, "Failed to enable regulators\n");
1023 goto disable_clk;
1024 }
1025
1026 if (!IS_ERR(sc223a->reset_gpio))
1027 gpiod_set_value_cansleep(sc223a->reset_gpio, 1);
1028
1029 usleep_range(500, 1000);
1030
1031 if (!IS_ERR(sc223a->pwdn_gpio))
1032 gpiod_set_value_cansleep(sc223a->pwdn_gpio, 1);
1033
1034 if (!IS_ERR(sc223a->reset_gpio))
1035 usleep_range(6000, 8000);
1036 else
1037 usleep_range(12000, 16000);
1038
1039 /* 8192 cycles prior to first SCCB transaction */
1040 delay_us = sc223a_cal_delay(8192);
1041 usleep_range(delay_us, delay_us * 2);
1042
1043 return 0;
1044
1045 disable_clk:
1046 clk_disable_unprepare(sc223a->xvclk);
1047
1048 return ret;
1049 }
1050
__sc223a_power_off(struct sc223a * sc223a)1051 static void __sc223a_power_off(struct sc223a *sc223a)
1052 {
1053 int ret;
1054 struct device *dev = &sc223a->client->dev;
1055
1056 clk_disable_unprepare(sc223a->xvclk);
1057 if (sc223a->is_thunderboot) {
1058 if (sc223a->is_first_streamoff) {
1059 sc223a->is_thunderboot = false;
1060 sc223a->is_first_streamoff = false;
1061 } else {
1062 return;
1063 }
1064 }
1065
1066 if (!IS_ERR(sc223a->pwdn_gpio))
1067 gpiod_set_value_cansleep(sc223a->pwdn_gpio, 0);
1068 clk_disable_unprepare(sc223a->xvclk);
1069 if (!IS_ERR(sc223a->reset_gpio))
1070 gpiod_set_value_cansleep(sc223a->reset_gpio, 0);
1071 if (!IS_ERR_OR_NULL(sc223a->pins_sleep)) {
1072 ret = pinctrl_select_state(sc223a->pinctrl,
1073 sc223a->pins_sleep);
1074 if (ret < 0)
1075 dev_dbg(dev, "could not set pins\n");
1076 }
1077 regulator_bulk_disable(SC223A_NUM_SUPPLIES, sc223a->supplies);
1078 }
1079
sc223a_runtime_resume(struct device * dev)1080 static int sc223a_runtime_resume(struct device *dev)
1081 {
1082 struct i2c_client *client = to_i2c_client(dev);
1083 struct v4l2_subdev *sd = i2c_get_clientdata(client);
1084 struct sc223a *sc223a = to_sc223a(sd);
1085
1086 return __sc223a_power_on(sc223a);
1087 }
1088
sc223a_runtime_suspend(struct device * dev)1089 static int sc223a_runtime_suspend(struct device *dev)
1090 {
1091 struct i2c_client *client = to_i2c_client(dev);
1092 struct v4l2_subdev *sd = i2c_get_clientdata(client);
1093 struct sc223a *sc223a = to_sc223a(sd);
1094
1095 __sc223a_power_off(sc223a);
1096
1097 return 0;
1098 }
1099
1100 #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
sc223a_open(struct v4l2_subdev * sd,struct v4l2_subdev_fh * fh)1101 static int sc223a_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
1102 {
1103 struct sc223a *sc223a = to_sc223a(sd);
1104 struct v4l2_mbus_framefmt *try_fmt =
1105 v4l2_subdev_get_try_format(sd, fh->pad, 0);
1106 const struct sc223a_mode *def_mode = &supported_modes[0];
1107
1108 mutex_lock(&sc223a->mutex);
1109 /* Initialize try_fmt */
1110 try_fmt->width = def_mode->width;
1111 try_fmt->height = def_mode->height;
1112 try_fmt->code = def_mode->bus_fmt;
1113 try_fmt->field = V4L2_FIELD_NONE;
1114
1115 mutex_unlock(&sc223a->mutex);
1116 /* No crop or compose */
1117
1118 return 0;
1119 }
1120 #endif
1121
sc223a_enum_frame_interval(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_frame_interval_enum * fie)1122 static int sc223a_enum_frame_interval(struct v4l2_subdev *sd,
1123 struct v4l2_subdev_pad_config *cfg,
1124 struct v4l2_subdev_frame_interval_enum *fie)
1125 {
1126 if (fie->index >= ARRAY_SIZE(supported_modes))
1127 return -EINVAL;
1128
1129 fie->code = supported_modes[fie->index].bus_fmt;
1130 fie->width = supported_modes[fie->index].width;
1131 fie->height = supported_modes[fie->index].height;
1132 fie->interval = supported_modes[fie->index].max_fps;
1133 fie->reserved[0] = supported_modes[fie->index].hdr_mode;
1134 return 0;
1135 }
1136
1137 static const struct dev_pm_ops sc223a_pm_ops = {
1138 SET_RUNTIME_PM_OPS(sc223a_runtime_suspend,
1139 sc223a_runtime_resume, NULL)
1140 };
1141
1142 #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
1143 static const struct v4l2_subdev_internal_ops sc223a_internal_ops = {
1144 .open = sc223a_open,
1145 };
1146 #endif
1147
1148 static const struct v4l2_subdev_core_ops sc223a_core_ops = {
1149 .s_power = sc223a_s_power,
1150 .ioctl = sc223a_ioctl,
1151 #ifdef CONFIG_COMPAT
1152 .compat_ioctl32 = sc223a_compat_ioctl32,
1153 #endif
1154 };
1155
1156 static const struct v4l2_subdev_video_ops sc223a_video_ops = {
1157 .s_stream = sc223a_s_stream,
1158 .g_frame_interval = sc223a_g_frame_interval,
1159 };
1160
1161 static const struct v4l2_subdev_pad_ops sc223a_pad_ops = {
1162 .enum_mbus_code = sc223a_enum_mbus_code,
1163 .enum_frame_size = sc223a_enum_frame_sizes,
1164 .enum_frame_interval = sc223a_enum_frame_interval,
1165 .get_fmt = sc223a_get_fmt,
1166 .set_fmt = sc223a_set_fmt,
1167 .get_mbus_config = sc223a_g_mbus_config,
1168 };
1169
1170 static const struct v4l2_subdev_ops sc223a_subdev_ops = {
1171 .core = &sc223a_core_ops,
1172 .video = &sc223a_video_ops,
1173 .pad = &sc223a_pad_ops,
1174 };
1175
sc223a_modify_fps_info(struct sc223a * sc223a)1176 static void sc223a_modify_fps_info(struct sc223a *sc223a)
1177 {
1178 const struct sc223a_mode *mode = sc223a->cur_mode;
1179
1180 sc223a->cur_fps.denominator = mode->max_fps.denominator * mode->vts_def /
1181 sc223a->cur_vts;
1182 }
1183
sc223a_set_ctrl(struct v4l2_ctrl * ctrl)1184 static int sc223a_set_ctrl(struct v4l2_ctrl *ctrl)
1185 {
1186 struct sc223a *sc223a = container_of(ctrl->handler,
1187 struct sc223a, ctrl_handler);
1188 struct i2c_client *client = sc223a->client;
1189 s64 max;
1190 int ret = 0;
1191 u32 val = 0;
1192
1193 /* Propagate change of current control to all related controls */
1194 switch (ctrl->id) {
1195 case V4L2_CID_VBLANK:
1196 /* Update max exposure while meeting expected vblanking */
1197 max = sc223a->cur_mode->height + ctrl->val - 10;
1198 __v4l2_ctrl_modify_range(sc223a->exposure,
1199 sc223a->exposure->minimum, max,
1200 sc223a->exposure->step,
1201 sc223a->exposure->default_value);
1202 break;
1203 }
1204
1205 if (!pm_runtime_get_if_in_use(&client->dev))
1206 return 0;
1207
1208 switch (ctrl->id) {
1209 case V4L2_CID_EXPOSURE:
1210 dev_dbg(&client->dev, "set exposure 0x%x\n", ctrl->val);
1211 if (sc223a->cur_mode->hdr_mode == NO_HDR) {
1212 val = ctrl->val * 2;
1213 /* 4 least significant bits of expsoure are fractional part */
1214 ret = sc223a_write_reg(sc223a->client,
1215 SC223A_REG_EXPOSURE_H,
1216 SC223A_REG_VALUE_08BIT,
1217 SC223A_FETCH_EXP_H(val));
1218 ret |= sc223a_write_reg(sc223a->client,
1219 SC223A_REG_EXPOSURE_M,
1220 SC223A_REG_VALUE_08BIT,
1221 SC223A_FETCH_EXP_M(val));
1222 ret |= sc223a_write_reg(sc223a->client,
1223 SC223A_REG_EXPOSURE_L,
1224 SC223A_REG_VALUE_08BIT,
1225 SC223A_FETCH_EXP_L(val));
1226 }
1227 break;
1228 case V4L2_CID_ANALOGUE_GAIN:
1229 dev_dbg(&client->dev, "set gain 0x%x\n", ctrl->val);
1230 if (sc223a->cur_mode->hdr_mode == NO_HDR)
1231 ret = sc223a_set_gain_reg(sc223a, ctrl->val);
1232 break;
1233 case V4L2_CID_VBLANK:
1234 dev_dbg(&client->dev, "set vblank 0x%x\n", ctrl->val);
1235 ret = sc223a_write_reg(sc223a->client,
1236 SC223A_REG_VTS_H,
1237 SC223A_REG_VALUE_08BIT,
1238 (ctrl->val + sc223a->cur_mode->height)
1239 >> 8);
1240 ret |= sc223a_write_reg(sc223a->client,
1241 SC223A_REG_VTS_L,
1242 SC223A_REG_VALUE_08BIT,
1243 (ctrl->val + sc223a->cur_mode->height)
1244 & 0xff);
1245 sc223a->cur_vts = ctrl->val + sc223a->cur_mode->height;
1246 sc223a_modify_fps_info(sc223a);
1247 break;
1248 case V4L2_CID_TEST_PATTERN:
1249 ret = sc223a_enable_test_pattern(sc223a, ctrl->val);
1250 break;
1251 case V4L2_CID_HFLIP:
1252 ret = sc223a_read_reg(sc223a->client, SC223A_FLIP_MIRROR_REG,
1253 SC223A_REG_VALUE_08BIT, &val);
1254 ret |= sc223a_write_reg(sc223a->client, SC223A_FLIP_MIRROR_REG,
1255 SC223A_REG_VALUE_08BIT,
1256 SC223A_FETCH_MIRROR(val, ctrl->val));
1257 break;
1258 case V4L2_CID_VFLIP:
1259 ret = sc223a_read_reg(sc223a->client, SC223A_FLIP_MIRROR_REG,
1260 SC223A_REG_VALUE_08BIT, &val);
1261 ret |= sc223a_write_reg(sc223a->client, SC223A_FLIP_MIRROR_REG,
1262 SC223A_REG_VALUE_08BIT,
1263 SC223A_FETCH_FLIP(val, ctrl->val));
1264 break;
1265 default:
1266 dev_warn(&client->dev, "%s Unhandled id:0x%x, val:0x%x\n",
1267 __func__, ctrl->id, ctrl->val);
1268 break;
1269 }
1270
1271 pm_runtime_put(&client->dev);
1272
1273 return ret;
1274 }
1275
1276 static const struct v4l2_ctrl_ops sc223a_ctrl_ops = {
1277 .s_ctrl = sc223a_set_ctrl,
1278 };
1279
sc223a_initialize_controls(struct sc223a * sc223a)1280 static int sc223a_initialize_controls(struct sc223a *sc223a)
1281 {
1282 const struct sc223a_mode *mode;
1283 struct v4l2_ctrl_handler *handler;
1284 struct v4l2_ctrl *ctrl;
1285 s64 exposure_max, vblank_def;
1286 u32 h_blank;
1287 int ret;
1288
1289 handler = &sc223a->ctrl_handler;
1290 mode = sc223a->cur_mode;
1291 ret = v4l2_ctrl_handler_init(handler, 9);
1292 if (ret)
1293 return ret;
1294 handler->lock = &sc223a->mutex;
1295
1296 ctrl = v4l2_ctrl_new_int_menu(handler, NULL, V4L2_CID_LINK_FREQ,
1297 0, 0, link_freq_menu_items);
1298 if (ctrl)
1299 ctrl->flags |= V4L2_CTRL_FLAG_READ_ONLY;
1300
1301 v4l2_ctrl_new_std(handler, NULL, V4L2_CID_PIXEL_RATE,
1302 0, PIXEL_RATE_WITH_405M_10BIT, 1, PIXEL_RATE_WITH_405M_10BIT);
1303
1304 h_blank = mode->hts_def - mode->width;
1305 sc223a->hblank = v4l2_ctrl_new_std(handler, NULL, V4L2_CID_HBLANK,
1306 h_blank, h_blank, 1, h_blank);
1307 if (sc223a->hblank)
1308 sc223a->hblank->flags |= V4L2_CTRL_FLAG_READ_ONLY;
1309 vblank_def = mode->vts_def - mode->height;
1310 sc223a->vblank = v4l2_ctrl_new_std(handler, &sc223a_ctrl_ops,
1311 V4L2_CID_VBLANK, vblank_def,
1312 SC223A_VTS_MAX - mode->height,
1313 1, vblank_def);
1314 exposure_max = mode->vts_def - 10;
1315 sc223a->exposure = v4l2_ctrl_new_std(handler, &sc223a_ctrl_ops,
1316 V4L2_CID_EXPOSURE, SC223A_EXPOSURE_MIN,
1317 exposure_max, SC223A_EXPOSURE_STEP,
1318 mode->exp_def);
1319 sc223a->anal_gain = v4l2_ctrl_new_std(handler, &sc223a_ctrl_ops,
1320 V4L2_CID_ANALOGUE_GAIN, SC223A_GAIN_MIN,
1321 SC223A_GAIN_MAX, SC223A_GAIN_STEP,
1322 SC223A_GAIN_DEFAULT);
1323 sc223a->test_pattern = v4l2_ctrl_new_std_menu_items(handler,
1324 &sc223a_ctrl_ops,
1325 V4L2_CID_TEST_PATTERN,
1326 ARRAY_SIZE(sc223a_test_pattern_menu) - 1,
1327 0, 0, sc223a_test_pattern_menu);
1328 v4l2_ctrl_new_std(handler, &sc223a_ctrl_ops,
1329 V4L2_CID_HFLIP, 0, 1, 1, 0);
1330 v4l2_ctrl_new_std(handler, &sc223a_ctrl_ops,
1331 V4L2_CID_VFLIP, 0, 1, 1, 0);
1332 if (handler->error) {
1333 ret = handler->error;
1334 dev_err(&sc223a->client->dev,
1335 "Failed to init controls(%d)\n", ret);
1336 goto err_free_handler;
1337 }
1338
1339 sc223a->subdev.ctrl_handler = handler;
1340 sc223a->has_init_exp = false;
1341 sc223a->cur_fps = mode->max_fps;
1342
1343 return 0;
1344
1345 err_free_handler:
1346 v4l2_ctrl_handler_free(handler);
1347
1348 return ret;
1349 }
1350
sc223a_check_sensor_id(struct sc223a * sc223a,struct i2c_client * client)1351 static int sc223a_check_sensor_id(struct sc223a *sc223a,
1352 struct i2c_client *client)
1353 {
1354 struct device *dev = &sc223a->client->dev;
1355 u32 id = 0;
1356 int ret;
1357
1358 if (sc223a->is_thunderboot) {
1359 dev_info(dev, "Enable thunderboot mode, skip sensor id check\n");
1360 return 0;
1361 }
1362
1363 ret = sc223a_read_reg(client, SC223A_REG_CHIP_ID,
1364 SC223A_REG_VALUE_16BIT, &id);
1365 if (id != CHIP_ID) {
1366 dev_err(dev, "Unexpected sensor id(%06x), ret(%d)\n", id, ret);
1367 return -ENODEV;
1368 }
1369
1370 dev_info(dev, "Detected OV%06x sensor\n", CHIP_ID);
1371
1372 return 0;
1373 }
1374
sc223a_configure_regulators(struct sc223a * sc223a)1375 static int sc223a_configure_regulators(struct sc223a *sc223a)
1376 {
1377 unsigned int i;
1378
1379 for (i = 0; i < SC223A_NUM_SUPPLIES; i++)
1380 sc223a->supplies[i].supply = sc223a_supply_names[i];
1381
1382 return devm_regulator_bulk_get(&sc223a->client->dev,
1383 SC223A_NUM_SUPPLIES,
1384 sc223a->supplies);
1385 }
1386
sc223a_probe(struct i2c_client * client,const struct i2c_device_id * id)1387 static int sc223a_probe(struct i2c_client *client,
1388 const struct i2c_device_id *id)
1389 {
1390 struct device *dev = &client->dev;
1391 struct device_node *node = dev->of_node;
1392 struct sc223a *sc223a;
1393 struct v4l2_subdev *sd;
1394 char facing[2];
1395 int ret;
1396 int i, hdr_mode = 0;
1397
1398 dev_info(dev, "driver version: %02x.%02x.%02x",
1399 DRIVER_VERSION >> 16,
1400 (DRIVER_VERSION & 0xff00) >> 8,
1401 DRIVER_VERSION & 0x00ff);
1402
1403 sc223a = devm_kzalloc(dev, sizeof(*sc223a), GFP_KERNEL);
1404 if (!sc223a)
1405 return -ENOMEM;
1406
1407 ret = of_property_read_u32(node, RKMODULE_CAMERA_MODULE_INDEX,
1408 &sc223a->module_index);
1409 ret |= of_property_read_string(node, RKMODULE_CAMERA_MODULE_FACING,
1410 &sc223a->module_facing);
1411 ret |= of_property_read_string(node, RKMODULE_CAMERA_MODULE_NAME,
1412 &sc223a->module_name);
1413 ret |= of_property_read_string(node, RKMODULE_CAMERA_LENS_NAME,
1414 &sc223a->len_name);
1415 if (ret) {
1416 dev_err(dev, "could not get module information!\n");
1417 return -EINVAL;
1418 }
1419
1420 sc223a->is_thunderboot = IS_ENABLED(CONFIG_VIDEO_ROCKCHIP_THUNDER_BOOT_ISP);
1421
1422 sc223a->client = client;
1423 for (i = 0; i < ARRAY_SIZE(supported_modes); i++) {
1424 if (hdr_mode == supported_modes[i].hdr_mode) {
1425 sc223a->cur_mode = &supported_modes[i];
1426 break;
1427 }
1428 }
1429 if (i == ARRAY_SIZE(supported_modes))
1430 sc223a->cur_mode = &supported_modes[0];
1431
1432 sc223a->xvclk = devm_clk_get(dev, "xvclk");
1433 if (IS_ERR(sc223a->xvclk)) {
1434 dev_err(dev, "Failed to get xvclk\n");
1435 return -EINVAL;
1436 }
1437
1438 if (sc223a->is_thunderboot) {
1439 sc223a->reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_ASIS);
1440 if (IS_ERR(sc223a->reset_gpio))
1441 dev_warn(dev, "Failed to get reset-gpios\n");
1442
1443 sc223a->pwdn_gpio = devm_gpiod_get(dev, "pwdn", GPIOD_ASIS);
1444 if (IS_ERR(sc223a->pwdn_gpio))
1445 dev_warn(dev, "Failed to get pwdn-gpios\n");
1446 } else {
1447 sc223a->reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_LOW);
1448 if (IS_ERR(sc223a->reset_gpio))
1449 dev_warn(dev, "Failed to get reset-gpios\n");
1450
1451 sc223a->pwdn_gpio = devm_gpiod_get(dev, "pwdn", GPIOD_OUT_LOW);
1452 if (IS_ERR(sc223a->pwdn_gpio))
1453 dev_warn(dev, "Failed to get pwdn-gpios\n");
1454 }
1455
1456 sc223a->pinctrl = devm_pinctrl_get(dev);
1457 if (!IS_ERR(sc223a->pinctrl)) {
1458 sc223a->pins_default =
1459 pinctrl_lookup_state(sc223a->pinctrl,
1460 OF_CAMERA_PINCTRL_STATE_DEFAULT);
1461 if (IS_ERR(sc223a->pins_default))
1462 dev_err(dev, "could not get default pinstate\n");
1463
1464 sc223a->pins_sleep =
1465 pinctrl_lookup_state(sc223a->pinctrl,
1466 OF_CAMERA_PINCTRL_STATE_SLEEP);
1467 if (IS_ERR(sc223a->pins_sleep))
1468 dev_err(dev, "could not get sleep pinstate\n");
1469 } else {
1470 dev_err(dev, "no pinctrl\n");
1471 }
1472
1473 ret = sc223a_configure_regulators(sc223a);
1474 if (ret) {
1475 dev_err(dev, "Failed to get power regulators\n");
1476 return ret;
1477 }
1478
1479 mutex_init(&sc223a->mutex);
1480
1481 sd = &sc223a->subdev;
1482 v4l2_i2c_subdev_init(sd, client, &sc223a_subdev_ops);
1483 ret = sc223a_initialize_controls(sc223a);
1484 if (ret)
1485 goto err_destroy_mutex;
1486
1487 ret = __sc223a_power_on(sc223a);
1488 if (ret)
1489 goto err_free_handler;
1490
1491 ret = sc223a_check_sensor_id(sc223a, client);
1492 if (ret)
1493 goto err_power_off;
1494
1495 #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
1496 sd->internal_ops = &sc223a_internal_ops;
1497 sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE |
1498 V4L2_SUBDEV_FL_HAS_EVENTS;
1499 #endif
1500 #if defined(CONFIG_MEDIA_CONTROLLER)
1501 sc223a->pad.flags = MEDIA_PAD_FL_SOURCE;
1502 sd->entity.function = MEDIA_ENT_F_CAM_SENSOR;
1503 ret = media_entity_pads_init(&sd->entity, 1, &sc223a->pad);
1504 if (ret < 0)
1505 goto err_power_off;
1506 #endif
1507
1508 memset(facing, 0, sizeof(facing));
1509 if (strcmp(sc223a->module_facing, "back") == 0)
1510 facing[0] = 'b';
1511 else
1512 facing[0] = 'f';
1513
1514 snprintf(sd->name, sizeof(sd->name), "m%02d_%s_%s %s",
1515 sc223a->module_index, facing,
1516 SC223A_NAME, dev_name(sd->dev));
1517 ret = v4l2_async_register_subdev_sensor_common(sd);
1518 if (ret) {
1519 dev_err(dev, "v4l2 async register subdev failed\n");
1520 goto err_clean_entity;
1521 }
1522
1523 pm_runtime_set_active(dev);
1524 pm_runtime_enable(dev);
1525 if (sc223a->is_thunderboot)
1526 pm_runtime_get_sync(dev);
1527 else
1528 pm_runtime_idle(dev);
1529
1530 return 0;
1531
1532 err_clean_entity:
1533 #if defined(CONFIG_MEDIA_CONTROLLER)
1534 media_entity_cleanup(&sd->entity);
1535 #endif
1536 err_power_off:
1537 __sc223a_power_off(sc223a);
1538 err_free_handler:
1539 v4l2_ctrl_handler_free(&sc223a->ctrl_handler);
1540 err_destroy_mutex:
1541 mutex_destroy(&sc223a->mutex);
1542
1543 return ret;
1544 }
1545
sc223a_remove(struct i2c_client * client)1546 static int sc223a_remove(struct i2c_client *client)
1547 {
1548 struct v4l2_subdev *sd = i2c_get_clientdata(client);
1549 struct sc223a *sc223a = to_sc223a(sd);
1550
1551 v4l2_async_unregister_subdev(sd);
1552 #if defined(CONFIG_MEDIA_CONTROLLER)
1553 media_entity_cleanup(&sd->entity);
1554 #endif
1555 v4l2_ctrl_handler_free(&sc223a->ctrl_handler);
1556 mutex_destroy(&sc223a->mutex);
1557
1558 pm_runtime_disable(&client->dev);
1559 if (!pm_runtime_status_suspended(&client->dev))
1560 __sc223a_power_off(sc223a);
1561 pm_runtime_set_suspended(&client->dev);
1562
1563 return 0;
1564 }
1565
1566 #if IS_ENABLED(CONFIG_OF)
1567 static const struct of_device_id sc223a_of_match[] = {
1568 { .compatible = "smartsens,sc223a" },
1569 {},
1570 };
1571 MODULE_DEVICE_TABLE(of, sc223a_of_match);
1572 #endif
1573
1574 static const struct i2c_device_id sc223a_match_id[] = {
1575 { "smartsens,sc223a", 0 },
1576 { },
1577 };
1578
1579 static struct i2c_driver sc223a_i2c_driver = {
1580 .driver = {
1581 .name = SC223A_NAME,
1582 .pm = &sc223a_pm_ops,
1583 .of_match_table = of_match_ptr(sc223a_of_match),
1584 },
1585 .probe = &sc223a_probe,
1586 .remove = &sc223a_remove,
1587 .id_table = sc223a_match_id,
1588 };
1589
sensor_mod_init(void)1590 static int __init sensor_mod_init(void)
1591 {
1592 return i2c_add_driver(&sc223a_i2c_driver);
1593 }
1594
sensor_mod_exit(void)1595 static void __exit sensor_mod_exit(void)
1596 {
1597 i2c_del_driver(&sc223a_i2c_driver);
1598 }
1599
1600 #if defined(CONFIG_VIDEO_ROCKCHIP_THUNDER_BOOT_ISP) && !defined(CONFIG_INITCALL_ASYNC)
1601 subsys_initcall(sensor_mod_init);
1602 #else
1603 device_initcall_sync(sensor_mod_init);
1604 #endif
1605 module_exit(sensor_mod_exit);
1606
1607 MODULE_DESCRIPTION("smartsens sc223a sensor driver");
1608 MODULE_LICENSE("GPL");
1609