1 // SPDX-License-Identifier: GPL-2.0
2 /*
3 * ov9750 driver
4 *
5 * Copyright (C) 2017 Fuzhou Rockchip Electronics Co., Ltd.
6 * V0.0X01.0X02 fix mclk issue when probe multiple camera.
7 * V0.0X01.0X03 add enum_frame_interval function.
8 * V0.0X01.0X04 add quick stream on/off
9 * V0.0X01.0X05 add function g_mbus_config
10 */
11
12 #include <linux/clk.h>
13 #include <linux/device.h>
14 #include <linux/delay.h>
15 #include <linux/gpio/consumer.h>
16 #include <linux/i2c.h>
17 #include <linux/module.h>
18 #include <linux/pm_runtime.h>
19 #include <linux/regulator/consumer.h>
20 #include <linux/sysfs.h>
21 #include <linux/slab.h>
22 #include <linux/rk-camera-module.h>
23 #include <media/media-entity.h>
24 #include <media/v4l2-async.h>
25 #include <media/v4l2-ctrls.h>
26 #include <media/v4l2-subdev.h>
27 #include <linux/pinctrl/consumer.h>
28 #include <linux/version.h>
29
30 #define DRIVER_VERSION KERNEL_VERSION(0, 0x01, 0x5)
31
32 #ifndef V4L2_CID_DIGITAL_GAIN
33 #define V4L2_CID_DIGITAL_GAIN V4L2_CID_GAIN
34 #endif
35
36 #define OV9750_LINK_FREQ_400MHZ 400000000
37 /* pixel rate = link frequency * 2 * lanes / BITS_PER_SAMPLE */
38 #define OV9750_PIXEL_RATE (OV9750_LINK_FREQ_400MHZ * 2 * 2 / 10)
39 #define OV9750_XVCLK_FREQ 24000000
40
41 #define CHIP_ID 0x9750
42 #define OV9750_REG_CHIP_ID 0x300B
43
44 #define OV9750_REG_CTRL_MODE 0x0100
45 #define OV9750_MODE_SW_STANDBY 0x0
46 #define OV9750_MODE_STREAMING BIT(0)
47
48 #define OV9750_REG_EXPOSURE 0x3500
49 #define OV9750_EXPOSURE_MIN 4
50 #define OV9750_EXPOSURE_STEP 1
51 #define OV9750_VTS_MAX 0x7fff
52
53 #define OV9750_REG_GAIN_H 0x3508
54 #define OV9750_REG_GAIN_L 0x3509
55 #define OV9750_GAIN_H_MASK 0x1f
56 #define OV9750_GAIN_L_MASK 0xff
57 #define OV9750_GAIN_MIN 0x0080
58 #define OV9750_GAIN_MAX 0x1000
59 #define OV9750_GAIN_STEP 1
60 #define OV9750_GAIN_DEFAULT 0x0080
61
62 #define OV9750_REG_TEST_PATTERN 0x5e00
63 #define OV9750_TEST_PATTERN_ENABLE 0x80
64 #define OV9750_TEST_PATTERN_DISABLE 0x0
65
66 #define OV9750_REG_VTS 0x380e
67
68 #define REG_NULL 0xFFFF
69 #define REG_DELAY 0xFFFE
70
71 #define OV9750_REG_VALUE_08BIT 1
72 #define OV9750_REG_VALUE_16BIT 2
73 #define OV9750_REG_VALUE_24BIT 3
74
75 #define OV9750_LANES 2
76 #define OV9750_BITS_PER_SAMPLE 10
77
78 #define OF_CAMERA_PINCTRL_STATE_DEFAULT "rockchip,camera_default"
79 #define OF_CAMERA_PINCTRL_STATE_SLEEP "rockchip,camera_sleep"
80
81 #define OV9750_NAME "ov9750"
82
83 static const char * const ov9750_supply_names[] = {
84 "avdd", /* Analog power */
85 "dovdd", /* Digital I/O power */
86 "dvdd", /* Digital core power */
87 };
88
89 #define OV9750_NUM_SUPPLIES ARRAY_SIZE(ov9750_supply_names)
90
91 struct regval {
92 u16 addr;
93 u8 val;
94 };
95
96 struct ov9750_mode {
97 u32 width;
98 u32 height;
99 struct v4l2_fract max_fps;
100 u32 hts_def;
101 u32 vts_def;
102 u32 exp_def;
103 const struct regval *reg_list;
104 };
105
106 struct ov9750 {
107 struct i2c_client *client;
108 struct clk *xvclk;
109 struct gpio_desc *reset_gpio;
110 struct gpio_desc *pwdn_gpio;
111 struct regulator_bulk_data supplies[OV9750_NUM_SUPPLIES];
112
113 struct pinctrl *pinctrl;
114 struct pinctrl_state *pins_default;
115 struct pinctrl_state *pins_sleep;
116
117 struct v4l2_subdev subdev;
118 struct media_pad pad;
119 struct v4l2_ctrl_handler ctrl_handler;
120 struct v4l2_ctrl *exposure;
121 struct v4l2_ctrl *anal_gain;
122 struct v4l2_ctrl *digi_gain;
123 struct v4l2_ctrl *hblank;
124 struct v4l2_ctrl *vblank;
125 struct v4l2_ctrl *test_pattern;
126 struct mutex mutex;
127 bool streaming;
128 bool power_on;
129 const struct ov9750_mode *cur_mode;
130 u32 module_index;
131 const char *module_facing;
132 const char *module_name;
133 const char *len_name;
134 };
135
136 #define to_ov9750(sd) container_of(sd, struct ov9750, subdev)
137
138 /*
139 * Xclk 24Mhz
140 */
141 static const struct regval ov9750_global_regs[] = {
142 {0x0103, 0x01},
143 {REG_DELAY, 0x10},
144 {0x0100, 0x00},
145 {REG_DELAY, 0x10},
146 {0x0300, 0x04},
147 {0x0302, 0x64},
148 {0x0303, 0x00},
149 {0x0304, 0x03},
150 {0x0305, 0x01},
151 {0x0306, 0x01},
152 {0x030a, 0x00},
153 {0x030b, 0x00},
154 {0x030d, 0x1e},
155 {0x030e, 0x01},
156 {0x030f, 0x04},
157 {0x0312, 0x01},
158 {0x031e, 0x04},
159 {0x3000, 0x00},
160 {0x3001, 0x00},
161 {0x3002, 0x21},
162 {0x3005, 0xf0},
163 {0x3011, 0x00},
164 {0x3016, 0x53},
165 {0x3018, 0x32},
166 {0x301a, 0xf0},
167 {0x301b, 0xf0},
168 {0x301c, 0xf0},
169 {0x301d, 0xf0},
170 {0x301e, 0xf0},
171 {0x3022, 0x01},
172 {0x3031, 0x0a},
173 {0x3032, 0x80},
174 {0x303c, 0xff},
175 {0x303e, 0xff},
176 {0x3040, 0xf0},
177 {0x3041, 0x00},
178 {0x3042, 0xf0},
179 {0x3104, 0x01},
180 {0x3106, 0x15},
181 {0x3107, 0x01},
182 {0x3500, 0x00},
183 {0x3501, 0x3d},
184 {0x3502, 0x00},
185 {0x3503, 0x08},
186 {0x3504, 0x03},
187 {0x3505, 0x83},
188 {0x3508, 0x02},
189 {0x3509, 0x80},
190 {0x3600, 0x65},
191 {0x3601, 0x60},
192 {0x3602, 0x22},
193 {0x3610, 0xe8},
194 {0x3611, 0x56},
195 {0x3612, 0x48},
196 {0x3613, 0x5a},
197 {0x3614, 0x91},
198 {0x3615, 0x79},
199 {0x3617, 0x57},
200 {0x3621, 0x90},
201 {0x3622, 0x00},
202 {0x3623, 0x00},
203 {0x3625, 0x07},
204 {0x3633, 0x10},
205 {0x3634, 0x10},
206 {0x3635, 0x14},
207 {0x3636, 0x13},
208 {0x3650, 0x00},
209 {0x3652, 0xff},
210 {0x3654, 0x00},
211 {0x3653, 0x34},
212 {0x3655, 0x20},
213 {0x3656, 0xff},
214 {0x3657, 0xc4},
215 {0x365a, 0xff},
216 {0x365b, 0xff},
217 {0x365e, 0xff},
218 {0x365f, 0x00},
219 {0x3668, 0x00},
220 {0x366a, 0x07},
221 {0x366d, 0x00},
222 {0x366e, 0x10},
223 {0x3702, 0x1d},
224 {0x3703, 0x10},
225 {0x3704, 0x14},
226 {0x3705, 0x00},
227 {0x3706, 0x27},
228 {0x3709, 0x24},
229 {0x370a, 0x00},
230 {0x370b, 0x7d},
231 {0x3714, 0x24},
232 {0x371a, 0x5e},
233 {0x3730, 0x82},
234 {0x3733, 0x10},
235 {0x373e, 0x18},
236 {0x3755, 0x00},
237 {0x3758, 0x00},
238 {0x375b, 0x13},
239 {0x3772, 0x23},
240 {0x3773, 0x05},
241 {0x3774, 0x16},
242 {0x3775, 0x12},
243 {0x3776, 0x08},
244 {0x37a8, 0x38},
245 {0x37b5, 0x36},
246 {0x37c2, 0x04},
247 {0x37c5, 0x00},
248 {0x37c7, 0x38},
249 {0x37c8, 0x00},
250 {0x37d1, 0x13},
251 {0x3800, 0x00},
252 {0x3801, 0x00},
253 {0x3802, 0x00},
254 {0x3803, 0x04},
255 {0x3804, 0x05},
256 {0x3805, 0x0f},
257 {0x3806, 0x03},
258 {0x3807, 0xcb},
259 {0x3808, 0x05},
260 {0x3809, 0x00},
261 {0x380a, 0x03},
262 {0x380b, 0xc0},
263 {0x380c, 0x03},
264 {0x380d, 0x2a},
265 {0x380e, 0x03},
266 {0x380f, 0xdc},
267 {0x3810, 0x00},
268 {0x3811, 0x08},
269 {0x3812, 0x00},
270 {0x3813, 0x04},
271 {0x3814, 0x01},
272 {0x3815, 0x01},
273 {0x3816, 0x00},
274 {0x3817, 0x00},
275 {0x3818, 0x00},
276 {0x3819, 0x00},
277 {0x3820, 0x80},
278 {0x3821, 0x40},
279 {0x3826, 0x00},
280 {0x3827, 0x08},
281 {0x382a, 0x01},
282 {0x382b, 0x01},
283 {0x3836, 0x02},
284 {0x3838, 0x10},
285 {0x3861, 0x00},
286 {0x3862, 0x00},
287 {0x3863, 0x02},
288 {0x3b00, 0x00},
289 {0x3c00, 0x89},
290 {0x3c01, 0xab},
291 {0x3c02, 0x01},
292 {0x3c03, 0x00},
293 {0x3c04, 0x00},
294 {0x3c05, 0x03},
295 {0x3c06, 0x00},
296 {0x3c07, 0x05},
297 {0x3c0c, 0x00},
298 {0x3c0d, 0x00},
299 {0x3c0e, 0x00},
300 {0x3c0f, 0x00},
301 {0x3c40, 0x00},
302 {0x3c41, 0xa3},
303 {0x3c43, 0x7d},
304 {0x3c56, 0x80},
305 {0x3c80, 0x08},
306 {0x3c82, 0x01},
307 {0x3c83, 0x61},
308 {0x3d85, 0x17},
309 {0x3f08, 0x08},
310 {0x3f0a, 0x00},
311 {0x3f0b, 0x30},
312 {0x4000, 0xcd},
313 {0x4003, 0x40},
314 {0x4009, 0x0d},
315 {0x4010, 0xf0},
316 {0x4011, 0x70},
317 {0x4017, 0x10},
318 {0x4040, 0x00},
319 {0x4041, 0x00},
320 {0x4303, 0x00},
321 {0x4307, 0x30},
322 {0x4500, 0x30},
323 {0x4502, 0x40},
324 {0x4503, 0x06},
325 {0x4508, 0xaa},
326 {0x450b, 0x00},
327 {0x450c, 0x00},
328 {0x4600, 0x00},
329 {0x4601, 0x80},
330 {0x4700, 0x04},
331 {0x4704, 0x00},
332 {0x4705, 0x04},
333 {0x4837, 0x14},
334 {0x484a, 0x3f},
335 {0x5000, 0x10},
336 {0x5001, 0x01},
337 {0x5002, 0x28},
338 {0x5004, 0x0c},
339 {0x5006, 0x0c},
340 {0x5007, 0xe0},
341 {0x5008, 0x01},
342 {0x5009, 0xb0},
343 {0x502a, 0x18},
344 {0x5901, 0x00},
345 {0x5a01, 0x00},
346 {0x5a03, 0x00},
347 {0x5a04, 0x0c},
348 {0x5a05, 0xe0},
349 {0x5a06, 0x09},
350 {0x5a07, 0xb0},
351 {0x5a08, 0x06},
352 {0x5e00, 0x00},
353 {0x5e10, 0xfc},
354 {0x300f, 0x00},
355 {0x3733, 0x10},
356 {0x3610, 0xe8},
357 {0x3611, 0x56},
358 {0x3635, 0x14},
359 {0x3636, 0x13},
360 {0x3620, 0x84},
361 {0x3614, 0x96},
362 {0x481f, 0x30},
363 {0x3788, 0x00},
364 {0x3789, 0x04},
365 {0x378a, 0x01},
366 {0x378b, 0x60},
367 {0x3799, 0x27},
368 {REG_NULL, 0x00},
369 };
370
371 /*
372 * Xclk 24Mhz
373 * max_framerate 60fps
374 * mipi_datarate per lane 800Mbps
375 */
376 static const struct regval ov9750_1280x960_regs[] = {
377 {REG_NULL, 0x00},
378 };
379
380 static const struct ov9750_mode supported_modes[] = {
381 {
382 .width = 1280,
383 .height = 960,
384 .max_fps = {
385 .numerator = 10000,
386 .denominator = 600000,
387 },
388 .exp_def = 0x03D0,
389 .hts_def = 0x0654,//0x32A*2
390 .vts_def = 0x03DC,
391 .reg_list = ov9750_1280x960_regs,
392 },
393 };
394
395 static const s64 link_freq_menu_items[] = {
396 OV9750_LINK_FREQ_400MHZ
397 };
398
399 static const char * const ov9750_test_pattern_menu[] = {
400 "Disabled",
401 "Vertical Color Bar Type 1",
402 "Vertical Color Bar Type 2",
403 "Vertical Color Bar Type 3",
404 "Vertical Color Bar Type 4"
405 };
406
407 /* Write registers up to 4 at a time */
ov9750_write_reg(struct i2c_client * client,u16 reg,u32 len,u32 val)408 static int ov9750_write_reg(struct i2c_client *client, u16 reg,
409 u32 len, u32 val)
410 {
411 u32 buf_i, val_i;
412 u8 buf[6];
413 u8 *val_p;
414 __be32 val_be;
415
416 if (len > 4)
417 return -EINVAL;
418
419 buf[0] = reg >> 8;
420 buf[1] = reg & 0xff;
421
422 val_be = cpu_to_be32(val);
423 val_p = (u8 *)&val_be;
424 buf_i = 2;
425 val_i = 4 - len;
426
427 while (val_i < 4)
428 buf[buf_i++] = val_p[val_i++];
429
430 if (i2c_master_send(client, buf, len + 2) != len + 2)
431 return -EIO;
432
433 return 0;
434 }
435
ov9750_write_array(struct i2c_client * client,const struct regval * regs)436 static int ov9750_write_array(struct i2c_client *client,
437 const struct regval *regs)
438 {
439 u32 i;
440 int ret = 0;
441
442 for (i = 0; ret == 0 && regs[i].addr != REG_NULL; i++) {
443 if (unlikely(regs[i].addr == REG_DELAY))
444 usleep_range(regs[i].val, regs[i].val * 2);
445 else
446 ret = ov9750_write_reg(client, regs[i].addr,
447 OV9750_REG_VALUE_08BIT, regs[i].val);
448 }
449 return ret;
450 }
451
452 /* Read registers up to 4 at a time */
ov9750_read_reg(struct i2c_client * client,u16 reg,unsigned int len,u32 * val)453 static int ov9750_read_reg(struct i2c_client *client, u16 reg, unsigned int len,
454 u32 *val)
455 {
456 struct i2c_msg msgs[2];
457 u8 *data_be_p;
458 __be32 data_be = 0;
459 __be16 reg_addr_be = cpu_to_be16(reg);
460 int ret;
461
462 if (len > 4 || !len)
463 return -EINVAL;
464
465 data_be_p = (u8 *)&data_be;
466 /* Write register address */
467 msgs[0].addr = client->addr;
468 msgs[0].flags = 0;
469 msgs[0].len = 2;
470 msgs[0].buf = (u8 *)®_addr_be;
471
472 /* Read data from register */
473 msgs[1].addr = client->addr;
474 msgs[1].flags = I2C_M_RD;
475 msgs[1].len = len;
476 msgs[1].buf = &data_be_p[4 - len];
477
478 ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs));
479 if (ret != ARRAY_SIZE(msgs))
480 return -EIO;
481
482 *val = be32_to_cpu(data_be);
483
484 return 0;
485 }
486
ov9750_get_reso_dist(const struct ov9750_mode * mode,struct v4l2_mbus_framefmt * framefmt)487 static int ov9750_get_reso_dist(const struct ov9750_mode *mode,
488 struct v4l2_mbus_framefmt *framefmt)
489 {
490 return abs(mode->width - framefmt->width) +
491 abs(mode->height - framefmt->height);
492 }
493
494 static const struct ov9750_mode *
ov9750_find_best_fit(struct v4l2_subdev_format * fmt)495 ov9750_find_best_fit(struct v4l2_subdev_format *fmt)
496 {
497 struct v4l2_mbus_framefmt *framefmt = &fmt->format;
498 int dist;
499 int cur_best_fit = 0;
500 int cur_best_fit_dist = -1;
501 unsigned int i;
502
503 for (i = 0; i < ARRAY_SIZE(supported_modes); i++) {
504 dist = ov9750_get_reso_dist(&supported_modes[i], framefmt);
505 if (cur_best_fit_dist == -1 || dist < cur_best_fit_dist) {
506 cur_best_fit_dist = dist;
507 cur_best_fit = i;
508 }
509 }
510
511 return &supported_modes[cur_best_fit];
512 }
513
ov9750_set_fmt(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_format * fmt)514 static int ov9750_set_fmt(struct v4l2_subdev *sd,
515 struct v4l2_subdev_pad_config *cfg,
516 struct v4l2_subdev_format *fmt)
517 {
518 struct ov9750 *ov9750 = to_ov9750(sd);
519 const struct ov9750_mode *mode;
520 s64 h_blank, vblank_def;
521
522 mutex_lock(&ov9750->mutex);
523
524 mode = ov9750_find_best_fit(fmt);
525 fmt->format.code = MEDIA_BUS_FMT_SBGGR10_1X10;
526 fmt->format.width = mode->width;
527 fmt->format.height = mode->height;
528 fmt->format.field = V4L2_FIELD_NONE;
529 if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
530 #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
531 *v4l2_subdev_get_try_format(sd, cfg, fmt->pad) = fmt->format;
532 #else
533 mutex_unlock(&ov9750->mutex);
534 return -ENOTTY;
535 #endif
536 } else {
537 ov9750->cur_mode = mode;
538 h_blank = mode->hts_def - mode->width;
539 __v4l2_ctrl_modify_range(ov9750->hblank, h_blank,
540 h_blank, 1, h_blank);
541 vblank_def = mode->vts_def - mode->height;
542 __v4l2_ctrl_modify_range(ov9750->vblank, vblank_def,
543 OV9750_VTS_MAX - mode->height,
544 1, vblank_def);
545 }
546
547 mutex_unlock(&ov9750->mutex);
548
549 return 0;
550 }
551
ov9750_get_fmt(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_format * fmt)552 static int ov9750_get_fmt(struct v4l2_subdev *sd,
553 struct v4l2_subdev_pad_config *cfg,
554 struct v4l2_subdev_format *fmt)
555 {
556 struct ov9750 *ov9750 = to_ov9750(sd);
557 const struct ov9750_mode *mode = ov9750->cur_mode;
558
559 mutex_lock(&ov9750->mutex);
560 if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
561 #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
562 fmt->format = *v4l2_subdev_get_try_format(sd, cfg, fmt->pad);
563 #else
564 mutex_unlock(&ov9750->mutex);
565 return -ENOTTY;
566 #endif
567 } else {
568 fmt->format.width = mode->width;
569 fmt->format.height = mode->height;
570 fmt->format.code = MEDIA_BUS_FMT_SBGGR10_1X10;
571 fmt->format.field = V4L2_FIELD_NONE;
572 }
573 mutex_unlock(&ov9750->mutex);
574
575 return 0;
576 }
577
ov9750_enum_mbus_code(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_mbus_code_enum * code)578 static int ov9750_enum_mbus_code(struct v4l2_subdev *sd,
579 struct v4l2_subdev_pad_config *cfg,
580 struct v4l2_subdev_mbus_code_enum *code)
581 {
582 if (code->index != 0)
583 return -EINVAL;
584 code->code = MEDIA_BUS_FMT_SBGGR10_1X10;
585
586 return 0;
587 }
588
ov9750_enum_frame_sizes(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_frame_size_enum * fse)589 static int ov9750_enum_frame_sizes(struct v4l2_subdev *sd,
590 struct v4l2_subdev_pad_config *cfg,
591 struct v4l2_subdev_frame_size_enum *fse)
592 {
593 if (fse->index >= ARRAY_SIZE(supported_modes))
594 return -EINVAL;
595
596 if (fse->code != MEDIA_BUS_FMT_SBGGR10_1X10)
597 return -EINVAL;
598
599 fse->min_width = supported_modes[fse->index].width;
600 fse->max_width = supported_modes[fse->index].width;
601 fse->max_height = supported_modes[fse->index].height;
602 fse->min_height = supported_modes[fse->index].height;
603
604 return 0;
605 }
606
ov9750_enable_test_pattern(struct ov9750 * ov9750,u32 pattern)607 static int ov9750_enable_test_pattern(struct ov9750 *ov9750, u32 pattern)
608 {
609 u32 val;
610
611 if (pattern)
612 val = ((pattern - 1) < 2) | OV9750_TEST_PATTERN_ENABLE;
613 else
614 val = OV9750_TEST_PATTERN_DISABLE;
615
616 return ov9750_write_reg(ov9750->client, OV9750_REG_TEST_PATTERN,
617 OV9750_REG_VALUE_08BIT, val);
618 }
619
ov9750_g_frame_interval(struct v4l2_subdev * sd,struct v4l2_subdev_frame_interval * fi)620 static int ov9750_g_frame_interval(struct v4l2_subdev *sd,
621 struct v4l2_subdev_frame_interval *fi)
622 {
623 struct ov9750 *ov9750 = to_ov9750(sd);
624 const struct ov9750_mode *mode = ov9750->cur_mode;
625
626 fi->interval = mode->max_fps;
627
628 return 0;
629 }
630
ov9750_get_module_inf(struct ov9750 * ov9750,struct rkmodule_inf * inf)631 static void ov9750_get_module_inf(struct ov9750 *ov9750,
632 struct rkmodule_inf *inf)
633 {
634 memset(inf, 0, sizeof(*inf));
635 strlcpy(inf->base.sensor, OV9750_NAME, sizeof(inf->base.sensor));
636 strlcpy(inf->base.module, ov9750->module_name,
637 sizeof(inf->base.module));
638 strlcpy(inf->base.lens, ov9750->len_name, sizeof(inf->base.lens));
639 }
640
ov9750_ioctl(struct v4l2_subdev * sd,unsigned int cmd,void * arg)641 static long ov9750_ioctl(struct v4l2_subdev *sd, unsigned int cmd, void *arg)
642 {
643 struct ov9750 *ov9750 = to_ov9750(sd);
644 long ret = 0;
645 u32 stream = 0;
646
647 switch (cmd) {
648 case RKMODULE_GET_MODULE_INFO:
649 ov9750_get_module_inf(ov9750, (struct rkmodule_inf *)arg);
650 break;
651 case RKMODULE_SET_QUICK_STREAM:
652
653 stream = *((u32 *)arg);
654
655 if (stream)
656 ret = ov9750_write_reg(ov9750->client, OV9750_REG_CTRL_MODE,
657 OV9750_REG_VALUE_08BIT, OV9750_MODE_STREAMING);
658 else
659 ret = ov9750_write_reg(ov9750->client, OV9750_REG_CTRL_MODE,
660 OV9750_REG_VALUE_08BIT, OV9750_MODE_SW_STANDBY);
661 break;
662 default:
663 ret = -ENOIOCTLCMD;
664 break;
665 }
666
667 return ret;
668 }
669
670 #ifdef CONFIG_COMPAT
ov9750_compat_ioctl32(struct v4l2_subdev * sd,unsigned int cmd,unsigned long arg)671 static long ov9750_compat_ioctl32(struct v4l2_subdev *sd,
672 unsigned int cmd, unsigned long arg)
673 {
674 void __user *up = compat_ptr(arg);
675 struct rkmodule_inf *inf;
676 long ret;
677 u32 stream = 0;
678
679 switch (cmd) {
680 case RKMODULE_GET_MODULE_INFO:
681 inf = kzalloc(sizeof(*inf), GFP_KERNEL);
682 if (!inf) {
683 ret = -ENOMEM;
684 return ret;
685 }
686 ret = ov9750_ioctl(sd, cmd, inf);
687 if (!ret)
688 ret = copy_to_user(up, inf, sizeof(*inf));
689 kfree(inf);
690 break;
691 case RKMODULE_SET_QUICK_STREAM:
692 ret = copy_from_user(&stream, up, sizeof(u32));
693 if (!ret)
694 ret = ov9750_ioctl(sd, cmd, &stream);
695 break;
696 default:
697 ret = -ENOIOCTLCMD;
698 break;
699 }
700
701 return ret;
702 }
703 #endif
704
__ov9750_start_stream(struct ov9750 * ov9750)705 static int __ov9750_start_stream(struct ov9750 *ov9750)
706 {
707 int ret;
708
709 ret = ov9750_write_array(ov9750->client, ov9750->cur_mode->reg_list);
710 if (ret)
711 return ret;
712
713 /* In case these controls are set before streaming */
714 mutex_unlock(&ov9750->mutex);
715 ret = v4l2_ctrl_handler_setup(&ov9750->ctrl_handler);
716 mutex_lock(&ov9750->mutex);
717 if (ret)
718 return ret;
719
720 return ov9750_write_reg(ov9750->client, OV9750_REG_CTRL_MODE,
721 OV9750_REG_VALUE_08BIT, OV9750_MODE_STREAMING);
722 }
723
__ov9750_stop_stream(struct ov9750 * ov9750)724 static int __ov9750_stop_stream(struct ov9750 *ov9750)
725 {
726 return ov9750_write_reg(ov9750->client, OV9750_REG_CTRL_MODE,
727 OV9750_REG_VALUE_08BIT, OV9750_MODE_SW_STANDBY);
728 }
729
ov9750_s_stream(struct v4l2_subdev * sd,int on)730 static int ov9750_s_stream(struct v4l2_subdev *sd, int on)
731 {
732 struct ov9750 *ov9750 = to_ov9750(sd);
733 struct i2c_client *client = ov9750->client;
734 int ret = 0;
735
736 mutex_lock(&ov9750->mutex);
737 on = !!on;
738 if (on == ov9750->streaming)
739 goto unlock_and_return;
740
741 if (on) {
742 ret = pm_runtime_get_sync(&client->dev);
743 if (ret < 0) {
744 pm_runtime_put_noidle(&client->dev);
745 goto unlock_and_return;
746 }
747
748 ret = __ov9750_start_stream(ov9750);
749 if (ret) {
750 v4l2_err(sd, "start stream failed while write regs\n");
751 pm_runtime_put(&client->dev);
752 goto unlock_and_return;
753 }
754 } else {
755 __ov9750_stop_stream(ov9750);
756 pm_runtime_put(&client->dev);
757 }
758
759 ov9750->streaming = on;
760
761 unlock_and_return:
762 mutex_unlock(&ov9750->mutex);
763
764 return ret;
765 }
766
ov9750_s_power(struct v4l2_subdev * sd,int on)767 static int ov9750_s_power(struct v4l2_subdev *sd, int on)
768 {
769 struct ov9750 *ov9750 = to_ov9750(sd);
770 struct i2c_client *client = ov9750->client;
771 int ret = 0;
772
773 mutex_lock(&ov9750->mutex);
774
775 /* If the power state is not modified - no work to do. */
776 if (ov9750->power_on == !!on)
777 goto unlock_and_return;
778
779 if (on) {
780 ret = pm_runtime_get_sync(&client->dev);
781 if (ret < 0) {
782 pm_runtime_put_noidle(&client->dev);
783 goto unlock_and_return;
784 }
785 ret = ov9750_write_array(ov9750->client, ov9750_global_regs);
786 if (ret) {
787 v4l2_err(sd, "could not set init registers\n");
788 pm_runtime_put_noidle(&client->dev);
789 goto unlock_and_return;
790 }
791 ov9750->power_on = true;
792 } else {
793 pm_runtime_put(&client->dev);
794 ov9750->power_on = false;
795 }
796
797 unlock_and_return:
798 mutex_unlock(&ov9750->mutex);
799
800 return ret;
801 }
802
803 /* Calculate the delay in us by clock rate and clock cycles */
ov9750_cal_delay(u32 cycles)804 static inline u32 ov9750_cal_delay(u32 cycles)
805 {
806 return DIV_ROUND_UP(cycles, OV9750_XVCLK_FREQ / 1000 / 1000);
807 }
808
__ov9750_power_on(struct ov9750 * ov9750)809 static int __ov9750_power_on(struct ov9750 *ov9750)
810 {
811 int ret;
812 u32 delay_us;
813 struct device *dev = &ov9750->client->dev;
814
815 if (!IS_ERR_OR_NULL(ov9750->pins_default)) {
816 ret = pinctrl_select_state(ov9750->pinctrl,
817 ov9750->pins_default);
818 if (ret < 0)
819 dev_err(dev, "could not set pins\n");
820 }
821
822 ret = clk_set_rate(ov9750->xvclk, OV9750_XVCLK_FREQ);
823 if (ret < 0)
824 dev_warn(dev, "Failed to set xvclk rate (24MHz)\n");
825 if (clk_get_rate(ov9750->xvclk) != OV9750_XVCLK_FREQ)
826 dev_warn(dev, "xvclk mismatched, modes are based on 24MHz\n");
827 ret = clk_prepare_enable(ov9750->xvclk);
828 if (ret < 0) {
829 dev_err(dev, "Failed to enable xvclk\n");
830 return ret;
831 }
832
833 if (!IS_ERR(ov9750->reset_gpio))
834 gpiod_set_value_cansleep(ov9750->reset_gpio, 0);
835
836 ret = regulator_bulk_enable(OV9750_NUM_SUPPLIES, ov9750->supplies);
837 if (ret < 0) {
838 dev_err(dev, "Failed to enable regulators\n");
839 goto disable_clk;
840 }
841
842 if (!IS_ERR(ov9750->reset_gpio))
843 gpiod_set_value_cansleep(ov9750->reset_gpio, 1);
844
845 usleep_range(500, 1000);
846 if (!IS_ERR(ov9750->pwdn_gpio))
847 gpiod_set_value_cansleep(ov9750->pwdn_gpio, 1);
848
849 /* 8192 cycles prior to first SCCB transaction */
850 delay_us = ov9750_cal_delay(8192);
851 usleep_range(delay_us, delay_us * 2);
852
853 return 0;
854
855 disable_clk:
856 clk_disable_unprepare(ov9750->xvclk);
857
858 return ret;
859 }
860
__ov9750_power_off(struct ov9750 * ov9750)861 static void __ov9750_power_off(struct ov9750 *ov9750)
862 {
863 int ret;
864
865 if (!IS_ERR(ov9750->pwdn_gpio))
866 gpiod_set_value_cansleep(ov9750->pwdn_gpio, 0);
867 clk_disable_unprepare(ov9750->xvclk);
868 if (!IS_ERR(ov9750->reset_gpio))
869 gpiod_set_value_cansleep(ov9750->reset_gpio, 0);
870 if (!IS_ERR_OR_NULL(ov9750->pins_sleep)) {
871 ret = pinctrl_select_state(ov9750->pinctrl,
872 ov9750->pins_sleep);
873 if (ret < 0)
874 dev_dbg(&ov9750->client->dev, "could not set pins\n");
875 }
876 regulator_bulk_disable(OV9750_NUM_SUPPLIES, ov9750->supplies);
877 }
878
ov9750_runtime_resume(struct device * dev)879 static int ov9750_runtime_resume(struct device *dev)
880 {
881 struct i2c_client *client = to_i2c_client(dev);
882 struct v4l2_subdev *sd = i2c_get_clientdata(client);
883 struct ov9750 *ov9750 = to_ov9750(sd);
884
885 return __ov9750_power_on(ov9750);
886 }
887
ov9750_runtime_suspend(struct device * dev)888 static int ov9750_runtime_suspend(struct device *dev)
889 {
890 struct i2c_client *client = to_i2c_client(dev);
891 struct v4l2_subdev *sd = i2c_get_clientdata(client);
892 struct ov9750 *ov9750 = to_ov9750(sd);
893
894 __ov9750_power_off(ov9750);
895
896 return 0;
897 }
898
899 #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
ov9750_open(struct v4l2_subdev * sd,struct v4l2_subdev_fh * fh)900 static int ov9750_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
901 {
902 struct ov9750 *ov9750 = to_ov9750(sd);
903 struct v4l2_mbus_framefmt *try_fmt =
904 v4l2_subdev_get_try_format(sd, fh->pad, 0);
905 const struct ov9750_mode *def_mode = &supported_modes[0];
906
907 mutex_lock(&ov9750->mutex);
908 /* Initialize try_fmt */
909 try_fmt->width = def_mode->width;
910 try_fmt->height = def_mode->height;
911 try_fmt->code = MEDIA_BUS_FMT_SBGGR10_1X10;
912 try_fmt->field = V4L2_FIELD_NONE;
913
914 mutex_unlock(&ov9750->mutex);
915 /* No crop or compose */
916
917 return 0;
918 }
919 #endif
920
ov9750_enum_frame_interval(struct v4l2_subdev * sd,struct v4l2_subdev_pad_config * cfg,struct v4l2_subdev_frame_interval_enum * fie)921 static int ov9750_enum_frame_interval(struct v4l2_subdev *sd,
922 struct v4l2_subdev_pad_config *cfg,
923 struct v4l2_subdev_frame_interval_enum *fie)
924 {
925 if (fie->index >= ARRAY_SIZE(supported_modes))
926 return -EINVAL;
927
928 fie->code = MEDIA_BUS_FMT_SBGGR10_1X10;
929 fie->width = supported_modes[fie->index].width;
930 fie->height = supported_modes[fie->index].height;
931 fie->interval = supported_modes[fie->index].max_fps;
932 return 0;
933 }
934
ov9750_g_mbus_config(struct v4l2_subdev * sd,struct v4l2_mbus_config * config)935 static int ov9750_g_mbus_config(struct v4l2_subdev *sd,
936 struct v4l2_mbus_config *config)
937 {
938 u32 val = 0;
939
940 val = 1 << (OV9750_LANES - 1) |
941 V4L2_MBUS_CSI2_CHANNEL_0 |
942 V4L2_MBUS_CSI2_CONTINUOUS_CLOCK;
943 config->type = V4L2_MBUS_CSI2;
944 config->flags = val;
945
946 return 0;
947 }
948
949 static const struct dev_pm_ops ov9750_pm_ops = {
950 SET_RUNTIME_PM_OPS(ov9750_runtime_suspend,
951 ov9750_runtime_resume, NULL)
952 };
953
954 #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
955 static const struct v4l2_subdev_internal_ops ov9750_internal_ops = {
956 .open = ov9750_open,
957 };
958 #endif
959
960 static const struct v4l2_subdev_core_ops ov9750_core_ops = {
961 .s_power = ov9750_s_power,
962 .ioctl = ov9750_ioctl,
963 #ifdef CONFIG_COMPAT
964 .compat_ioctl32 = ov9750_compat_ioctl32,
965 #endif
966 };
967
968 static const struct v4l2_subdev_video_ops ov9750_video_ops = {
969 .s_stream = ov9750_s_stream,
970 .g_frame_interval = ov9750_g_frame_interval,
971 .g_mbus_config = ov9750_g_mbus_config,
972 };
973
974 static const struct v4l2_subdev_pad_ops ov9750_pad_ops = {
975 .enum_mbus_code = ov9750_enum_mbus_code,
976 .enum_frame_size = ov9750_enum_frame_sizes,
977 .enum_frame_interval = ov9750_enum_frame_interval,
978 .get_fmt = ov9750_get_fmt,
979 .set_fmt = ov9750_set_fmt,
980 };
981
982 static const struct v4l2_subdev_ops ov9750_subdev_ops = {
983 .core = &ov9750_core_ops,
984 .video = &ov9750_video_ops,
985 .pad = &ov9750_pad_ops,
986 };
987
ov9750_set_ctrl(struct v4l2_ctrl * ctrl)988 static int ov9750_set_ctrl(struct v4l2_ctrl *ctrl)
989 {
990 struct ov9750 *ov9750 = container_of(ctrl->handler,
991 struct ov9750, ctrl_handler);
992 struct i2c_client *client = ov9750->client;
993 s64 max;
994 int ret = 0;
995
996 /* Propagate change of current control to all related controls */
997 switch (ctrl->id) {
998 case V4L2_CID_VBLANK:
999 /* Update max exposure while meeting expected vblanking */
1000 max = ov9750->cur_mode->height + ctrl->val - 4;
1001 __v4l2_ctrl_modify_range(ov9750->exposure,
1002 ov9750->exposure->minimum, max,
1003 ov9750->exposure->step,
1004 ov9750->exposure->default_value);
1005 break;
1006 }
1007
1008 if (!pm_runtime_get_if_in_use(&client->dev))
1009 return 0;
1010
1011 switch (ctrl->id) {
1012 case V4L2_CID_EXPOSURE:
1013 /* 4 least significant bits of expsoure are fractional part */
1014 ret = ov9750_write_reg(ov9750->client, OV9750_REG_EXPOSURE,
1015 OV9750_REG_VALUE_24BIT, ctrl->val << 4);
1016 break;
1017 case V4L2_CID_ANALOGUE_GAIN:
1018 ret = ov9750_write_reg(ov9750->client, OV9750_REG_GAIN_H,
1019 OV9750_REG_VALUE_08BIT,
1020 (ctrl->val >> 8) & OV9750_GAIN_H_MASK);
1021 ret |= ov9750_write_reg(ov9750->client, OV9750_REG_GAIN_L,
1022 OV9750_REG_VALUE_08BIT,
1023 ctrl->val & OV9750_GAIN_L_MASK);
1024 break;
1025 case V4L2_CID_VBLANK:
1026 ret = ov9750_write_reg(ov9750->client, OV9750_REG_VTS,
1027 OV9750_REG_VALUE_16BIT,
1028 ctrl->val + ov9750->cur_mode->height);
1029 break;
1030 case V4L2_CID_TEST_PATTERN:
1031 ret = ov9750_enable_test_pattern(ov9750, ctrl->val);
1032 break;
1033 default:
1034 dev_warn(&client->dev, "%s Unhandled id:0x%x, val:0x%x\n",
1035 __func__, ctrl->id, ctrl->val);
1036 break;
1037 }
1038
1039 pm_runtime_put(&client->dev);
1040
1041 return ret;
1042 }
1043
1044 static const struct v4l2_ctrl_ops ov9750_ctrl_ops = {
1045 .s_ctrl = ov9750_set_ctrl,
1046 };
1047
ov9750_initialize_controls(struct ov9750 * ov9750)1048 static int ov9750_initialize_controls(struct ov9750 *ov9750)
1049 {
1050 const struct ov9750_mode *mode;
1051 struct v4l2_ctrl_handler *handler;
1052 struct v4l2_ctrl *ctrl;
1053 s64 exposure_max, vblank_def;
1054 u32 h_blank;
1055 int ret;
1056
1057 handler = &ov9750->ctrl_handler;
1058 mode = ov9750->cur_mode;
1059 ret = v4l2_ctrl_handler_init(handler, 8);
1060 if (ret)
1061 return ret;
1062 handler->lock = &ov9750->mutex;
1063
1064 ctrl = v4l2_ctrl_new_int_menu(handler, NULL, V4L2_CID_LINK_FREQ,
1065 0, 0, link_freq_menu_items);
1066 if (ctrl)
1067 ctrl->flags |= V4L2_CTRL_FLAG_READ_ONLY;
1068
1069 v4l2_ctrl_new_std(handler, NULL, V4L2_CID_PIXEL_RATE,
1070 0, OV9750_PIXEL_RATE, 1, OV9750_PIXEL_RATE);
1071
1072 h_blank = mode->hts_def - mode->width;
1073 ov9750->hblank = v4l2_ctrl_new_std(handler, NULL, V4L2_CID_HBLANK,
1074 h_blank, h_blank, 1, h_blank);
1075 if (ov9750->hblank)
1076 ov9750->hblank->flags |= V4L2_CTRL_FLAG_READ_ONLY;
1077
1078 vblank_def = mode->vts_def - mode->height;
1079 ov9750->vblank = v4l2_ctrl_new_std(handler, &ov9750_ctrl_ops,
1080 V4L2_CID_VBLANK, vblank_def,
1081 OV9750_VTS_MAX - mode->height,
1082 1, vblank_def);
1083
1084 exposure_max = mode->vts_def - 4;
1085 ov9750->exposure = v4l2_ctrl_new_std(handler, &ov9750_ctrl_ops,
1086 V4L2_CID_EXPOSURE, OV9750_EXPOSURE_MIN,
1087 exposure_max, OV9750_EXPOSURE_STEP,
1088 mode->exp_def);
1089
1090 ov9750->anal_gain = v4l2_ctrl_new_std(handler, &ov9750_ctrl_ops,
1091 V4L2_CID_ANALOGUE_GAIN, OV9750_GAIN_MIN,
1092 OV9750_GAIN_MAX, OV9750_GAIN_STEP,
1093 OV9750_GAIN_DEFAULT);
1094
1095 ov9750->test_pattern = v4l2_ctrl_new_std_menu_items(handler,
1096 &ov9750_ctrl_ops, V4L2_CID_TEST_PATTERN,
1097 ARRAY_SIZE(ov9750_test_pattern_menu) - 1,
1098 0, 0, ov9750_test_pattern_menu);
1099
1100 if (handler->error) {
1101 ret = handler->error;
1102 dev_err(&ov9750->client->dev,
1103 "Failed to init controls(%d)\n", ret);
1104 goto err_free_handler;
1105 }
1106
1107 ov9750->subdev.ctrl_handler = handler;
1108
1109 return 0;
1110
1111 err_free_handler:
1112 v4l2_ctrl_handler_free(handler);
1113
1114 return ret;
1115 }
1116
ov9750_check_sensor_id(struct ov9750 * ov9750,struct i2c_client * client)1117 static int ov9750_check_sensor_id(struct ov9750 *ov9750,
1118 struct i2c_client *client)
1119 {
1120 struct device *dev = &ov9750->client->dev;
1121 u32 id = 0;
1122 int ret;
1123
1124 ret = ov9750_read_reg(client, OV9750_REG_CHIP_ID,
1125 OV9750_REG_VALUE_16BIT, &id);
1126 if (id != CHIP_ID) {
1127 dev_err(dev, "Unexpected sensor id(%04x), ret(%d)\n", id, ret);
1128 return -ENODEV;
1129 }
1130
1131 dev_info(dev, "Detected OV%04x sensor\n", id);
1132
1133 return 0;
1134 }
1135
ov9750_configure_regulators(struct ov9750 * ov9750)1136 static int ov9750_configure_regulators(struct ov9750 *ov9750)
1137 {
1138 unsigned int i;
1139
1140 for (i = 0; i < OV9750_NUM_SUPPLIES; i++)
1141 ov9750->supplies[i].supply = ov9750_supply_names[i];
1142
1143 return devm_regulator_bulk_get(&ov9750->client->dev,
1144 OV9750_NUM_SUPPLIES,
1145 ov9750->supplies);
1146 }
1147
ov9750_probe(struct i2c_client * client,const struct i2c_device_id * id)1148 static int ov9750_probe(struct i2c_client *client,
1149 const struct i2c_device_id *id)
1150 {
1151 struct device *dev = &client->dev;
1152 struct device_node *node = dev->of_node;
1153 struct ov9750 *ov9750;
1154 struct v4l2_subdev *sd;
1155 char facing[2];
1156 int ret;
1157
1158 dev_info(dev, "driver version: %02x.%02x.%02x",
1159 DRIVER_VERSION >> 16,
1160 (DRIVER_VERSION & 0xff00) >> 8,
1161 DRIVER_VERSION & 0x00ff);
1162
1163 ov9750 = devm_kzalloc(dev, sizeof(*ov9750), GFP_KERNEL);
1164 if (!ov9750)
1165 return -ENOMEM;
1166
1167 ret = of_property_read_u32(node, RKMODULE_CAMERA_MODULE_INDEX,
1168 &ov9750->module_index);
1169 ret |= of_property_read_string(node, RKMODULE_CAMERA_MODULE_FACING,
1170 &ov9750->module_facing);
1171 ret |= of_property_read_string(node, RKMODULE_CAMERA_MODULE_NAME,
1172 &ov9750->module_name);
1173 ret |= of_property_read_string(node, RKMODULE_CAMERA_LENS_NAME,
1174 &ov9750->len_name);
1175 if (ret) {
1176 dev_err(dev, "could not get module information!\n");
1177 return -EINVAL;
1178 }
1179
1180 ov9750->client = client;
1181 ov9750->cur_mode = &supported_modes[0];
1182
1183 ov9750->xvclk = devm_clk_get(dev, "xvclk");
1184 if (IS_ERR(ov9750->xvclk)) {
1185 dev_err(dev, "Failed to get xvclk\n");
1186 return -EINVAL;
1187 }
1188
1189 ov9750->reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_LOW);
1190 if (IS_ERR(ov9750->reset_gpio))
1191 dev_warn(dev, "Failed to get reset-gpios\n");
1192
1193 ov9750->pwdn_gpio = devm_gpiod_get(dev, "pwdn", GPIOD_OUT_LOW);
1194 if (IS_ERR(ov9750->pwdn_gpio))
1195 dev_warn(dev, "Failed to get pwdn-gpios\n");
1196
1197 ov9750->pinctrl = devm_pinctrl_get(dev);
1198 if (!IS_ERR(ov9750->pinctrl)) {
1199 ov9750->pins_default =
1200 pinctrl_lookup_state(ov9750->pinctrl,
1201 OF_CAMERA_PINCTRL_STATE_DEFAULT);
1202 if (IS_ERR(ov9750->pins_default))
1203 dev_err(dev, "could not get default pinstate\n");
1204
1205 ov9750->pins_sleep =
1206 pinctrl_lookup_state(ov9750->pinctrl,
1207 OF_CAMERA_PINCTRL_STATE_SLEEP);
1208 if (IS_ERR(ov9750->pins_sleep))
1209 dev_err(dev, "could not get sleep pinstate\n");
1210 } else {
1211 dev_err(dev, "no pinctrl\n");
1212 }
1213
1214 ret = ov9750_configure_regulators(ov9750);
1215 if (ret) {
1216 dev_err(dev, "Failed to get power regulators\n");
1217 return ret;
1218 }
1219
1220 mutex_init(&ov9750->mutex);
1221
1222 sd = &ov9750->subdev;
1223 v4l2_i2c_subdev_init(sd, client, &ov9750_subdev_ops);
1224 ret = ov9750_initialize_controls(ov9750);
1225 if (ret)
1226 goto err_destroy_mutex;
1227
1228 ret = __ov9750_power_on(ov9750);
1229 if (ret)
1230 goto err_free_handler;
1231
1232 ret = ov9750_check_sensor_id(ov9750, client);
1233 if (ret)
1234 goto err_power_off;
1235
1236 #ifdef CONFIG_VIDEO_V4L2_SUBDEV_API
1237 sd->internal_ops = &ov9750_internal_ops;
1238 sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE |
1239 V4L2_SUBDEV_FL_HAS_EVENTS;
1240 #endif
1241 #if defined(CONFIG_MEDIA_CONTROLLER)
1242 ov9750->pad.flags = MEDIA_PAD_FL_SOURCE;
1243 sd->entity.function = MEDIA_ENT_F_CAM_SENSOR;
1244 ret = media_entity_pads_init(&sd->entity, 1, &ov9750->pad);
1245 if (ret < 0)
1246 goto err_power_off;
1247 #endif
1248
1249 memset(facing, 0, sizeof(facing));
1250 if (strcmp(ov9750->module_facing, "back") == 0)
1251 facing[0] = 'b';
1252 else
1253 facing[0] = 'f';
1254
1255 snprintf(sd->name, sizeof(sd->name), "m%02d_%s_%s %s",
1256 ov9750->module_index, facing,
1257 OV9750_NAME, dev_name(sd->dev));
1258 ret = v4l2_async_register_subdev_sensor_common(sd);
1259 if (ret) {
1260 dev_err(dev, "v4l2 async register subdev failed\n");
1261 goto err_clean_entity;
1262 }
1263
1264 pm_runtime_set_active(dev);
1265 pm_runtime_enable(dev);
1266 pm_runtime_idle(dev);
1267
1268 return 0;
1269
1270 err_clean_entity:
1271 #if defined(CONFIG_MEDIA_CONTROLLER)
1272 media_entity_cleanup(&sd->entity);
1273 #endif
1274 err_power_off:
1275 __ov9750_power_off(ov9750);
1276 err_free_handler:
1277 v4l2_ctrl_handler_free(&ov9750->ctrl_handler);
1278 err_destroy_mutex:
1279 mutex_destroy(&ov9750->mutex);
1280
1281 return ret;
1282 }
1283
ov9750_remove(struct i2c_client * client)1284 static int ov9750_remove(struct i2c_client *client)
1285 {
1286 struct v4l2_subdev *sd = i2c_get_clientdata(client);
1287 struct ov9750 *ov9750 = to_ov9750(sd);
1288
1289 v4l2_async_unregister_subdev(sd);
1290 #if defined(CONFIG_MEDIA_CONTROLLER)
1291 media_entity_cleanup(&sd->entity);
1292 #endif
1293 v4l2_ctrl_handler_free(&ov9750->ctrl_handler);
1294 mutex_destroy(&ov9750->mutex);
1295
1296 pm_runtime_disable(&client->dev);
1297 if (!pm_runtime_status_suspended(&client->dev))
1298 __ov9750_power_off(ov9750);
1299 pm_runtime_set_suspended(&client->dev);
1300
1301 return 0;
1302 }
1303
1304 #if IS_ENABLED(CONFIG_OF)
1305 static const struct of_device_id ov9750_of_match[] = {
1306 { .compatible = "ovti,ov9750" },
1307 {},
1308 };
1309 MODULE_DEVICE_TABLE(of, ov9750_of_match);
1310 #endif
1311
1312 static const struct i2c_device_id ov9750_match_id[] = {
1313 { "ovti,ov9750", 0 },
1314 { },
1315 };
1316
1317 static struct i2c_driver ov9750_i2c_driver = {
1318 .driver = {
1319 .name = OV9750_NAME,
1320 .pm = &ov9750_pm_ops,
1321 .of_match_table = of_match_ptr(ov9750_of_match),
1322 },
1323 .probe = &ov9750_probe,
1324 .remove = &ov9750_remove,
1325 .id_table = ov9750_match_id,
1326 };
1327
sensor_mod_init(void)1328 static int __init sensor_mod_init(void)
1329 {
1330 return i2c_add_driver(&ov9750_i2c_driver);
1331 }
1332
sensor_mod_exit(void)1333 static void __exit sensor_mod_exit(void)
1334 {
1335 i2c_del_driver(&ov9750_i2c_driver);
1336 }
1337
1338 device_initcall_sync(sensor_mod_init);
1339 module_exit(sensor_mod_exit);
1340
1341 MODULE_DESCRIPTION("OmniVision ov9750 sensor driver");
1342 MODULE_LICENSE("GPL v2");
1343