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Searched refs:HCLK_I2S1_8CH (Results 1 – 25 of 30) sorted by relevance

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/OK3568_Linux_fs/kernel/include/dt-bindings/clock/
H A Drk3228-cru.h121 #define HCLK_I2S1_8CH 443 macro
H A Drk3328-cru.h174 #define HCLK_I2S1_8CH 312 macro
H A Drk3308-cru.h159 #define HCLK_I2S1_8CH 165 macro
H A Drk3399-cru.h321 #define HCLK_I2S1_8CH 469 macro
H A Drk3568-cru.h121 #define HCLK_I2S1_8CH 58 macro
H A Drk3588-cru.h644 #define HCLK_I2S1_8CH 648 macro
/OK3568_Linux_fs/u-boot/include/dt-bindings/clock/
H A Drk3228-cru.h123 #define HCLK_I2S1_8CH 443 macro
H A Drk3308-cru.h165 #define HCLK_I2S1_8CH 165 macro
H A Drk3328-cru.h173 #define HCLK_I2S1_8CH 312 macro
H A Drk3399-cru.h310 #define HCLK_I2S1_8CH 469 macro
H A Drk3568-cru.h121 #define HCLK_I2S1_8CH 58 macro
H A Drk3588-cru.h644 #define HCLK_I2S1_8CH 648 macro
/OK3568_Linux_fs/kernel/drivers/clk/rockchip/
H A Dclk-rk3228.c589 GATE(HCLK_I2S1_8CH, "hclk_i2s1_8ch", "hclk_cpu", 0, RK2928_CLKGATE_CON(8), 8, GFLAGS),
H A Dclk-rk3328.c762 GATE(HCLK_I2S1_8CH, "hclk_i2s1_8ch", "hclk_bus_pre", 0, RK3328_CLKGATE_CON(15), 4, GFLAGS),
H A Dclk-rk3308.c841 GATE(HCLK_I2S1_8CH, "hclk_i2s1_8ch", "hclk_audio", 0, RK3308_CLKGATE_CON(14), 5, GFLAGS),
H A Dclk-rk3399.c1103 GATE(HCLK_I2S1_8CH, "hclk_i2s1", "hclk_perilp1", 0, RK3399_CLKGATE_CON(34), 1, GFLAGS),
H A Dclk-rk3568.c620 GATE(HCLK_I2S1_8CH, "hclk_i2s1_8ch", "hclk_gic_audio", 0,
H A Dclk-rk3588.c2173 GATE(HCLK_I2S1_8CH, "hclk_i2s1_8ch", "hclk_pmu1_root", 0,
/OK3568_Linux_fs/u-boot/arch/arm/dts/
H A Drk322x.dtsi152 clocks = <&cru SCLK_I2S1>, <&cru HCLK_I2S1_8CH>;
H A Drk3328.dtsi147 clocks = <&cru SCLK_I2S1>, <&cru HCLK_I2S1_8CH>;
H A Drk3399.dtsi1487 clocks = <&cru SCLK_I2S1_8CH>, <&cru HCLK_I2S1_8CH>;
/OK3568_Linux_fs/kernel/arch/arm/boot/dts/
H A Drk322x.dtsi162 clocks = <&cru SCLK_I2S1>, <&cru HCLK_I2S1_8CH>;
H A Drk3128x.dtsi272 clocks = <&cru SCLK_I2S1>, <&cru HCLK_I2S1_8CH>;
/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/rockchip/
H A Drk3328.dtsi249 clocks = <&cru SCLK_I2S1>, <&cru HCLK_I2S1_8CH>;
H A Drk3308.dtsi1063 clocks = <&cru SCLK_I2S1_8CH_TX>, <&cru SCLK_I2S1_8CH_RX>, <&cru HCLK_I2S1_8CH>,

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