| 40929c29 | 07-Jan-2026 |
Vincent Jardin <vjardin@free.fr> |
fix(a8k): mv_ddr path may not be a git repo
When the mv-ddr-marvell folder is not a git tree the build fails
complaining that it "does not contain valid mv-ddr-marvell git
repository".
For instance
fix(a8k): mv_ddr path may not be a git repo
When the mv-ddr-marvell folder is not a git tree the build fails
complaining that it "does not contain valid mv-ddr-marvell git
repository".
For instance, it shall be removed when Building using Buildroot.
Change-Id: Ieaff6281785993873c7cb26ddc1d90d0896ad1b7
Signed-off-by: Vincent Jardin <vjardin@free.fr>
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| 88a6e612 | 29-Dec-2025 |
Vincent Jardin <vjardin@free.fr> |
feat(a8k): add a80x0_nbx Free Mobile board
Add TF-A platform support for the a80x0_nbx board (Free Mobile
Nodebox10G), a network appliance based on the Marvell Armada 8040
SoC with dual CP110 compan
feat(a8k): add a80x0_nbx Free Mobile board
Add TF-A platform support for the a80x0_nbx board (Free Mobile
Nodebox10G), a network appliance based on the Marvell Armada 8040
SoC with dual CP110 companion processors.
Hardware configuration:
- Quad-core ARM Cortex-A72 @ 1.3GHz
- DDR4 memory with ECC support (single channel, 32-bit)
- Dual CP110 companion processors (CP0 and CP1)
- SGMII 1G Ethernet on CP0 lane 5
- I2C buses for peripheral access (CP0: 100kHz, CP1: 400kHz)
- NS16550 UART console at 115200 baud
- eMMC boot via Xenon SDHCI controller
Key features implemented:
1. Ramoops buffer preservation across cold boot (ramoopsies driver)
On ECC-enabled DDR configurations, the memory controller must
scrub all memory during initialization to establish valid parity
bits. This would normally destroy the Linux kernel ramoops buffer
containing crash logs from the previous boot. The ramoopsies
driver intercepts the DDR scrubbing function using the GNU linker
--wrap feature, saving the 32KB ramoops buffer (at 0x3FFF8000) to
SRAM before scrubbing and restoring it afterward. The driver also
handles pending SError exceptions that occur when reading
uninitialized ECC memory by installing a minimal exception vector
that acknowledges and clears them.
2. UART-based skip image recovery mechanism
The platform uses the USER_DEFINED skip image detection callback
to implement software-based boot recovery without requiring a
dedicated GPIO button. Users can trigger recovery mode by holding
the 's' key during early boot, causing the bootloader to load
from the secondary/recovery image instead of the primary firmware.
3. SerDes/ComPhy configuration
PHY porting layer configured with default tuning values for
XFI (10G) and SATA interfaces, following the principle of minimal
bootloader configuration. Advanced SerDes tuning is deferred to
the Linux kernel where it can be more easily adjusted.
The implementation includes comprehensive documentation and a build
verification script to validate proper symbol exports, DDR driver
integration, and flash image format compliance.
Based on original work by Nicolas Schichan <nschichan@freebox.fr>
for the ramoops preservation mechanism and USER_DEFINED skip image
detection concept.
Change-Id: Iaacbb29631f27b47fbf5cc300d8c63aaf1e89e51
Signed-off-by: Vincent Jardin <vjardin@free.fr>
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| 04738e69 | 10-Jul-2021 |
Pali Rohár <pali@kernel.org> |
fix(plat/marvell/a8k): Add missing build dependency for BLE target
BLE source files depend on external Marvell mv-ddr-marvell tree
(specified in $(MV_DDR_PATH) variable) and its header files. Add
de
fix(plat/marvell/a8k): Add missing build dependency for BLE target
BLE source files depend on external Marvell mv-ddr-marvell tree
(specified in $(MV_DDR_PATH) variable) and its header files. Add
dependency on $(MV_DDR_LIB) target which checks that variable
$(MV_DDR_PATH) is correctly set and ensures that make completes
compilation of mv-ddr-marvell tree.
Signed-off-by: Pali Rohár <pali@kernel.org>
Change-Id: I73968b24c45d9af1e3500b8db7a24bb4eb2bfa47
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| 559ab2df | 10-Jul-2021 |
Pali Rohár <pali@kernel.org> |
fix(plat/marvell/a8k): Correctly set include directories for individual targets
Do not set all include directories, including those for external targets
in one PLAT_INCLUDES variable.
Instead split
fix(plat/marvell/a8k): Correctly set include directories for individual targets
Do not set all include directories, including those for external targets
in one PLAT_INCLUDES variable.
Instead split them into variables:
* $(PLAT_INCLUDES) for all TF-A BL images
* BLE target specific $(PLAT_INCLUDES) only for Marvell BLE image
* $(MV_DDR_INCLUDES) for targets in external Marvell mv-ddr-marvell tree
Include directory $(CURDIR)/drivers/marvell is required by TF-A BL
images, so move it from ble.mk to a8k_common.mk.
Include directory $(MV_DDR_PATH) is needed only by Marvell BLE image, so
move it into BLE target specific $(PLAT_INCLUDES) variable.
And remaining include directories specified in ble.mk are needed only
for building external dependences from Marvell mv-ddr tree, so move them
into $(MV_DDR_INCLUDES) variable and correctly use it in $(MV_DDR_LIB)
target.
Signed-off-by: Pali Rohár <pali@kernel.org>
Change-Id: I331f7de675dca2bc70733d56b768f00d56ae4a67
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| b5a06637 | 28-Feb-2021 |
Konstantin Porotchkin <kostap@marvell.com> |
plat/marvell/armada: postpone MSS CPU startup to BL31 stage
Normally the CP MSS CPU was started at the end of FW load to IRAM at BL2.
However, (especailly in secure boot mode), some bus attributes s
plat/marvell/armada: postpone MSS CPU startup to BL31 stage
Normally the CP MSS CPU was started at the end of FW load to IRAM at BL2.
However, (especailly in secure boot mode), some bus attributes should be
changed from defaults before the MSS CPU tries to access shared resources.
This patch starts to use CP MSS SRAM for FW load in both secure and
non-secure boot modes.
The FW loader inserts a magic number into MSS SRAM as an indicator of
successfully loaded FS during the BL2 stage and skips releasing the MSS
CPU from the reset state.
Then, at BL31 stage, the MSS CPU is released from reset following the
call to cp110_init function that handles all the required bus attributes
configurations.
Change-Id: Idcf81cc350a086835abed365154051dd79f1ce2e
Signed-off-by: Konstantin Porotchkin <kostap@marvell.com>
Reviewed-on: https://sj1git1.cavium.com/c/IP/SW/boot/atf/+/46890
Tested-by: sa_ip-sw-jenkins <sa_ip-sw-jenkins@marvell.com>
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