1# 2# Copyright (c) 2013-2021, ARM Limited and Contributors. All rights reserved. 3# Portions copyright (c) 2021-2022, ProvenRun S.A.S. All rights reserved. 4# 5# SPDX-License-Identifier: BSD-3-Clause 6 7override ERRATA_A53_855873 := 1 8ERRATA_A53_1530924 := 1 9override PROGRAMMABLE_RESET_ADDRESS := 1 10PSCI_EXTENDED_STATE_ID := 1 11A53_DISABLE_NON_TEMPORAL_HINT := 0 12SEPARATE_CODE_AND_RODATA := 1 13ZYNQMP_WDT_RESTART := 0 14IPI_CRC_CHECK := 0 15override RESET_TO_BL31 := 1 16override WARMBOOT_ENABLE_DCACHE_EARLY := 1 17 18EL3_EXCEPTION_HANDLING := $(SDEI_SUPPORT) 19 20# pncd SPD requires secure SGI to be handled at EL1 21ifeq (${SPD},pncd) 22ifeq (${ZYNQMP_WDT_RESTART},1) 23$(error "Error: ZYNQMP_WDT_RESTART and SPD=pncd are incompatible") 24endif 25override GICV2_G0_FOR_EL3 := 0 26else 27override GICV2_G0_FOR_EL3 := 1 28endif 29 30# Do not enable SVE 31ENABLE_SVE_FOR_NS := 0 32 33WORKAROUND_CVE_2017_5715 := 0 34 35ARM_XLAT_TABLES_LIB_V1 := 1 36$(eval $(call assert_boolean,ARM_XLAT_TABLES_LIB_V1)) 37$(eval $(call add_define,ARM_XLAT_TABLES_LIB_V1)) 38 39ifdef ZYNQMP_ATF_MEM_BASE 40 $(eval $(call add_define,ZYNQMP_ATF_MEM_BASE)) 41 42 ifndef ZYNQMP_ATF_MEM_SIZE 43 $(error "ZYNQMP_ATF_BASE defined without ZYNQMP_ATF_SIZE") 44 endif 45 $(eval $(call add_define,ZYNQMP_ATF_MEM_SIZE)) 46 47 ifdef ZYNQMP_ATF_MEM_PROGBITS_SIZE 48 $(eval $(call add_define,ZYNQMP_ATF_MEM_PROGBITS_SIZE)) 49 endif 50endif 51 52ifdef ZYNQMP_BL32_MEM_BASE 53 $(eval $(call add_define,ZYNQMP_BL32_MEM_BASE)) 54 55 ifndef ZYNQMP_BL32_MEM_SIZE 56 $(error "ZYNQMP_BL32_BASE defined without ZYNQMP_BL32_SIZE") 57 endif 58 $(eval $(call add_define,ZYNQMP_BL32_MEM_SIZE)) 59endif 60 61 62ifdef ZYNQMP_WDT_RESTART 63 $(eval $(call add_define,ZYNQMP_WDT_RESTART)) 64endif 65 66ifdef ZYNQMP_IPI_CRC_CHECK 67 $(warning "ZYNQMP_IPI_CRC_CHECK macro is deprecated...instead please use IPI_CRC_CHECK.") 68endif 69 70ifdef IPI_CRC_CHECK 71 $(eval $(call add_define,IPI_CRC_CHECK)) 72endif 73 74ifdef ZYNQMP_SECURE_EFUSES 75 $(eval $(call add_define,ZYNQMP_SECURE_EFUSES)) 76endif 77 78PLAT_INCLUDES := -Iinclude/plat/arm/common/ \ 79 -Iinclude/plat/arm/common/aarch64/ \ 80 -Iplat/xilinx/common/include/ \ 81 -Iplat/xilinx/common/ipi_mailbox_service/ \ 82 -Iplat/xilinx/zynqmp/include/ \ 83 -Iplat/xilinx/zynqmp/pm_service/ \ 84 85include lib/libfdt/libfdt.mk 86# Include GICv2 driver files 87include drivers/arm/gic/v2/gicv2.mk 88 89PLAT_BL_COMMON_SOURCES := lib/xlat_tables/xlat_tables_common.c \ 90 lib/xlat_tables/aarch64/xlat_tables.c \ 91 drivers/arm/dcc/dcc_console.c \ 92 drivers/delay_timer/delay_timer.c \ 93 drivers/delay_timer/generic_delay_timer.c \ 94 ${GICV2_SOURCES} \ 95 drivers/cadence/uart/aarch64/cdns_console.S \ 96 plat/arm/common/arm_cci.c \ 97 plat/arm/common/arm_common.c \ 98 plat/arm/common/arm_gicv2.c \ 99 plat/common/plat_gicv2.c \ 100 plat/xilinx/common/ipi.c \ 101 plat/xilinx/zynqmp/zynqmp_ipi.c \ 102 plat/common/aarch64/crash_console_helpers.S \ 103 plat/xilinx/zynqmp/aarch64/zynqmp_helpers.S \ 104 plat/xilinx/zynqmp/aarch64/zynqmp_common.c 105 106ZYNQMP_CONSOLE ?= cadence 107ifeq (${ZYNQMP_CONSOLE}, $(filter ${ZYNQMP_CONSOLE},cadence cadence0 cadence1 dcc)) 108else 109 $(error "Please define ZYNQMP_CONSOLE") 110endif 111$(eval $(call add_define_val,ZYNQMP_CONSOLE,ZYNQMP_CONSOLE_ID_${ZYNQMP_CONSOLE})) 112 113BL31_SOURCES += drivers/arm/cci/cci.c \ 114 lib/cpus/aarch64/aem_generic.S \ 115 lib/cpus/aarch64/cortex_a53.S \ 116 plat/common/plat_psci_common.c \ 117 common/fdt_fixup.c \ 118 ${LIBFDT_SRCS} \ 119 plat/xilinx/common/ipi_mailbox_service/ipi_mailbox_svc.c \ 120 plat/xilinx/common/pm_service/pm_ipi.c \ 121 plat/xilinx/common/plat_startup.c \ 122 plat/xilinx/zynqmp/bl31_zynqmp_setup.c \ 123 plat/xilinx/zynqmp/plat_psci.c \ 124 plat/xilinx/zynqmp/plat_zynqmp.c \ 125 plat/xilinx/zynqmp/plat_topology.c \ 126 plat/xilinx/zynqmp/sip_svc_setup.c \ 127 plat/xilinx/zynqmp/pm_service/pm_svc_main.c \ 128 plat/xilinx/zynqmp/pm_service/pm_api_sys.c \ 129 plat/xilinx/zynqmp/pm_service/pm_api_pinctrl.c \ 130 plat/xilinx/zynqmp/pm_service/pm_api_ioctl.c \ 131 plat/xilinx/zynqmp/pm_service/pm_api_clock.c \ 132 plat/xilinx/zynqmp/pm_service/pm_client.c 133 134ifeq (${SDEI_SUPPORT},1) 135BL31_SOURCES += plat/xilinx/zynqmp/zynqmp_ehf.c \ 136 plat/xilinx/zynqmp/zynqmp_sdei.c 137endif 138 139BL31_CPPFLAGS += -fno-jump-tables 140TF_CFLAGS_aarch64 += -mbranch-protection=none 141 142ifneq (${RESET_TO_BL31},1) 143 $(error "Using BL31 as the reset vector is only one option supported on ZynqMP. Please set RESET_TO_BL31 to 1.") 144endif 145