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Searched refs:COMPOSITE (Results 1 – 25 of 68) sorted by relevance

123

/OK3568_Linux_fs/kernel/drivers/clk/rockchip/
H A Dclk-rk3588.c684 COMPOSITE(CLK_50M_SRC, "clk_50m_src", gpll_cpll_p, CLK_IS_CRITICAL,
687 COMPOSITE(CLK_100M_SRC, "clk_100m_src", gpll_cpll_p, CLK_IS_CRITICAL,
690 COMPOSITE(CLK_150M_SRC, "clk_150m_src", gpll_cpll_p, CLK_IS_CRITICAL,
693 COMPOSITE(CLK_200M_SRC, "clk_200m_src", gpll_cpll_p, CLK_IS_CRITICAL,
696 COMPOSITE(CLK_250M_SRC, "clk_250m_src", gpll_cpll_p, CLK_IS_CRITICAL,
699 COMPOSITE(CLK_300M_SRC, "clk_300m_src", gpll_cpll_p, CLK_IS_CRITICAL,
702 COMPOSITE(CLK_350M_SRC, "clk_350m_src", gpll_spll_p, CLK_IS_CRITICAL,
705 COMPOSITE(CLK_400M_SRC, "clk_400m_src", gpll_cpll_p, CLK_IS_CRITICAL,
711 COMPOSITE(CLK_500M_SRC, "clk_500m_src", gpll_cpll_p, CLK_IS_CRITICAL,
714 COMPOSITE(CLK_600M_SRC, "clk_600m_src", gpll_cpll_p, CLK_IS_CRITICAL,
[all …]
H A Dclk-rk3328.c273 COMPOSITE(SCLK_RTC32K, "clk_rtc32k", mux_2plls_xin24m_p, 0,
311 COMPOSITE(0, "aclk_gpu_pre", mux_4plls_p, 0,
320 COMPOSITE(0, "clk_ddr", mux_ddrphy_p, CLK_IS_CRITICAL,
332 COMPOSITE(PCLK_DDR, "pclk_ddr", mux_2plls_hdmiphy_p, CLK_IS_CRITICAL,
351 COMPOSITE(ACLK_BUS_PRE, "aclk_bus_pre", mux_2plls_hdmiphy_p, CLK_IS_CRITICAL,
365 COMPOSITE(SCLK_TSP, "clk_tsp", mux_2plls_p, 0,
372 COMPOSITE(0, "clk_i2s0_div", mux_2plls_p, 0,
382 COMPOSITE(0, "clk_i2s1_div", mux_2plls_p, 0,
395 COMPOSITE(0, "clk_i2s2_div", mux_2plls_p, 0,
408 COMPOSITE(0, "clk_spdif_div", mux_2plls_p, 0,
[all …]
H A Dclk-rk3562.c213 COMPOSITE(CLK_MATRIX_50M_SRC, "clk_matrix_50m_src", gpll_cpll_p, 0,
216 COMPOSITE(CLK_MATRIX_100M_SRC, "clk_matrix_100m_src", gpll_cpll_p, CLK_IS_CRITICAL,
219 COMPOSITE(CLK_MATRIX_125M_SRC, "clk_matrix_125m_src", gpll_cpll_p, 0,
222 COMPOSITE(CLK_MATRIX_200M_SRC, "clk_matrix_200m_src", gpll_cpll_p, CLK_IS_CRITICAL,
225 COMPOSITE(CLK_MATRIX_300M_SRC, "clk_matrix_300m_src", gpll_cpll_p, CLK_IS_CRITICAL,
228 COMPOSITE(ACLK_TOP, "aclk_top", gpll_cpll_p, CLK_IS_CRITICAL,
231 COMPOSITE(ACLK_TOP_VIO, "aclk_top_vio", gpll_cpll_p, 0,
234 COMPOSITE(CLK_24M_SSCSRC, "clk_24m_sscsrc", vpll_dmyhpll_gpll_cpll_p, 0,
237 COMPOSITE(CLK_CAM0_OUT2IO, "clk_cam0_out2io", gpll_cpll_xin24m_dmyapll_p, 0,
240 COMPOSITE(CLK_CAM1_OUT2IO, "clk_cam1_out2io", gpll_cpll_xin24m_dmyapll_p, 0,
[all …]
H A Dclk-rk1808.c309 COMPOSITE(ACLK_GIC_PRE, "aclk_gic_pre", mux_gpll_cpll_p, CLK_IS_CRITICAL,
323 COMPOSITE(0, "aclk_vpu_pre", mux_gpll_cpll_p, 0,
351 COMPOSITE(0, "aclk_npu_pre", mux_gpll_cpll_p, 0,
354 COMPOSITE(0, "hclk_npu_pre", mux_gpll_cpll_p, 0,
372 COMPOSITE(ACLK_IMEM_PRE, "aclk_imem_pre", mux_gpll_cpll_p, CLK_IS_CRITICAL,
392 COMPOSITE(HSCLK_IMEM, "hsclk_imem", mux_gpll_cpll_p, CLK_IS_CRITICAL,
446 COMPOSITE(HSCLK_VIO, "hsclk_vio", mux_gpll_cpll_p, 0,
483 COMPOSITE(0, "dclk_vopraw_src", mux_cpll_gpll_npll_p, 0,
493 COMPOSITE(0, "dclk_voplite_src", mux_cpll_gpll_npll_p, 0,
507 COMPOSITE(SCLK_RGA, "clk_rga", mux_gpll_cpll_npll_p, 0,
[all …]
H A Dclk-rk3399.c505 COMPOSITE(ACLK_USB3, "aclk_usb3", mux_pll_src_cpll_gpll_npll_p, 0,
524 COMPOSITE(SCLK_USB3OTG0_SUSPEND, "clk_usb3otg0_suspend", mux_pll_p, 0,
528 COMPOSITE(SCLK_USB3OTG1_SUSPEND, "clk_usb3otg1_suspend", mux_pll_p, 0,
532 COMPOSITE(SCLK_UPHY0_TCPDPHY_REF, "clk_uphy0_tcpdphy_ref", mux_pll_p, 0,
536 COMPOSITE(SCLK_UPHY0_TCPDCORE, "clk_uphy0_tcpdcore", mux_pll_src_24m_32k_cpll_gpll_p, 0,
540 COMPOSITE(SCLK_UPHY1_TCPDPHY_REF, "clk_uphy1_tcpdphy_ref", mux_pll_p, 0,
544 COMPOSITE(SCLK_UPHY1_TCPDCORE, "clk_uphy1_tcpdcore", mux_pll_src_24m_32k_cpll_gpll_p, 0,
628 COMPOSITE(0, "aclk_gmac_pre", mux_aclk_gmac_p, 0,
647 COMPOSITE(SCLK_MAC, "clk_gmac", mux_pll_src_cpll_gpll_npll_p, 0,
663 COMPOSITE(SCLK_SPDIF_DIV, "clk_spdif_div", mux_pll_src_cpll_gpll_p, 0,
[all …]
H A Dclk-rv1126.c349 COMPOSITE(SCLK_UART1_DIV, "sclk_uart1_div", mux_gpll_usb480m_cpll_xin24m_p, 0,
374 COMPOSITE(CLK_PWM0, "clk_pwm0", mux_xin24m_gpll_p, 0,
381 COMPOSITE(CLK_PWM1, "clk_pwm1", mux_xin24m_gpll_p, 0,
387 COMPOSITE(CLK_SPI0, "clk_spi0", mux_gpll_xin24m_p, 0,
475 COMPOSITE(0, "aclk_pdbus_pre", mux_gpll_cpll_dpll_p, CLK_IS_CRITICAL,
480 COMPOSITE(0, "hclk_pdbus_pre", mux_hclk_pclk_pdbus_p, CLK_IS_CRITICAL,
485 COMPOSITE(0, "pclk_pdbus_pre", mux_hclk_pclk_pdbus_p, CLK_IS_CRITICAL,
501 COMPOSITE(CLK_SCR1, "clk_scr1", mux_gpll_cpll_p, 0,
515 COMPOSITE(SCLK_UART0_DIV, "sclk_uart0_div", mux_gpll_cpll_usb480m_xin24m_p, 0,
526 COMPOSITE(SCLK_UART2_DIV, "sclk_uart2_div", mux_gpll_cpll_usb480m_xin24m_p, 0,
[all …]
H A Dclk-px30.c374 COMPOSITE(ACLK_VI_PRE, "aclk_vi_pre", mux_gpll_cpll_npll_p, 0,
380 COMPOSITE(SCLK_ISP, "clk_isp", mux_gpll_cpll_npll_p, 0,
383 COMPOSITE(SCLK_CIF_OUT, "clk_cif_out", mux_cif_out_p, 0,
396 COMPOSITE(ACLK_VO_PRE, "aclk_vo_pre", mux_gpll_cpll_npll_p, 0,
405 COMPOSITE(SCLK_RGA_CORE, "clk_rga_core", mux_gpll_cpll_npll_p, 0,
409 COMPOSITE(SCLK_VOPB_PWM, "clk_vopb_pwm", mux_gpll_xin24m_p, 0,
412 COMPOSITE(0, "dclk_vopb_src", mux_cpll_npll_p, CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT,
421 COMPOSITE(0, "dclk_vopl_src", mux_npll_cpll_p, CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPARENT,
432 COMPOSITE(0, "aclk_vpu_pre", mux_gpll_cpll_npll_p, 0,
438 COMPOSITE(SCLK_CORE_VPU, "sclk_core_vpu", mux_gpll_cpll_npll_p, 0,
[all …]
H A Dclk-rv1108.c220 COMPOSITE(0, "aclk_rkvenc_pre", mux_pll_src_4plls_p, 0,
225 COMPOSITE(SCLK_VENC_CORE, "clk_venc_core", mux_pll_src_4plls_p, 0,
238 COMPOSITE(SCLK_HEVC_CORE, "sclk_hevc_core", mux_pll_src_4plls_p, 0,
243 COMPOSITE(SCLK_HEVC_CABAC, "clk_hevc_cabac", mux_pll_src_4plls_p, 0,
247 COMPOSITE(0, "aclk_rkvdec_pre", mux_pll_src_4plls_p, 0,
250 COMPOSITE(0, "aclk_vpu_pre", mux_pll_src_4plls_p, 0,
286 COMPOSITE(SCLK_PWM0_PMU, "sclk_pwm0_pmu", mux_pll_src_2plls_p, 0,
289 COMPOSITE(SCLK_I2C0_PMU, "sclk_i2c0_pmu", mux_pll_src_2plls_p, 0,
298 COMPOSITE(SCLK_WIFI, "sclk_wifi", mux_wifi_src_p, 0,
347 COMPOSITE(SCLK_DSP, "sclk_dsp", mux_dsp_src_p, 0,
[all …]
H A Dclk-rk3308.c384 COMPOSITE(SCLK_I2C0, "clk_i2c0", mux_dpll_vpll0_xin24m_p, 0,
387 COMPOSITE(SCLK_I2C1, "clk_i2c1", mux_dpll_vpll0_xin24m_p, 0,
390 COMPOSITE(SCLK_I2C2, "clk_i2c2", mux_dpll_vpll0_xin24m_p, 0,
393 COMPOSITE(SCLK_I2C3, "clk_i2c3", mux_dpll_vpll0_xin24m_p, 0,
397 COMPOSITE(SCLK_PWM0, "clk_pwm0", mux_dpll_vpll0_xin24m_p, 0,
400 COMPOSITE(SCLK_PWM1, "clk_pwm1", mux_dpll_vpll0_xin24m_p, 0,
403 COMPOSITE(SCLK_PWM2, "clk_pwm2", mux_dpll_vpll0_xin24m_p, 0,
407 COMPOSITE(SCLK_SPI0, "clk_spi0", mux_dpll_vpll0_xin24m_p, 0,
410 COMPOSITE(SCLK_SPI1, "clk_spi1", mux_dpll_vpll0_xin24m_p, 0,
413 COMPOSITE(SCLK_SPI2, "clk_spi2", mux_dpll_vpll0_xin24m_p, 0,
[all …]
H A Dclk-rk3228.c227 COMPOSITE(0, "ddrphy4x", mux_ddrphy_p, CLK_IGNORE_UNUSED,
282 COMPOSITE(ACLK_VPU_PRE, "aclk_vpu_pre", mux_pll_src_4plls_p, 0,
288 COMPOSITE(ACLK_RKVDEC_PRE, "aclk_rkvdec_pre", mux_pll_src_4plls_p, 0,
294 COMPOSITE(SCLK_VDEC_CABAC, "sclk_vdec_cabac", mux_pll_src_4plls_p, 0,
298 COMPOSITE(SCLK_VDEC_CORE, "sclk_vdec_core", mux_pll_src_4plls_p, 0,
303 COMPOSITE(ACLK_IEP_PRE, "aclk_iep_pre", mux_pll_src_4plls_p, 0,
309 COMPOSITE(ACLK_HDCP_PRE, "aclk_hdcp_pre", mux_pll_src_4plls_p, 0,
318 COMPOSITE(SCLK_RGA, "sclk_rga", mux_sclk_rga_p, 0,
322 COMPOSITE(ACLK_VOP_PRE, "aclk_vop_pre", mux_pll_src_4plls_p, 0,
326 COMPOSITE(SCLK_HDCP, "sclk_hdcp", mux_pll_src_3plls_p, 0,
[all …]
H A Dclk-rk3128.c237 COMPOSITE(0, "aclk_cpu_src", mux_aclk_cpu_src_p, CLK_IS_CRITICAL,
253 COMPOSITE(ACLK_VEPU, "aclk_vepu", mux_pll_src_5plls_p, 0,
258 COMPOSITE(ACLK_VDPU, "aclk_vdpu", mux_pll_src_5plls_p, 0,
264 COMPOSITE(SCLK_HEVC_CORE, "sclk_hevc_core", mux_pll_src_5plls_p, 0,
269 COMPOSITE(ACLK_VIO0, "aclk_vio0", mux_pll_src_5plls_p, CLK_IS_CRITICAL,
272 COMPOSITE(ACLK_VIO1, "aclk_vio1", mux_pll_src_5plls_p, 0,
279 COMPOSITE(0, "aclk_peri_src", mux_aclk_peri_src_p, 0,
314 COMPOSITE(SCLK_SDMMC, "sclk_sdmmc", mux_mmc_src_p, 0,
318 COMPOSITE(SCLK_SDIO, "sclk_sdio", mux_mmc_src_p, 0,
322 COMPOSITE(SCLK_EMMC, "sclk_emmc", mux_mmc_src_p, 0,
[all …]
H A Dclk-rk3288.c373 COMPOSITE(SCLK_I2S_SRC, "i2s_src", mux_pll_src_cpll_gpll_p, 0,
427 COMPOSITE(0, "aclk_vepu", mux_pll_src_cpll_gpll_usb480m_p, 0,
430 COMPOSITE(0, "aclk_vdpu", mux_pll_src_cpll_gpll_usb480m_p, 0,
444 COMPOSITE(ACLK_VIO0, "aclk_vio0", mux_pll_src_cpll_gpll_usb480m_p, CLK_IGNORE_UNUSED,
447 COMPOSITE(ACLK_VIO1, "aclk_vio1", mux_pll_src_cpll_gpll_usb480m_p, CLK_IGNORE_UNUSED,
451 COMPOSITE(0, "aclk_rga_pre", mux_pll_src_cpll_gpll_usb480m_p, 0,
454 COMPOSITE(SCLK_RGA, "sclk_rga", mux_pll_src_cpll_gpll_usb480m_p, 0,
458 COMPOSITE(DCLK_VOP0, "dclk_vop0", mux_pll_src_cpll_gpll_npll_p, 0,
461 COMPOSITE(DCLK_VOP1, "dclk_vop1", mux_pll_src_cpll_gpll_npll_p, 0,
468 COMPOSITE(SCLK_EDP, "sclk_edp", mux_pll_src_cpll_gpll_npll_p, 0,
[all …]
H A Dclk-rk3368.c339 COMPOSITE(ACLK_CCI_PRE, "aclk_cci_pre", mux_pll_src_cpll_gpll_usb_npll_p, CLK_IGNORE_UNUSED,
375 COMPOSITE(0, "fclk_mcu_src", mux_pll_src_cpll_gpll_p, CLK_IGNORE_UNUSED,
386 COMPOSITE(0, "i2s_8ch_src", mux_pll_src_cpll_gpll_p, 0,
398 COMPOSITE(0, "spdif_8ch_src", mux_pll_src_cpll_gpll_p, 0,
407 COMPOSITE(0, "i2s_2ch_src", mux_pll_src_cpll_gpll_p, 0,
417 COMPOSITE(0, "sclk_tsp", mux_pll_src_cpll_gpll_npll_p, 0,
435 COMPOSITE(0, "aclk_vepu", mux_pll_src_cpll_gpll_npll_usb_p, 0,
438 COMPOSITE(0, "aclk_vdpu", mux_pll_src_cpll_gpll_npll_usb_p, 0,
449 COMPOSITE(0, "sclk_hevc_cabac_src", mux_pll_src_cpll_gpll_npll_usb_p, 0,
452 COMPOSITE(0, "sclk_hevc_core_src", mux_pll_src_cpll_gpll_npll_usb_p, 0,
[all …]
H A Dclk-rk3568.c492 COMPOSITE(0, "sclk_core_src", apll_gpll_npll_p, CLK_IS_CRITICAL,
535 COMPOSITE(CLK_GPU_SRC, "clk_gpu_src", mpll_gpll_cpll_npll_p, 0,
557 COMPOSITE(CLK_NPU_SRC, "clk_npu_src", npll_gpll_p, 0,
590 COMPOSITE(CLK_DDRPHY1X_SRC, "clk_ddrphy1x_src", dpll_gpll_cpll_p, CLK_IGNORE_UNUSED,
627 COMPOSITE(CLK_I2S0_8CH_TX_SRC, "clk_i2s0_8ch_tx_src", gpll_cpll_npll_p, 0,
640 COMPOSITE(CLK_I2S0_8CH_RX_SRC, "clk_i2s0_8ch_rx_src", gpll_cpll_npll_p, 0,
653 COMPOSITE(CLK_I2S1_8CH_TX_SRC, "clk_i2s1_8ch_tx_src", gpll_cpll_npll_p, 0,
666 COMPOSITE(CLK_I2S1_8CH_RX_SRC, "clk_i2s1_8ch_rx_src", gpll_cpll_npll_p, 0,
679 COMPOSITE(CLK_I2S2_2CH_SRC, "clk_i2s2_2ch_src", gpll_cpll_npll_p, 0,
692 COMPOSITE(CLK_I2S3_2CH_TX_SRC, "clk_i2s3_2ch_tx_src", gpll_cpll_npll_p, 0,
[all …]
H A Dclk-rk3036.c217 COMPOSITE(0, "aclk_peri_src", mux_pll_src_dmyapll_dpll_gpll_p, 0,
269 COMPOSITE(ACLK_VCODEC, "aclk_vcodec", mux_pll_src_dmyapll_dpll_gpll_p, 0,
275 COMPOSITE(ACLK_HEVC, "aclk_hevc", mux_pll_src_dmyapll_dpll_gpll_p, 0,
279 COMPOSITE(0, "aclk_disp1_pre", mux_pll_src_dmyapll_dpll_gpll_p, 0,
282 COMPOSITE(0, "hclk_disp_pre", mux_pll_src_dmyapll_dpll_gpll_p, 0,
285 COMPOSITE(SCLK_LCDC, "dclk_lcdc", mux_pll_src_apll_dpll_gpll_p, 0,
301 COMPOSITE(SCLK_EMMC, "sclk_emmc", mux_mmc_src_p, 0,
314 COMPOSITE(0, "i2s_src", mux_pll_src_dmyapll_dpll_gpll_p, 0,
327 COMPOSITE(0, "spdif_src", mux_pll_src_dmyapll_dpll_gpll_p, 0,
338 COMPOSITE(SCLK_GPU, "sclk_gpu", mux_pll_src_dmyapll_dpll_gpll_p, 0,
[all …]
H A Dclk-rv1106.c332 COMPOSITE(HCLK_CPU, "hclk_cpu", mux_gpll_24m_p, CLK_IS_CRITICAL,
335 COMPOSITE(CLK_CORE_MCU, "clk_core_mcu", mux_gpll_24m_p, 0,
347 COMPOSITE(CLK_50M_SRC, "clk_50m_src", mux_gpll_cpll_p, CLK_IS_CRITICAL,
350 COMPOSITE(CLK_100M_SRC, "clk_100m_src", mux_gpll_cpll_p, CLK_IS_CRITICAL,
353 COMPOSITE(CLK_150M_SRC, "clk_150m_src", mux_gpll_cpll_p, CLK_IS_CRITICAL,
356 COMPOSITE(CLK_200M_SRC, "clk_200m_src", mux_gpll_cpll_p, CLK_IS_CRITICAL,
359 COMPOSITE(CLK_250M_SRC, "clk_250m_src", mux_gpll_cpll_p, CLK_IS_CRITICAL,
362 COMPOSITE(CLK_300M_SRC, "clk_300m_src", mux_gpll_cpll_p, CLK_IS_CRITICAL,
368 COMPOSITE(CLK_400M_SRC, "clk_400m_src", mux_gpll_cpll_p, CLK_IS_CRITICAL,
374 COMPOSITE(CLK_500M_SRC, "clk_500m_src", mux_gpll_cpll_p, CLK_IS_CRITICAL,
[all …]
H A Dclk-rk3188.c288 COMPOSITE(ACLK_VEPU, "aclk_vepu", mux_pll_src_cpll_gpll_p, 0,
293 COMPOSITE(ACLK_VDPU, "aclk_vdpu", mux_pll_src_cpll_gpll_p, 0,
301 COMPOSITE(0, "ddrphy", mux_ddrphy_p, CLK_IGNORE_UNUSED,
315 COMPOSITE(0, "aclk_lcdc0_pre", mux_pll_src_cpll_gpll_p, CLK_IGNORE_UNUSED,
318 COMPOSITE(0, "aclk_lcdc1_pre", mux_pll_src_cpll_gpll_p, 0,
355 COMPOSITE(0, "mac_src", mux_mac_p, 0,
363 COMPOSITE(0, "hsadc_src", mux_pll_src_gpll_cpll_p, 0,
577 COMPOSITE(0, "aclk_peri_pre", mux_pll_src_gpll_cpll_p, CLK_IS_CRITICAL,
581 COMPOSITE(0, "dclk_lcdc0_src", mux_pll_src_cpll_gpll_p, 0,
586 COMPOSITE(0, "dclk_lcdc1_src", mux_pll_src_cpll_gpll_p, 0,
[all …]
H A Dclk-rk3528.c259 COMPOSITE(CLK_MATRIX_250M_SRC, "clk_250m_src", mux_gpll_cpll_p, CLK_IS_CRITICAL,
262 COMPOSITE(CLK_MATRIX_500M_SRC, "clk_500m_src", mux_gpll_cpll_p, CLK_IS_CRITICAL,
289 COMPOSITE(DCLK_VOP_SRC0, "dclk_vop_src0", mux_gpll_cpll_p, 0,
292 COMPOSITE(DCLK_VOP_SRC1, "dclk_vop_src1", mux_gpll_cpll_p, 0,
432 COMPOSITE(ACLK_BUS_VOPGL_ROOT, "aclk_bus_vopgl_root", mux_gpll_cpll_p, CLK_IS_CRITICAL,
678 COMPOSITE(CLK_CAN0, "clk_can0", mux_gpll_cpll_p, 0,
681 COMPOSITE(CLK_CAN1, "clk_can1", mux_gpll_cpll_p, 0,
810 COMPOSITE(CCLK_SRC_SDMMC0, "cclk_src_sdmmc0", mux_gpll_cpll_xin24m_p, 0,
814 COMPOSITE(ACLK_VOP_ROOT, "aclk_vop_root", mux_gpll_cpll_p, CLK_IS_CRITICAL,
883 COMPOSITE(CCLK_SRC_SDIO0, "cclk_src_sdio0", mux_gpll_cpll_xin24m_p, 0,
[all …]
/OK3568_Linux_fs/external/xserver/glx/
H A Dglxscreens.c48 #ifdef COMPOSITE
283 #ifdef COMPOSITE in pickFBConfig()
358 #ifdef COMPOSITE in __glXScreenInit()
383 #ifdef COMPOSITE in __glXScreenInit()
413 #ifdef COMPOSITE in __glXScreenInit()
/OK3568_Linux_fs/external/xserver/mi/
H A Dmiinitext.c90 #undef COMPOSITE
96 #undef COMPOSITE
146 #ifdef COMPOSITE
H A Dmivaltree.c103 #ifdef COMPOSITE
170 #ifdef COMPOSITE
231 #ifdef COMPOSITE in miComputeClips()
511 #ifdef COMPOSITE in getBorderClip()
/OK3568_Linux_fs/kernel/drivers/clk/
H A Dclk-stm32mp1.c1270 #define COMPOSITE(_id, _name, _parents, _flags, _gate, _mux, _div)\ macro
1289 COMPOSITE(_id, _name, _parents, CLK_OPS_PARENT_ENABLE |\
1692 COMPOSITE(PLL1_P, "pll1_p", PARENT("pll1"), 0,
1697 COMPOSITE(PLL2_P, "pll2_p", PARENT("pll2"), 0,
1702 COMPOSITE(PLL2_Q, "pll2_q", PARENT("pll2"), 0,
1707 COMPOSITE(PLL2_R, "pll2_r", PARENT("pll2"), CLK_IS_CRITICAL,
1712 COMPOSITE(PLL3_P, "pll3_p", PARENT("pll3"), 0,
1717 COMPOSITE(PLL3_Q, "pll3_q", PARENT("pll3"), 0,
1722 COMPOSITE(PLL3_R, "pll3_r", PARENT("pll3"), 0,
1727 COMPOSITE(PLL4_P, "pll4_p", PARENT("pll4"), 0,
[all …]
/OK3568_Linux_fs/kernel/drivers/clk/rockchip/regmap/
H A Dclk-rk628.c181 COMPOSITE(CGU_CLK_IMODET, CNAME("clk_imodet"), mux_cpll_gpll_mux_p,
186 COMPOSITE(CGU_CLK_HDMIRX_AUD, CNAME("clk_hdmirx_aud"),
208 COMPOSITE(CGU_PCLK_LOGIC, CNAME("pclk_logic"), mux_cpll_gpll_mux_p,
233 COMPOSITE(CGU_CLK_I2S_8CH_SRC, CNAME("clk_i2s_8ch_src"),
254 COMPOSITE(CGU_BT1120DEC, CNAME("clk_bt1120dec"), mux_cpll_gpll_mux_p,
259 COMPOSITE(CGU_CLK_TESTOUT, CNAME("clk_testout"), mux_clk_testout_p,
H A Dclk-rk618.c139 COMPOSITE(SCALER_CLK, "scaler_clk", mux_pll_src_p,
148 COMPOSITE(VIF0_PRE_CLK, "vif0_pre_clk", mux_pll_src_p,
153 COMPOSITE(VIF1_PRE_CLK, "vif1_pre_clk", mux_pll_src_p,
/OK3568_Linux_fs/external/xserver/include/
H A Dpixmapstr.h81 #ifdef COMPOSITE

123