Home
last modified time | relevance | path

Searched refs:S3_0_C15_C2_7 (Results 1 – 25 of 45) sorted by relevance

12

/rk3399_ARM-atf/include/drivers/arm/fvp/
H A Dfvp_cpu_pwr.h22 #define CPUPWRCTLR_EL1 S3_0_C15_C2_7
/rk3399_ARM-atf/include/lib/cpus/aarch64/
H A Dcanyon.h20 #define CANYON_IMP_CPUPWRCTLR_EL1 S3_0_C15_C2_7
H A Dcaddo.h20 #define CADDO_IMP_CPUPWRCTLR_EL1 S3_0_C15_C2_7
H A Dveymont.h20 #define VEYMONT_IMP_CPUPWRCTLR_EL1 S3_0_C15_C2_7
H A Dvenom.h20 #define VENOM_IMP_CPUPWRCTLR_EL1 S3_0_C15_C2_7
H A Ddionysus.h22 #define DIONYSUS_CPUPWRCTLR_EL1 S3_0_C15_C2_7
H A Dcortex_a320.h21 #define CORTEX_A320_CPUPWRCTLR_EL1 S3_0_C15_C2_7
H A Dcortex_a65ae.h28 #define CORTEX_A65AE_CPUPWRCTLR_EL1 S3_0_C15_C2_7
H A Dneoverse_e1.h28 #define NEOVERSE_E1_CPUPWRCTLR_EL1 S3_0_C15_C2_7
H A Dcortex_a65.h28 #define CORTEX_A65_CPUPWRCTLR_EL1 S3_0_C15_C2_7
H A Dcortex_a720_ae.h20 #define CORTEX_A720_AE_CPUPWRCTLR_EL1 S3_0_C15_C2_7
H A Dcortex_x1.h29 #define CORTEX_X1_CPUPWRCTLR_EL1 S3_0_C15_C2_7
H A Dlsc25_e_core.h22 #define LSC25_E_CORE_IMP_CPUPWRCTLR_EL1 S3_0_C15_C2_7
H A Dlsc25_p_core.h20 #define LSC25_P_CORE_IMP_CPUPWRCTLR_EL1 S3_0_C15_C2_7
H A Dneoverse_n3.h26 #define NEOVERSE_N3_CPUPWRCTLR_EL1 S3_0_C15_C2_7
H A Dcortex_a520.h28 #define CORTEX_A520_CPUPWRCTLR_EL1 S3_0_C15_C2_7
H A Dcortex_a76ae.h21 #define CORTEX_A76AE_CPUPWRCTLR_EL1 S3_0_C15_C2_7
H A Dcortex_a720.h35 #define CORTEX_A720_CPUPWRCTLR_EL1 S3_0_C15_C2_7
H A Dcortex_a725.h21 #define CORTEX_A725_CPUPWRCTLR_EL1 S3_0_C15_C2_7
H A Dc1_pro.h33 #define C1_PRO_IMP_CPUPWRCTLR_EL1 S3_0_C15_C2_7
H A Dcortex_a78c.h32 #define CORTEX_A78C_CPUPWRCTLR_EL1 S3_0_C15_C2_7
H A Dcortex_a55.h18 #define CORTEX_A55_CPUPWRCTLR_EL1 S3_0_C15_C2_7
H A Dcortex_x4.h20 #define CORTEX_X4_CPUPWRCTLR_EL1 S3_0_C15_C2_7
H A Dcortex_a715.h32 #define CORTEX_A715_CPUPWRCTLR_EL1 S3_0_C15_C2_7
H A Dcortex_a77.h28 #define CORTEX_A77_CPUPWRCTLR_EL1 S3_0_C15_C2_7

12