1*d4c50e77SGovindraj Raja /* 2*d4c50e77SGovindraj Raja * Copyright (c) 2025, Arm Limited. All rights reserved. 3*d4c50e77SGovindraj Raja * 4*d4c50e77SGovindraj Raja * SPDX-License-Identifier: BSD-3-Clause 5*d4c50e77SGovindraj Raja */ 6*d4c50e77SGovindraj Raja 7*d4c50e77SGovindraj Raja #ifndef VENOM_H 8*d4c50e77SGovindraj Raja #define VENOM_H 9*d4c50e77SGovindraj Raja 10*d4c50e77SGovindraj Raja #define VENOM_MIDR U(0x410FD980) 11*d4c50e77SGovindraj Raja 12*d4c50e77SGovindraj Raja /******************************************************************************* 13*d4c50e77SGovindraj Raja * CPU Extended Control register specific definitions 14*d4c50e77SGovindraj Raja ******************************************************************************/ 15*d4c50e77SGovindraj Raja #define VENOM_IMP_CPUECTLR_EL1 S3_0_C15_C1_4 16*d4c50e77SGovindraj Raja 17*d4c50e77SGovindraj Raja /******************************************************************************* 18*d4c50e77SGovindraj Raja * CPU Power Control register specific definitions 19*d4c50e77SGovindraj Raja ******************************************************************************/ 20*d4c50e77SGovindraj Raja #define VENOM_IMP_CPUPWRCTLR_EL1 S3_0_C15_C2_7 21*d4c50e77SGovindraj Raja #define VENOM_IMP_CPUPWRCTLR_EL1_CORE_PWRDN_EN_BIT U(1) 22*d4c50e77SGovindraj Raja 23*d4c50e77SGovindraj Raja #endif /* VENOM_H */ 24*d4c50e77SGovindraj Raja 25