1870fcb94SGovindraj Raja /* 26ce6acacSArvind Ram Prakash * Copyright (c) 2022-2025, Arm Limited. All rights reserved. 3870fcb94SGovindraj Raja * 4870fcb94SGovindraj Raja * SPDX-License-Identifier: BSD-3-Clause 5870fcb94SGovindraj Raja */ 6870fcb94SGovindraj Raja 7870fcb94SGovindraj Raja #ifndef CORTEX_X4_H 8870fcb94SGovindraj Raja #define CORTEX_X4_H 9870fcb94SGovindraj Raja 10870fcb94SGovindraj Raja #define CORTEX_X4_MIDR U(0x410FD821) 11870fcb94SGovindraj Raja 12870fcb94SGovindraj Raja /******************************************************************************* 13870fcb94SGovindraj Raja * CPU Extended Control register specific definitions 14870fcb94SGovindraj Raja ******************************************************************************/ 15870fcb94SGovindraj Raja #define CORTEX_X4_CPUECTLR_EL1 S3_0_C15_C1_4 16870fcb94SGovindraj Raja 17870fcb94SGovindraj Raja /******************************************************************************* 18870fcb94SGovindraj Raja * CPU Power Control register specific definitions 19870fcb94SGovindraj Raja ******************************************************************************/ 20870fcb94SGovindraj Raja #define CORTEX_X4_CPUPWRCTLR_EL1 S3_0_C15_C2_7 21870fcb94SGovindraj Raja #define CORTEX_X4_CPUPWRCTLR_EL1_CORE_PWRDN_BIT U(1) 22870fcb94SGovindraj Raja 2347312115SSona Mathew /******************************************************************************* 2447312115SSona Mathew * CPU Auxiliary control register specific definitions 2547312115SSona Mathew ******************************************************************************/ 26db7eb688SRyan Everett #define CORTEX_X4_CPUACTLR_EL1 S3_0_C15_C1_0 27*5a45f0fcSArvind Ram Prakash #define CORTEX_X4_CPUACTLR2_EL1 S3_0_C15_C1_1 2847312115SSona Mathew #define CORTEX_X4_CPUACTLR3_EL1 S3_0_C15_C1_2 29609d08a8SArvind Ram Prakash #define CORTEX_X4_CPUACTLR4_EL1 S3_0_C15_C1_3 3047312115SSona Mathew 311e4480bbSSona Mathew /******************************************************************************* 321e4480bbSSona Mathew * CPU Auxiliary control register 5 specific definitions 331e4480bbSSona Mathew ******************************************************************************/ 341e4480bbSSona Mathew #define CORTEX_X4_CPUACTLR5_EL1 S3_0_C15_C8_0 351e4480bbSSona Mathew #define CORTEX_X4_CPUACTLR5_EL1_BIT_14 (ULL(1) << 14) 361e4480bbSSona Mathew 376ce6acacSArvind Ram Prakash /******************************************************************************* 386ce6acacSArvind Ram Prakash * CPU Auxiliary control register 6 specific definitions 396ce6acacSArvind Ram Prakash ******************************************************************************/ 406ce6acacSArvind Ram Prakash #define CORTEX_X4_CPUACTLR6_EL1 S3_0_C15_C8_1 416ce6acacSArvind Ram Prakash 424a97ff51SArvind Ram Prakash #ifndef __ASSEMBLER__ 434a97ff51SArvind Ram Prakash #if ERRATA_X4_2726228 444a97ff51SArvind Ram Prakash long check_erratum_cortex_x4_2726228(long cpu_rev); 454a97ff51SArvind Ram Prakash #else check_erratum_cortex_x4_2726228(long cpu_rev)464a97ff51SArvind Ram Prakashstatic inline long check_erratum_cortex_x4_2726228(long cpu_rev) 474a97ff51SArvind Ram Prakash { 484a97ff51SArvind Ram Prakash return 0; 494a97ff51SArvind Ram Prakash } 504a97ff51SArvind Ram Prakash #endif /* ERRATA_X4_2726228 */ 5138401c53SGovindraj Raja 5238401c53SGovindraj Raja long check_erratum_cortex_x4_3701758(long cpu_rev); 534a97ff51SArvind Ram Prakash #endif /* __ASSEMBLER__ */ 544a97ff51SArvind Ram Prakash 55870fcb94SGovindraj Raja #endif /* CORTEX_X4_H */ 56