| 4c07eaed | 19-Aug-2019 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: thread_handle_std_smc() takes arguments by value
thread_handle_std_smc() takes its arguments by value instead of a structure containing all the registers. The returned values is reduced to a s
core: thread_handle_std_smc() takes arguments by value
thread_handle_std_smc() takes its arguments by value instead of a structure containing all the registers. The returned values is reduced to a single 32-bit value. This saves a bit of stack space but also makes it more clear which registers are passed back and forth.
Since 32-bit AAPCS (Procedure Call Standard for the ARM® Architecture) only passes arguments in r0-r3 the remaining r4-r7 still need to be passed via the stack, however the arguments are passed like normal value parameters for the C function.
Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 6e558fa9 | 18-Aug-2019 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: __thread_std_smc_entry() takes arguments by value
__thread_std_smc_entry() and thread_std_smc_entry() takes their arguments by value instead of a structure containing all the registers. The ar
core: __thread_std_smc_entry() takes arguments by value
__thread_std_smc_entry() and thread_std_smc_entry() takes their arguments by value instead of a structure containing all the registers. The arguments are also reduced to only allow the four first 32-bit registers, r0-r3 or w0-w3. The returned values is reduced to a single 32-bit value. This saves a bit of stack space but also makes it more clear which registers are passed back and forth.
Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| e9f46c74 | 13-Aug-2019 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: replace thread_nintr_handler_ptr with weak function
Removes registration of platform specific secure interrupt handler in thread_nintr_handler_ptr. Instead a __weak overridable itr_core_handle
core: replace thread_nintr_handler_ptr with weak function
Removes registration of platform specific secure interrupt handler in thread_nintr_handler_ptr. Instead a __weak overridable itr_core_handler() is provided. Platforms which expects to receive secure interrupts must override the default function. The default function calls panic() if called.
With this also nintr is removed from struct thread_handlers and consequently all platforms are updated to stop using that field.
Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 612791d0 | 13-Aug-2019 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: replace thread_fast_smc_handler_ptr with weak function
Removes registration of platform specific fast SMC entry function in thread_fast_smc_handler_ptr. Instead a __weak overridable tee_entry_
core: replace thread_fast_smc_handler_ptr with weak function
Removes registration of platform specific fast SMC entry function in thread_fast_smc_handler_ptr. Instead a __weak overridable tee_entry_fast() is provided. Platforms that need a special tee_entry_fast() (currently on plat-zynq7k) provides their own tee_entry_fast() instead which at the end should call __tee_entry_fast() which does the generic fast call handling.
With this also fast_smc is removed from struct thread_handlers and consequently all platforms are updated to stop using that field.
Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 2dd2ca5f | 13-Aug-2019 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: replace thread_std_smc_handler_ptr with weak function
Removes registration of platform specific standard SMC entry function in thread_std_smc_handler_ptr. Instead a __weak overridable tee_entr
core: replace thread_std_smc_handler_ptr with weak function
Removes registration of platform specific standard SMC entry function in thread_std_smc_handler_ptr. Instead a __weak overridable tee_entry_std() is provided. Platforms that need a special tee_entry_std() (currently on some STM platform) provides their own tee_entry_std() instead which at the end should call __tee_entry_std() which does the generic standard call handling.
With this also std_smc is removed from struct thread_handlers and consequently all platforms are updated to stop using that field.
Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 2786f143 | 08-Aug-2019 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: thread: separate old SMC interface handling
Moves the old SMC interface handing parts for thread*.S into separate files to make way for SPCI which will provide another interface towards normal
core: thread: separate old SMC interface handling
Moves the old SMC interface handing parts for thread*.S into separate files to make way for SPCI which will provide another interface towards normal world.
Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 81d80da2 | 01-Aug-2019 |
Jeffrey Lin <linjunemail@gmail.com> |
core: LPAE finer grain remap support
Correct core_mmu_entry_to_finer_grained() when remapping an already mapped area. Prior this change were the page descriptors filled with corrupted data: physical
core: LPAE finer grain remap support
Correct core_mmu_entry_to_finer_grained() when remapping an already mapped area. Prior this change were the page descriptors filled with corrupted data: physical address was badly computed and the table/block mapping tag was wrong.
Fixes: 4c4ae2107715 ("mmu: replace _prepare_small_page_mapping with _entry_to_finer_grained") Signed-off-by: Jeffrey Lin <linjunemail@gmail.com> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
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| ebef121c | 01-Aug-2019 |
Jerome Forissier <jerome.forissier@linaro.org> |
core, ldelf: add support for runtime loading of shared libraries
This commit prepares the introduction of libdl, a dynamic linking library which will allow TAs to load shared libraries at run time,
core, ldelf: add support for runtime loading of shared libraries
This commit prepares the introduction of libdl, a dynamic linking library which will allow TAs to load shared libraries at run time, and resolve symbols on demand. It adds the following function to the system PTA, inspired from the POSIX dlopen() and dlsym():
- system_dlopen(): takes a UUID and flags. Performs an upcall into ldelf which then uses the usual system PTA functions to load an map the requested library into the address space of the calling TA. - system_dlsym(): takes a UUID and a symbol name. The symbol is looked up in the library specified by UUID by calling into ldelf. If UUID is all zeros, all the mapped binaries are searched.
Signed-off-by: Jerome Forissier <jerome.forissier@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org> Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
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| df7712ba | 21-Aug-2019 |
Jens Wiklander <jens.wiklander@linaro.org> |
Remove ASM define for assembly files
Removes the ASM define for assembly files now that they rely on the predefined macro __ASSEMBLER__ instead.
Reviewed-by: Jerome Forissier <jerome.forissier@lina
Remove ASM define for assembly files
Removes the ASM define for assembly files now that they rely on the predefined macro __ASSEMBLER__ instead.
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 757331fc | 21-Aug-2019 |
Jens Wiklander <jens.wiklander@linaro.org> |
Replace ASM with compiler-builtin __ASSEMBLER__
The C preprocessor predefines __ASSEMBLER__ with value 1 when when preprocessing assembly language, see [1]. Instead of using a special defines, let's
Replace ASM with compiler-builtin __ASSEMBLER__
The C preprocessor predefines __ASSEMBLER__ with value 1 when when preprocessing assembly language, see [1]. Instead of using a special defines, let's use the define already provided.
Link: [1] https://gcc.gnu.org/onlinedocs/cpp/Standard-Predefined-Macros.html
Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| af598004 | 15-Aug-2019 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: fix possible NULL dereference in tee_ta_close_session()
This patch fixes a possible NULL dereference in a debug print in tee_ta_close_session() which is done before checking the supplied param
core: fix possible NULL dereference in tee_ta_close_session()
This patch fixes a possible NULL dereference in a debug print in tee_ta_close_session() which is done before checking the supplied parameter for NULL.
Fixes: 99164a05ff51 ("core: do not use virtual addresses as session identifier") Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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| c3d61baa | 02-Aug-2019 |
Clement Faure <clement.faure@nxp.com> |
core: imx: Add imx7ulp evk board support
Add support for i.MX 7ulp SoC
Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Alessandro Di Chiara <alessandro.dichiara@nxp.com> Signed-off-by: Cl
core: imx: Add imx7ulp evk board support
Add support for i.MX 7ulp SoC
Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Alessandro Di Chiara <alessandro.dichiara@nxp.com> Signed-off-by: Clement Faure <clement.faure@nxp.com> Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
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| 510e2aca | 22-Jul-2019 |
Clement Faure <clement.faure@nxp.com> |
core: imx: fix gpcv2 compilation
gpcv2 functions are only used by imx7 platform and not shared with other SoCs.
Signed-off-by: Clement Faure <clement.faure@nxp.com> Reviewed-by: Peng Fan <peng.fan@
core: imx: fix gpcv2 compilation
gpcv2 functions are only used by imx7 platform and not shared with other SoCs.
Signed-off-by: Clement Faure <clement.faure@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
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| 922308b3 | 11-Dec-2017 |
Peng Fan <peng.fan@nxp.com> |
drivers: imx_wdog: update wdog support for mx7ulp
Update watchdog for imx7ulp SoC support.
Signed-off-by: Peng Fan <peng.fan@nxp.com> Acked-by: Etienne Carriere <etienne.carriere@linaro.org> |
| 601976a5 | 11-Dec-2017 |
Peng Fan <peng.fan@nxp.com> |
drivers: imx_lpuart: add i.MX lpuart driver
add new lpuart driver This driver is used by the i.MX 7ulp SoC
Signed-off-by: Peng Fan <peng.fan@nxp.com> Acked-by: Etienne Carriere <etienne.carriere@li
drivers: imx_lpuart: add i.MX lpuart driver
add new lpuart driver This driver is used by the i.MX 7ulp SoC
Signed-off-by: Peng Fan <peng.fan@nxp.com> Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
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| 078f4341 | 02-Aug-2019 |
Clement Faure <clement.faure@nxp.com> |
core: imx: minor compilation fix
Merge compilation rules for a7_plat_init.S
Signed-off-by: Clement Faure <clement.faure@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Acked-by: Etienne Carriere
core: imx: minor compilation fix
Merge compilation rules for a7_plat_init.S
Signed-off-by: Clement Faure <clement.faure@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
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| 93aa0280 | 02-Aug-2019 |
Clement Faure <clement.faure@nxp.com> |
core: imx: fix soc revision for imx7
digproc registers layout differs for mx7
Signed-off-by: Clement Faure <clement.faure@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Acked-by: Etienne Carrier
core: imx: fix soc revision for imx7
digproc registers layout differs for mx7
Signed-off-by: Clement Faure <clement.faure@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
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| 247f081a | 02-Aug-2019 |
Clement Faure <clement.faure@nxp.com> |
core: imx: re-work SoC version detection
Move DIGPROG_OFFSET to appropriate registers header files. Store cpu type and SoC revision in global variables instead of reading ANATOP registers each time.
core: imx: re-work SoC version detection
Move DIGPROG_OFFSET to appropriate registers header files. Store cpu type and SoC revision in global variables instead of reading ANATOP registers each time. imx_digproc() now gets also the minor SoC revision.
Signed-off-by: Clement Faure <clement.faure@nxp.com> Reviewed-by: Peng Fan <peng.fan@nxp.com> Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
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| a8f769f3 | 12-Aug-2019 |
Etienne Carriere <etienne.carriere@linaro.org> |
core: rename versioning field in bootstrap TA header
Rename field version into ta_version in struct shdr_bootstrap_ta to explicit the info related to TA versioning.
Signed-off-by: Etienne Carriere
core: rename versioning field in bootstrap TA header
Rename field version into ta_version in struct shdr_bootstrap_ta to explicit the info related to TA versioning.
Signed-off-by: Etienne Carriere <etienne.carriere@linaro.org> Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org>
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| 7777fc6f | 13-Aug-2019 |
Clement Faure <clement.faure@nxp.com> |
core: unwind: fix function args for print_stack_arm64
Fix a build failure when CFG_TEE_CORE_LOG_LEVEL=0,
core/arch/arm/kernel/abort.c: In function ‘__print_stack_unwind’: core/arch/arm/kernel/abort
core: unwind: fix function args for print_stack_arm64
Fix a build failure when CFG_TEE_CORE_LOG_LEVEL=0,
core/arch/arm/kernel/abort.c: In function ‘__print_stack_unwind’: core/arch/arm/kernel/abort.c:85:2: error: too few arguments to function ‘print_stack_arm64’ print_stack_arm64(TRACE_ERROR, &state, thread_stack_start(), ^~~~~~~~~~~~~~~~~
Signed-off-by: Clement Faure <clement.faure@nxp.com> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 8ff6d687 | 13-Aug-2019 |
Sumit Garg <sumit.garg@linaro.org> |
core: ftrace: fix incorrect usage of ROUNDUP
Fix incorrect usage of ROUNDUP macro during ftrace data dump to normal world. It leads to random crashes dependent on ftrace buffer size.
Fixes: 153479a
core: ftrace: fix incorrect usage of ROUNDUP
Fix incorrect usage of ROUNDUP macro during ftrace data dump to normal world. It leads to random crashes dependent on ftrace buffer size.
Fixes: 153479acb74e ("core: dump ftrace data with ldelf") Signed-off-by: Sumit Garg <sumit.garg@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| cbb41c91 | 30-May-2019 |
Abhishek Shah <abhishek.shah@broadcom.com> |
drivers: wdt: Add arm SP805 watchdog driver
Add sp805 watchdog driver with following functionality: - start/reload watchdog with specified timeout - stop watchdog - ping watchdog (clear watchdog int
drivers: wdt: Add arm SP805 watchdog driver
Add sp805 watchdog driver with following functionality: - start/reload watchdog with specified timeout - stop watchdog - ping watchdog (clear watchdog interrupt and reload it) - register watchdog interrupt handler
Signed-off-by: Abhishek Shah <abhishek.shah@broadcom.com> Reviewed-by: Sandeep Tripathy <sandeep.tripathy@broadcom.com> Acked-by: Jens Wiklander <jens.wiklander@linaro.org> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
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| f5df167c | 09-Aug-2019 |
Sumit Garg <sumit.garg@linaro.org> |
ftrace: Add function execution time support
Add support to dump function execution time at corresponding function exit points in output ftrace buffer.
To achieve proper function execution time we n
ftrace: Add function execution time support
Add support to dump function execution time at corresponding function exit points in output ftrace buffer.
To achieve proper function execution time we need to exclude TA suspend time from timestamps, so add corresponding support in TEE core.
Also user mapping must be active to access ftrace buffer, so do that during TA resume.
Signed-off-by: Sumit Garg <sumit.garg@linaro.org> Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> Tested-by: Jerome Forissier <jerome.forissier@linaro.org> (QEMU) Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| edaf8c38 | 03-Jul-2019 |
Sumit Garg <sumit.garg@linaro.org> |
core: ftrace: Enable user-space access to counter regs
To enable function execution time support in function tracing output, user-space ftrace framework needs to access frequency register and physic
core: ftrace: Enable user-space access to counter regs
To enable function execution time support in function tracing output, user-space ftrace framework needs to access frequency register and physical counter register. So enable user-space access.
Signed-off-by: Sumit Garg <sumit.garg@linaro.org> Reviewed-by: Jerome Forissier <jerome.forissier@linaro.org> Reviewed-by: Jens Wiklander <jens.wiklander@linaro.org>
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| 14d6d42b | 26-Apr-2019 |
Jens Wiklander <jens.wiklander@linaro.org> |
core: add CFG_CORE_WORKAROUND_NSITR_CACHE_PRIME
Adds CFG_CORE_WORKAROUND_NSITR_CACHE_PRIME which if 'y' enables protection against a tool like Cachegrab (https://github.com/nccgroup/cachegrab), whic
core: add CFG_CORE_WORKAROUND_NSITR_CACHE_PRIME
Adds CFG_CORE_WORKAROUND_NSITR_CACHE_PRIME which if 'y' enables protection against a tool like Cachegrab (https://github.com/nccgroup/cachegrab), which uses non-secure interrupts to prime and later analyze the L1D, L1I and BTB caches to gain information from secure world execution.
Acked-by: Jerome Forissier <jerome.forissier@linaro.org> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org> Signed-off-by: Jens Wiklander <jens.wiklander@linaro.org>
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