1 // SPDX-License-Identifier: BSD-2-Clause 2 /* 3 * Copyright (c) 2016, Spreadtrum Communications Inc. 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions are met: 8 * 9 * 1. Redistributions of source code must retain the above copyright notice, 10 * this list of conditions and the following disclaimer. 11 * 12 * 2. Redistributions in binary form must reproduce the above copyright notice, 13 * this list of conditions and the following disclaimer in the documentation 14 * and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS" 17 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE 20 * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 21 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 22 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 23 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 24 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 25 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 26 * POSSIBILITY OF SUCH DAMAGE. 27 */ 28 29 #include <drivers/gic.h> 30 #include <kernel/generic_boot.h> 31 #include <kernel/panic.h> 32 #include <kernel/pm_stubs.h> 33 #include <mm/core_memprot.h> 34 #include <platform_config.h> 35 #include <trace.h> 36 #include <tee/entry_fast.h> 37 #include <tee/entry_std.h> 38 39 register_phys_mem_pgdir(MEM_AREA_IO_NSEC, 40 ROUNDDOWN(CONSOLE_UART_BASE, CORE_MMU_PGDIR_SIZE), 41 CORE_MMU_PGDIR_SIZE); 42 43 register_phys_mem_pgdir(MEM_AREA_IO_SEC, 44 ROUNDDOWN(GIC_BASE, CORE_MMU_PGDIR_SIZE), 45 CORE_MMU_PGDIR_SIZE); 46 47 register_phys_mem_pgdir(MEM_AREA_IO_SEC, 48 ROUNDDOWN(GIC_BASE + GICD_OFFSET, CORE_MMU_PGDIR_SIZE), 49 CORE_MMU_PGDIR_SIZE); 50 51 static void main_fiq(void); 52 53 static const struct thread_handlers handlers = { 54 .nintr = main_fiq, 55 .cpu_on = cpu_on_handler, 56 .cpu_off = pm_do_nothing, 57 .cpu_suspend = pm_do_nothing, 58 .cpu_resume = pm_do_nothing, 59 .system_off = pm_do_nothing, 60 .system_reset = pm_do_nothing, 61 }; 62 63 static struct gic_data gic_data; 64 65 const struct thread_handlers *generic_boot_get_handlers(void) 66 { 67 return &handlers; 68 } 69 70 void main_init_gic(void) 71 { 72 vaddr_t gicc_base; 73 vaddr_t gicd_base; 74 75 gicc_base = (vaddr_t)phys_to_virt(GIC_BASE + GICC_OFFSET, 76 MEM_AREA_IO_SEC); 77 gicd_base = (vaddr_t)phys_to_virt(GIC_BASE + GICD_OFFSET, 78 MEM_AREA_IO_SEC); 79 if (!gicc_base || !gicd_base) 80 panic(); 81 82 gic_init_base_addr(&gic_data, gicc_base, gicd_base); 83 84 itr_init(&gic_data.chip); 85 } 86 87 static void main_fiq(void) 88 { 89 gic_it_handle(&gic_data); 90 } 91