1 /* SPDX-License-Identifier: BSD-2-Clause */ 2 /* 3 * Copyright 2017-2019 NXP 4 */ 5 6 #ifndef __IMX8M_H__ 7 #define __IMX8M_H__ 8 9 #define GICD_BASE 0x38800000 10 #define GICR_BASE 0x38880000 11 #define UART1_BASE 0x30860000 12 #define UART2_BASE 0x30890000 13 #define UART3_BASE 0x30880000 14 #define UART4_BASE 0x30A60000 15 #define TZASC_BASE 0x32F80000 16 #define CAAM_BASE 0x30900000 17 #define ANATOP_BASE 0x30360000 18 19 #ifdef CFG_IMX8MQ 20 #define DIGPROG_OFFSET 0x06c 21 #endif 22 #ifdef CFG_IMX8MM 23 #define DIGPROG_OFFSET 0x800 24 #endif 25 26 #endif /* __IMX8M_H__ */ 27