| /OK3568_Linux_fs/kernel/arch/arm/boot/dts/ |
| H A D | rk3288-evb-rk628-rgb2hdmi-avb.dts | 88 assigned-clocks = <&cru DCLK_VOP0>;
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| H A D | rk3288-evb-rk628-rgb2lvds-dual-avb.dts | 144 assigned-clocks = <&cru DCLK_VOP0>;
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| H A D | rk3288-evb-rk628-rgb2lvds-avb.dts | 137 assigned-clocks = <&cru DCLK_VOP0>;
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| H A D | rk3288-evb-android-rk808-edp-avb.dts | 150 assigned-clocks = <&cru DCLK_VOP0>;
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| H A D | rk3288-th804-avb.dts | 183 assigned-clocks = <&cru DCLK_VOP0>;
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| H A D | rk3288-evb-rk628-rgb2dsi-avb.dts | 326 assigned-clocks = <&cru DCLK_VOP0>;
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| /OK3568_Linux_fs/u-boot/arch/arm/dts/ |
| H A D | OK3568-C.dts | 109 assigned-clocks = <&cru DCLK_VOP0>, <&cru DCLK_VOP1>, <&cru DCLK_VOP2>;
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| H A D | .OK3568-C.dtb.pre.tmp | |
| H A D | rk3288.dtsi | 719 clocks = <&cru ACLK_VOP0>, <&cru DCLK_VOP0>, <&cru HCLK_VOP0>;
1617 <&cru DCLK_VOP0>,
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| /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/display/rockchip/ |
| H A D | rockchip-vop.yaml | 113 <&cru DCLK_VOP0>,
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| /OK3568_Linux_fs/u-boot/drivers/clk/rockchip/ |
| H A D | clk_rk3528.c | 1057 case DCLK_VOP0: in rk3528_dclk_vop_get_clk()
1099 case DCLK_VOP0: in rk3528_dclk_vop_set_clk()
1403 case DCLK_VOP0: in rk3528_clk_get_rate()
1521 case DCLK_VOP0: in rk3528_clk_set_rate()
1573 case DCLK_VOP0: in rk3528_clk_set_parent()
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| H A D | clk_rk3288.c | 487 case DCLK_VOP0: in rockchip_vop_set_clk()
1186 case DCLK_VOP0: in rk3288_clk_set_rate()
1424 case DCLK_VOP0: in rk3288_vop_set_parent()
1444 case DCLK_VOP0: in rk3288_clk_set_parent()
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| H A D | clk_rk3588.c | 1066 case DCLK_VOP0: in rk3588_dclk_vop_get_clk()
1117 case DCLK_VOP0: in rk3588_dclk_vop_set_clk()
1617 case DCLK_VOP0: in rk3588_clk_get_rate()
1766 case DCLK_VOP0: in rk3588_clk_set_rate()
1957 case DCLK_VOP0: in rk3588_dclk_vop_set_parent()
1999 case DCLK_VOP0: in rk3588_clk_set_parent()
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| H A D | clk_rk3568.c | 1780 case DCLK_VOP0: in rk3568_dclk_vop_get_clk()
1821 case DCLK_VOP0: in rk3568_dclk_vop_set_clk()
2602 case DCLK_VOP0: in rk3568_clk_get_rate()
2788 case DCLK_VOP0: in rk3568_clk_set_rate()
3095 case DCLK_VOP0: in rk3568_dclk_vop_set_parent()
3203 case DCLK_VOP0: in rk3568_clk_set_parent()
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| H A D | clk_rk3399.c | 757 case DCLK_VOP0: in rk3399_vop_set_clk()
1180 case DCLK_VOP0: in rk3399_clk_get_rate()
1267 case DCLK_VOP0: in rk3399_clk_set_rate()
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| /OK3568_Linux_fs/kernel/include/dt-bindings/clock/ |
| H A D | rk3288-cru.h | 97 #define DCLK_VOP0 190 macro
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| H A D | rk3399-cru.h | 141 #define DCLK_VOP0 180 macro
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| H A D | rk3528-cru.h | 273 #define DCLK_VOP0 341 macro
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| H A D | rk3568-cru.h | 286 #define DCLK_VOP0 223 macro
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| /OK3568_Linux_fs/u-boot/include/dt-bindings/clock/ |
| H A D | rk3288-cru.h | 95 #define DCLK_VOP0 190 macro
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| H A D | rk3399-cru.h | 132 #define DCLK_VOP0 180 macro
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| H A D | rk3528-cru.h | 277 #define DCLK_VOP0 341 macro
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| H A D | rk3568-cru.h | 286 #define DCLK_VOP0 223 macro
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| /OK3568_Linux_fs/kernel/drivers/clk/rockchip/ |
| H A D | clk-rk3288.c | 227 "dclk_vop0", "dclk_vop1", "sclk_isp_jpe",
458 COMPOSITE(DCLK_VOP0, "dclk_vop0", mux_pll_src_cpll_gpll_npll_p, 0,
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| H A D | clk-rk3528.c | 841 …COMPOSITE_NODIV(DCLK_VOP0, "dclk_vop0", dclk_vop0_p, CLK_SET_RATE_PARENT | CLK_SET_RATE_NO_REPAREN…
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