Home
last modified time | relevance | path

Searched refs:con0 (Results 1 – 25 of 36) sorted by relevance

12

/rk3399_rockchip-uboot/drivers/video/drm/rk628/
H A Drk628_cru.c63 u32 con0 = 0, con1 = 0, con2 = 0; in rk628_cru_clk_get_rate_pll() local
94 rk628_i2c_read(rk628, offset + CRU_CPLL_CON0, &con0); in rk628_cru_clk_get_rate_pll()
98 bypass = (con0 & PLL_BYPASS_MASK) >> PLL_BYPASS_SHIFT; in rk628_cru_clk_get_rate_pll()
99 postdiv1 = (con0 & PLL_POSTDIV1_MASK) >> PLL_POSTDIV1_SHIFT; in rk628_cru_clk_get_rate_pll()
100 fbdiv = (con0 & PLL_FBDIV_MASK) >> PLL_FBDIV_SHIFT; in rk628_cru_clk_get_rate_pll()
/rk3399_rockchip-uboot/arch/arm/include/asm/arch-rockchip/
H A Dgrf_rv1103b.h38 uint32_t con0; /* address offset: 0x0000 */ member
47 uint32_t con0; /* address offset: 0x0000 */ member
H A Dcru_rk3188.h41 u32 con0; member
H A Dcru_rk3066.h41 u32 con0; member
H A Dsdram_rk3308.h21 u32 con0; member
H A Dcru_rk3128.h34 unsigned int con0; member
H A Dcru_rk3368.h31 unsigned int con0; member
H A Dgrf_rv1126b.h13 uint32_t con0; /* address offset: 0x0000 */ member
24 uint32_t con0; /* address offset: 0x0000 */ member
H A Dcru_rk322x.h33 unsigned int con0; member
H A Dcru_rk3036.h40 unsigned int con0; member
H A Dcru_rv1108.h28 unsigned int con0; member
H A Dcru_rk3288.h44 u32 con0; member
H A Dcru_rv1103b.h47 unsigned int con0; member
H A Dcru_rv1106.h56 unsigned int con0; member
H A Dcru_rk1808.h49 unsigned int con0; member
H A Dcru_rv1126.h82 unsigned int con0; member
H A Dcru_px30.h58 unsigned int con0; member
H A Dcru_rk3528.h49 unsigned int con0; member
H A Dcru_rv1126b.h53 unsigned int con0; member
H A Dcru_rk3588.h59 unsigned int con0; member
/rk3399_rockchip-uboot/drivers/clk/rockchip/
H A Dclk_rv1108.c93 rk_clrsetreg(&pll->con0, FBDIV_MASK, div->fbdiv << FBDIV_SHIFT); in rkclk_set_pll()
121 uint32_t con0, con1, con3; in rkclk_pll_get_rate() local
129 con0 = readl(&pll->con0); in rkclk_pll_get_rate()
131 fbdiv = (con0 >> FBDIV_SHIFT) & FBDIV_MASK; in rkclk_pll_get_rate()
H A Dclk_rk3066.c125 rk_clrsetreg(&pll->con0, in rkclk_set_pll()
267 con = readl(&pll->con0); in rkclk_pll_get_rate()
H A Dclk_rk3036.c85 rk_clrsetreg(&pll->con0, in rkclk_set_pll()
229 con = readl(&pll->con0); in rkclk_pll_get_rate()
H A Dclk_rk3188.c123 rk_clrsetreg(&pll->con0, in rkclk_set_pll()
265 con = readl(&pll->con0); in rkclk_pll_get_rate()
/rk3399_rockchip-uboot/drivers/ram/rockchip/
H A Dsdram_rv1108.c47 rk_clrsetreg(&priv->cru->pll[1].con0, FBDIV_MASK, in rkdclk_init()

12