| #
2304b5d3 |
| 09-Jul-2021 |
Finley Xiao <finley.xiao@rock-chips.com> |
clk: rockchip: rv1126: Add support for micsi out clk
It's essential to configure vccio4's io_vsel and iomux before clk
setting.
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Change-Id: Ib
clk: rockchip: rv1126: Add support for micsi out clk
It's essential to configure vccio4's io_vsel and iomux before clk
setting.
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Change-Id: Ibb404453d4f9218e4ccec1cc8d800d95f8bccda4
show more ...
|
| #
2bff5c68 |
| 22-Dec-2020 |
Finley Xiao <finley.xiao@rock-chips.com> |
clk: rockchip: rv1126: Only change APLL rate to 1008MHz for tb
fixes: (c1bad47 clk: rockchip: rv1126: Change APLL rate to 1008MHz)
Change-Id: If0c284af8c5710b43d353fdf6b12b226c288ae07
Signed-off-by
clk: rockchip: rv1126: Only change APLL rate to 1008MHz for tb
fixes: (c1bad47 clk: rockchip: rv1126: Change APLL rate to 1008MHz)
Change-Id: If0c284af8c5710b43d353fdf6b12b226c288ae07
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
show more ...
|
| #
b85730d9 |
| 16-Nov-2020 |
Finley Xiao <finley.xiao@rock-chips.com> |
clk: rockchip: rv1126: Fix mask bits for gmac src clks
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
Change-Id: I7f81a3e7586dcb85511502d3a329ac1cba7ccc8a
|
| #
a964d8e5 |
| 29-Sep-2020 |
Ziyuan Xu <xzy.xu@rock-chips.com> |
clk: rockchip: rv1126: mux partial clocks to GPLL for tb
Signed-off-by: Ziyuan Xu <xzy.xu@rock-chips.com>
Change-Id: I33d2396d0de5bb5fc81990a1ae10e4c80f45e5cd
|
| #
446ef41c |
| 21-Aug-2020 |
Joseph Chen <chenjh@rock-chips.com> |
clk: rockchip: rv1126: always support decompress clock get/set
The SPL without thunder-boot or U-Boot needs it.
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: Ie2d8b59e35fbc2056cfbc9
clk: rockchip: rv1126: always support decompress clock get/set
The SPL without thunder-boot or U-Boot needs it.
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: Ie2d8b59e35fbc2056cfbc910dae94419afcbfc09
show more ...
|
| #
5410c5c2 |
| 16-Apr-2020 |
Finley Xiao <finley.xiao@rock-chips.com> |
clk: rockchip: rv1126: Add clock init for isp and vop
Change-Id: I1c4a1267e90f84f6f7777a35e0ad5824b6eff2d1
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
|
| #
5ecc545e |
| 16-Apr-2020 |
Finley Xiao <finley.xiao@rock-chips.com> |
clk: rockchip: rv1126: Add support for decom clock
Change-Id: I90eacb03ed191b804911429af5ad80daab3776cc
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
|
| #
c17ccbf6 |
| 16-Apr-2020 |
Finley Xiao <finley.xiao@rock-chips.com> |
clk: rockchip: rv1126: Add support for isp and ispp clocks
Change-Id: Icfd87f56c30bfa81b6e7fecadcda090c26a8c465
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
|
| #
5a157e97 |
| 12-May-2020 |
Joseph Chen <chenjh@rock-chips.com> |
Merge branch 'thunder-boot' into next-dev
|
| #
2438a166 |
| 23-Apr-2020 |
Finley Xiao <finley.xiao@rock-chips.com> |
clk: rockchip: rv1126: Add support for gmac
Change-Id: I10ade6acbbfe5dd23e33a250ef601948606bc57e
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
|
| #
c1bad47f |
| 14-Apr-2020 |
Finley Xiao <finley.xiao@rock-chips.com> |
clk: rockchip: rv1126: Change APLL rate to 1008MHz
APLL from 600MHz to 1008MHz, increase cpu frequency.
Change-Id: If24475ff07f99c639a208cbfa23395544da4b6e8
Signed-off-by: Finley Xiao <finley.xiao@
clk: rockchip: rv1126: Change APLL rate to 1008MHz
APLL from 600MHz to 1008MHz, increase cpu frequency.
Change-Id: If24475ff07f99c639a208cbfa23395544da4b6e8
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
show more ...
|
| #
322971a6 |
| 14-Apr-2020 |
Finley Xiao <finley.xiao@rock-chips.com> |
clk: rockchip: rv1126: Change cpll and hpll rate
CPLL from 1000MHz to 500MHz, make clk_gmac_ethernet_out2io 25MHz comes
from CPLL.
HPLL form 1600MHz to 1400MHz, make npu 700MHz comes from HPLL.
Cha
clk: rockchip: rv1126: Change cpll and hpll rate
CPLL from 1000MHz to 500MHz, make clk_gmac_ethernet_out2io 25MHz comes
from CPLL.
HPLL form 1600MHz to 1400MHz, make npu 700MHz comes from HPLL.
Change-Id: I6633a83536054402ea8a9dc38abb33fe33503595
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
show more ...
|
| #
56a06ac8 |
| 14-Apr-2020 |
Finley Xiao <finley.xiao@rock-chips.com> |
clk: rockchip: rv1126: Add support to init hpll and 32k
Change-Id: If41a708d925c978e8db1e21b23c16d9a9a2e29d8
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
|
| #
f8cddc3e |
| 27-Mar-2020 |
Finley Xiao <finley.xiao@rock-chips.com> |
clk: rockchip: rv1126: Add support for SCR1
Change-Id: I22f0cea9ab0612250ab41526684dc3d786555a37
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
|
| #
95bd63d1 |
| 25-Mar-2020 |
Finley Xiao <finley.xiao@rock-chips.com> |
clk: rockchip: rv1126: Change HCLK_PDCORE_HZ to 200MHz
Change-Id: Ic5631f6ef4b7308b879b5701ba142c3e853b0672
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
|
| #
c71b5c88 |
| 06-Mar-2020 |
Finley Xiao <finley.xiao@rock-chips.com> |
clk: rockchip: rv1126: Fix aclk core mask and shift
Change-Id: I75de46000b3fd289cbe527850cf2dd50048e3b62
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
|
| #
57ae0852 |
| 26-Feb-2020 |
Finley Xiao <finley.xiao@rock-chips.com> |
clk: rockchip: rv1126: Add support for sfc and nandc
Change-Id: Ifb6873bf417adaaf95703064deeaed54b890b20b
Signed-off-by: Finley Xiao <finley.xiao@rock-chips.com>
|
| #
1633e8d2 |
| 21-Feb-2020 |
Joseph Chen <chenjh@rock-chips.com> |
board: rockchip: rename rv1109 to rv1126
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: Ie5cec1508ec54e15b24909eafab275609de5adea
|