| #
441bfb78 |
| 23-Jan-2019 |
Elaine Zhang <zhangqing@rock-chips.com> |
clk: rockchip: rk3188: print arm enter and init rate
Change-Id: I604c18050e8ccbbc9aa25ecd8f4379a877239d49
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
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| #
dcb51bfe |
| 16-Oct-2017 |
David Wu <david.wu@rock-chips.com> |
clk: rockchip: Add rk3188 SARADC clock support
The clk_saradc is dividing from the 24M, clk_saradc=24MHz/(saradc_div_con+1).
SARADC integer divider control register is 8-bits width.
Change-Id: I186
clk: rockchip: Add rk3188 SARADC clock support
The clk_saradc is dividing from the 24M, clk_saradc=24MHz/(saradc_div_con+1).
SARADC integer divider control register is 8-bits width.
Change-Id: I1869cd06615e037548e77eae65df4acdf666a058
Signed-off-by: David Wu <david.wu@rock-chips.com>
show more ...
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| #
f7853570 |
| 20-Mar-2017 |
Heiko Stübner <heiko@sntech.de> |
rockchip: clk: rk3188: Allow configuration of the armclk
The armclk starts in slow mode (24MHz) on the rk3188, which makes the whole
startup take a lot of time. We therefore want to at least move to
rockchip: clk: rk3188: Allow configuration of the armclk
The armclk starts in slow mode (24MHz) on the rk3188, which makes the whole
startup take a lot of time. We therefore want to at least move to the safe
600MHz value we can use with default pmic settings.
This is also the freqency the proprietary sdram-init leaves the cpu at.
For boards that have pmic control later in u-boot, we also add the option
to set the maximum frequency of 1.6GHz, if they so desire.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Simon Glass <sjg@chromium.org>
show more ...
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| #
f9515756 |
| 17-Mar-2017 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-rockchip
This includes support for rk3188 from Heiko Stübner and and rk3328 from
Kever Yang. Also included is SPL support for rk3399 and a fix for
rk3288 to get it bo
Merge git://git.denx.de/u-boot-rockchip
This includes support for rk3188 from Heiko Stübner and and rk3328 from
Kever Yang. Also included is SPL support for rk3399 and a fix for
rk3288 to get it booting again (spl_early_init()).
show more ...
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| #
dcdd3278 |
| 18-Feb-2017 |
Heiko Stübner <heiko@sntech.de> |
rockchip: rk3188: Add clock driver
Add a driver for setting up and modifying the various PLLs and peripheral
clocks on the RK3188.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Simon
rockchip: rk3188: Add clock driver
Add a driver for setting up and modifying the various PLLs and peripheral
clocks on the RK3188.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Simon Glass <sjg@chromium.org>
Tested-by: Kever Yang <kever.yang@rock-chips.com>
show more ...
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