clk: rockchip: rv1108: add support to set and get spi clock

Change-Id: I96891a4adb53bbb84e27cc0ac5eddf3c613c1baa
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

clk: rockchip: rv1108: add NANDC and SFC clk init

Currently RV1108 run in 1.2G GPLL.
NANDC need 1200 / 8 div = 150MHz.
SFC need 1200 / 12 div = 100MHz.

Change-Id: Ia3f401b0cf13587209d0d68d76a9891dd

clk: rockchip: rv1108: add NANDC and SFC clk init

Currently RV1108 run in 1.2G GPLL.
NANDC need 1200 / 8 div = 150MHz.
SFC need 1200 / 12 div = 100MHz.

Change-Id: Ia3f401b0cf13587209d0d68d76a9891dd3bcf990
Signed-off-by: Jon Lin <jon.lin@rock-chips.com>

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CRU: rv1108 add emmc clk get and set

Change-Id: I8cbfda46d2f7e84f11dbcca844d00c87559d0aa0
Signed-off-by: vicent.chi <vicent.chi@rock-chips.com>

clk: rockchip: rv1108: support i2c clk get and set rate

Change-Id: Iff7e9191e66e0eff828b9ea51cb952ee7139457f
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

rockchip: clk: rv1108: use ofdata_to_platdata for cru base

We use ofdata_to_platdata() to get cru base from dtb,
update the api with support for live dt.

Change-Id: I652c82a427693093d4ceca5d747543a

rockchip: clk: rv1108: use ofdata_to_platdata for cru base

We use ofdata_to_platdata() to get cru base from dtb,
update the api with support for live dt.

Change-Id: I652c82a427693093d4ceca5d747543af945b0986
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

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rockchip: clk: rv1108: Add some frequency setting interfaces

support PLL freq setting,
support bus and peri clk freq setting,
support aclk vio and dclk vop freq setting.

Change-Id: I894552c1e1bb1bd

rockchip: clk: rv1108: Add some frequency setting interfaces

support PLL freq setting,
support bus and peri clk freq setting,
support aclk vio and dclk vop freq setting.

Change-Id: I894552c1e1bb1bd13a143e200edf289234a53c1d
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>

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rockchip: clk: add device_bind_driver_to_node for reset driver

all rockchip socs add device_bind_driver_to_node,
to bound device rockchip reset to clock-controller.

Change-Id: I03c2a798d211fb4181d5

rockchip: clk: add device_bind_driver_to_node for reset driver

all rockchip socs add device_bind_driver_to_node,
to bound device rockchip reset to clock-controller.

Change-Id: I03c2a798d211fb4181d5fc0fd6db8609c6db04d2
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

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rockchip: clock: update sysreset driver bingding

Using priv for new sysreset driver binding.

Change-Id: I7ecc0a922086272651a6c7923afd2186c1cfeb7a
Signed-off-by: Kever Yang <kever.yang@rock-chips.co

rockchip: clock: update sysreset driver bingding

Using priv for new sysreset driver binding.

Change-Id: I7ecc0a922086272651a6c7923afd2186c1cfeb7a
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>

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rockchip: clk: Add rv1108 SARADC clock support

The clk_saradc is dividing from the 24M, clk_saradc=24MHz/(saradc_div_con+1).
SARADC integer divider control register is 10-bits width.

Change-Id: I1f

rockchip: clk: Add rv1108 SARADC clock support

The clk_saradc is dividing from the 24M, clk_saradc=24MHz/(saradc_div_con+1).
SARADC integer divider control register is 10-bits width.

Change-Id: I1ff152b72a75680601f22c5b621de8b2198a6778
Signed-off-by: David Wu <david.wu@rock-chips.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
(cherry picked from commit 2e4ce50d1aca35d13944f48a7e15d0b63e86eb38)

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Merge branch 'master' of git://git.denx.de/u-boot-rockchip

rockchip: clk: remove RATE_TO_DIV

Use DIV_ROUND_UP instead RATE_TO_DIV for all Rockchip SoC
clock driver.
Add or fix the div-field overflow check at the same time.

Signed-off-by: Kever Yang <kever.

rockchip: clk: remove RATE_TO_DIV

Use DIV_ROUND_UP instead RATE_TO_DIV for all Rockchip SoC
clock driver.
Add or fix the div-field overflow check at the same time.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Acked-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>

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clk_rv1108.c: Fix unused variable warning

The variables gpll_init_cfg and apll_init_cfg are unused in this file,
remove them.

Cc: Simon Glass <sjg@chromium.org>
Cc: Philipp Tomsich <philipp.tomsich

clk_rv1108.c: Fix unused variable warning

The variables gpll_init_cfg and apll_init_cfg are unused in this file,
remove them.

Cc: Simon Glass <sjg@chromium.org>
Cc: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
Signed-off-by: Tom Rini <trini@konsulko.com>
Reviewed-by: Simon Glass <sjg@chromium.org>

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Merge git://git.denx.de/u-boot-rockchip

Here is additional rk3368 and rk3399 support, rv1108 support,
refactoring HDMI video (brought in from Anatolij's tree to resolve
conflicts), some mkimage fixe

Merge git://git.denx.de/u-boot-rockchip

Here is additional rk3368 and rk3399 support, rv1108 support,
refactoring HDMI video (brought in from Anatolij's tree to resolve
conflicts), some mkimage fixes and a few other things.

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rockchip: clk: Add rv1108 clock driver

Add clock driver support for Rockchip rv1108 soc

Signed-off-by: Andy Yan <andy.yan@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>