Home
last modified time | relevance | path

Searched full:hclk_spdif (Results 1 – 25 of 33) sorted by relevance

12

/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/sound/
H A Drockchip-spdif.yaml99 clocks = <&cru SCLK_SPDIF>, <&cru HCLK_SPDIF>;
/OK3568_Linux_fs/u-boot/include/dt-bindings/clock/
H A Drk3188-cru-common.h112 #define HCLK_SPDIF 453 macro
H A Drk3128-cru.h124 #define HCLK_SPDIF 440 macro
H A Drk3288-cru.h195 #define HCLK_SPDIF 463 macro
H A Drk3368-cru.h188 #define HCLK_SPDIF 464 macro
H A Drk3399-cru.h312 #define HCLK_SPDIF 471 macro
H A Drk3528-cru.h249 #define HCLK_SPDIF 308 macro
H A Drk3562-cru.h148 #define HCLK_SPDIF 138 macro
/OK3568_Linux_fs/kernel/include/dt-bindings/clock/
H A Drk3188-cru-common.h114 #define HCLK_SPDIF 453 macro
H A Drk3128-cru.h124 #define HCLK_SPDIF 440 macro
H A Drk3288-cru.h197 #define HCLK_SPDIF 463 macro
H A Drk3368-cru.h168 #define HCLK_SPDIF 464 macro
H A Drk3399-cru.h323 #define HCLK_SPDIF 471 macro
H A Drk3528-cru.h245 #define HCLK_SPDIF 308 macro
H A Drk3562-cru.h148 #define HCLK_SPDIF 138 macro
/OK3568_Linux_fs/kernel/drivers/clk/rockchip/
H A Dclk-rk3128.c492 GATE(HCLK_SPDIF, "hclk_spdif", "hclk_peri", 0, RK2928_CLKGATE_CON(10), 9, GFLAGS),
H A Dclk-rk3188.c456 GATE(HCLK_SPDIF, "hclk_spdif", "hclk_cpu", 0, RK2928_CLKGATE_CON(7), 1, GFLAGS),
H A Dclk-rk3368.c709 GATE(HCLK_SPDIF, "hclk_spdif", "hclk_bus", 0, RK3368_CLKGATE_CON(12), 10, GFLAGS),
H A Dclk-rk3288.c698 GATE(HCLK_SPDIF, "hclk_spdif", "hclk_cpu", 0, RK3288_CLKGATE_CON(10), 10, GFLAGS),
H A Dclk-rk3528.c690 GATE(HCLK_SPDIF, "hclk_spdif", "hclk_rkvenc_root", 0,
H A Dclk-rk3562.c528 GATE(HCLK_SPDIF, "hclk_spdif", "hclk_peri", 0,
H A Dclk-rk3399.c1105 GATE(HCLK_SPDIF, "hclk_spdif", "hclk_perilp1", 0, RK3399_CLKGATE_CON(34), 3, GFLAGS),
/OK3568_Linux_fs/u-boot/arch/arm/dts/
H A Drk3188.dtsi95 clocks = <&cru HCLK_SPDIF>, <&cru SCLK_SPDIF>;
/OK3568_Linux_fs/kernel/arch/arm/boot/dts/
H A Drk3188.dtsi192 clocks = <&cru SCLK_SPDIF>, <&cru HCLK_SPDIF>;
/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/rockchip/
H A Drk3368.dtsi688 clocks = <&cru SCLK_SPDIF_8CH>, <&cru HCLK_SPDIF>;

12