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Searched refs:SCLK_I2S2 (Results 1 – 24 of 24) sorted by relevance

/OK3568_Linux_fs/u-boot/include/dt-bindings/clock/
H A Drk3188-cru-common.h34 #define SCLK_I2S2 77 macro
H A Drk3228-cru.h29 #define SCLK_I2S2 82 macro
H A Drv1108-cru.h27 #define SCLK_I2S2 77 macro
H A Dpx30-cru.h37 #define SCLK_I2S2 22 macro
H A Drk3328-cru.h32 #define SCLK_I2S2 43 macro
/OK3568_Linux_fs/kernel/include/dt-bindings/clock/
H A Drk3188-cru-common.h33 #define SCLK_I2S2 77 macro
H A Drk3228-cru.h29 #define SCLK_I2S2 82 macro
H A Drv1108-cru.h27 #define SCLK_I2S2 77 macro
H A Drk3328-cru.h32 #define SCLK_I2S2 43 macro
H A Dpx30-cru.h24 #define SCLK_I2S2 22 macro
/OK3568_Linux_fs/kernel/drivers/clk/rockchip/
H A Dclk-rk3228.c448 GATE(SCLK_I2S2, "sclk_i2s2", "i2s2_pre", CLK_SET_RATE_PARENT,
H A Dclk-rv1108.c532 GATE(SCLK_I2S2, "sclk_i2s2", "i2s2_pre", CLK_SET_RATE_PARENT,
H A Dclk-rk3188.c557 MUX(SCLK_I2S2, "sclk_i2s2", mux_sclk_i2s2_p, 0,
H A Dclk-rk3328.c402 GATE(SCLK_I2S2, "clk_i2s2", "i2s2_pre", CLK_SET_RATE_PARENT,
H A Dclk-px30.c643 GATE(SCLK_I2S2, "clk_i2s2", "clk_i2s2_mux", CLK_SET_RATE_PARENT,
/OK3568_Linux_fs/u-boot/arch/arm/dts/
H A Drk3066a.dtsi105 clocks = <&cru HCLK_I2S2>, <&cru SCLK_I2S2>;
H A Drk322x.dtsi180 clocks = <&cru SCLK_I2S2>, <&cru HCLK_I2S2_2CH>;
H A Drk3328.dtsi159 clocks = <&cru SCLK_I2S2>, <&cru HCLK_I2S2_2CH>;
H A Dpx30.dtsi265 clocks = <&cru SCLK_I2S2>, <&cru HCLK_I2S2>;
/OK3568_Linux_fs/kernel/arch/arm/boot/dts/
H A Drk3066a.dtsi307 clocks = <&cru HCLK_I2S1_2CH>, <&cru SCLK_I2S2>;
H A Drk322x.dtsi203 clocks = <&cru SCLK_I2S2>, <&cru HCLK_I2S2_2CH>;
H A Drk3128x.dtsi314 clocks = <&cru SCLK_I2S2>, <&cru HCLK_I2S2_2CH>;
/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/rockchip/
H A Drk3328.dtsi261 clocks = <&cru SCLK_I2S2>, <&cru HCLK_I2S2_2CH>;
H A Dpx30.dtsi734 clocks = <&cru SCLK_I2S2>, <&cru HCLK_I2S2>;