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Searched refs:PLL_PPLL (Results 1 – 25 of 33) sorted by relevance

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/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/rockchip/
H A Drk3399-vop-clk-set.dtsi43 assigned-clock-parents = <&pmucru PLL_PPLL>;
H A Drk1808-evb-x4.dts50 <&cru PLL_PPLL>, <&cru ARMCLK>,
H A Drk1808-evb-x4-second.dts50 <&cru PLL_PPLL>, <&cru ARMCLK>,
H A Drk3399pro-npu.dtsi340 <&cru PLL_PPLL>, <&cru ARMCLK>,
/OK3568_Linux_fs/u-boot/drivers/clk/rockchip/
H A Dclk_rk1808.c63 RK1808_CLK_DUMP(PLL_PPLL, "ppll", true),
90 [PPLL] = PLL(pll_rk3036, PLL_PPLL, RK1808_PMU_PLL_CON(0),
918 case PLL_PPLL: in rk1808_clk_get_rate()
1003 case PLL_PPLL: in rk1808_clk_set_rate()
H A Dclk_rk3528.c75 [PPLL] = PLL(pll_rk3328, PLL_PPLL, RK3528_PCIE_PLL_CON(32),
127 RK3528_CLK_DUMP(PLL_PPLL, "ppll"),
1358 case PLL_PPLL: in rk3528_clk_get_rate()
1480 case PLL_PPLL: in rk3528_clk_set_rate()
H A Dclk_rk3588.c65 [PPLL] = PLL(pll_rk3588, PLL_PPLL, RK3588_PMU_PLL_CON(128),
86 RK3588_CLK_DUMP(PLL_PPLL, "ppll", true),
1553 case PLL_PPLL: in rk3588_clk_get_rate()
1700 case PLL_PPLL: in rk3588_clk_set_rate()
H A Dclk_rk3568.c80 [PPLL] = PLL(pll_rk3328, PLL_PPLL, RK3568_PMU_PLL_CON(0),
102 RK3568_CLK_DUMP(PLL_PPLL, "ppll", false),
381 case PLL_PPLL: in rk3568_pmuclk_get_rate()
421 case PLL_PPLL: in rk3568_pmuclk_set_rate()
/OK3568_Linux_fs/u-boot/include/dt-bindings/clock/
H A Drk1808-cru.h12 #define PLL_PPLL 6 macro
H A Drk3399-cru.h343 #define PLL_PPLL 1 macro
H A Drk3528-cru.h16 #define PLL_PPLL 4 macro
H A Drk3568-cru.h13 #define PLL_PPLL 1 macro
H A Drk3588-cru.h21 #define PLL_PPLL 9 macro
/OK3568_Linux_fs/kernel/include/dt-bindings/clock/
H A Drk1808-cru.h12 #define PLL_PPLL 6 macro
H A Drk3399-cru.h354 #define PLL_PPLL 1 macro
H A Drk3528-cru.h16 #define PLL_PPLL 4 macro
H A Drk3568-cru.h13 #define PLL_PPLL 1 macro
H A Drk3588-cru.h21 #define PLL_PPLL 9 macro
/OK3568_Linux_fs/kernel/drivers/clk/rockchip/
H A Dclk-rk3528.c186 [ppll] = PLL(pll_rk3328, PLL_PPLL, "ppll", mux_pll_p,
H A Dclk-rk1808.c200 [ppll] = PLL(pll_rk3036, PLL_PPLL, "ppll", mux_pll_p,
H A Dclk-rk3399.c316 [ppll] = PLL(pll_rk3399, PLL_PPLL, "ppll", mux_pll_p, CLK_IS_CRITICAL, RK3399_PMU_PLL_CON(0),
H A Dclk-rk3568.c320 [ppll] = PLL(pll_rk3328, PLL_PPLL, "ppll", mux_pll_p,
H A Dclk-rk3588.c671 [ppll] = PLL(pll_rk3588_core, PLL_PPLL, "ppll", mux_pll_p,
/OK3568_Linux_fs/u-boot/arch/arm/dts/
H A Drk1808.dtsi300 <&cru PLL_PPLL>, <&cru ARMCLK>,
H A Drk3399.dtsi1257 assigned-clocks = <&pmucru PLL_PPLL>;

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