1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd 4 */ 5 6/dts-v1/; 7#include <dt-bindings/display/drm_mipi_dsi.h> 8#include "rk1808-evb.dtsi" 9 10/ { 11 model = "Rockchip RK1808 EVB X4 Board"; 12 compatible = "rockchip,rk1808-evb-x4", "rockchip,rk1808"; 13 14 chosen { 15 bootargs = "earlycon=uart8250,mmio32,0xff550000 console=ttyFIQ0 dump_initrd init=/init kpti=0"; 16 }; 17}; 18 19&adc_key { 20 power-key { 21 linux,code = <KEY_POWER>; 22 label = "power key"; 23 press-threshold-microvolt = <18000>; 24 }; 25}; 26 27/delete-node/ &backlight; 28/delete-node/ &vcc1v8_dvp; 29/delete-node/ &vdd1v5_dvp; 30/delete-node/ &vcc2v8_dvp; 31 32&cif { 33 status = "okay"; 34 35 port { 36 cif_in: endpoint@0 { 37 remote-endpoint = <&dphy_rx_out>; 38 data-lanes = <1 2 3 4>; 39 }; 40 }; 41}; 42 43&cif_mmu { 44 status = "okay"; 45}; 46 47&cru { 48 assigned-clocks = 49 <&cru PLL_GPLL>, <&cru PLL_CPLL>, 50 <&cru PLL_PPLL>, <&cru ARMCLK>, 51 <&cru MSCLK_PERI>, <&cru LSCLK_PERI>, 52 <&cru HSCLK_BUS_PRE>, <&cru MSCLK_BUS_PRE>, 53 <&cru LSCLK_BUS_PRE>, <&cru DCLK_VOPRAW>; 54 assigned-clock-rates = 55 <1188000000>, <1000000000>, 56 <100000000>, <816000000>, 57 <200000000>, <100000000>, 58 <300000000>, <200000000>, 59 <100000000>, <80000000>; 60}; 61 62&csi_tx { 63 status = "okay"; 64 65 panel@0 { 66 compatible = "simple-panel-dsi"; 67 reg = <0>; 68 dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST | 69 MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET | 70 MIPI_DSI_CLOCK_NON_CONTINUOUS)>; 71 dsi,format = <MIPI_CSI_FMT_RAW8>; 72 dsi,lanes = <4>; 73 74 display-timings { 75 native-mode = <&timing_1280x3_720>; 76 77 timing_1280x3_720: timing-1280x3-720 { 78 clock-frequency = <80000000>; 79 hactive = <3840>; 80 vactive = <720>; 81 hfront-porch = <1200>; 82 hsync-len = <500>; 83 hback-porch = <30>; 84 vfront-porch = <40>; 85 vsync-len = <20>; 86 vback-porch = <40>; 87 hsync-active = <0>; 88 vsync-active = <0>; 89 de-active = <0>; 90 pixelclk-active = <0>; 91 }; 92 timing_4k: timing-4k { 93 clock-frequency = <250000000>; 94 hactive = <3840>; 95 vactive = <2160>; 96 hfront-porch = <1500>; 97 hsync-len = <500>; 98 hback-porch = <30>; 99 vfront-porch = <40>; 100 vsync-len = <20>; 101 vback-porch = <40>; 102 hsync-active = <0>; 103 vsync-active = <0>; 104 de-active = <0>; 105 pixelclk-active = <0>; 106 }; 107 timing_4096: timing-4096 { 108 clock-frequency = <190000000>; 109 hactive = <4096>; 110 vactive = <2048>; 111 hfront-porch = <1500>; 112 hsync-len = <500>; 113 hback-porch = <30>; 114 vfront-porch = <40>; 115 vsync-len = <20>; 116 vback-porch = <40>; 117 hsync-active = <0>; 118 vsync-active = <0>; 119 de-active = <0>; 120 pixelclk-active = <0>; 121 }; 122 timing_1920x3_1080: timing-1920x3-1080 { 123 clock-frequency = <250000000>; 124 hactive = <5760>; 125 vactive = <1080>; 126 hfront-porch = <1500>; 127 hsync-len = <70>; 128 hback-porch = <30>; 129 vfront-porch = <40>; 130 vsync-len = <20>; 131 vback-porch = <40>; 132 hsync-active = <0>; 133 vsync-active = <0>; 134 de-active = <0>; 135 pixelclk-active = <0>; 136 }; 137 }; 138 }; 139}; 140 141&display_subsystem { 142 status = "okay"; 143}; 144 145&emmc { 146 status = "disabled"; 147}; 148 149&gmac { 150 status = "disabled"; 151}; 152 153&i2c0 { 154 status = "okay"; 155 156 vcamera@30 { 157 compatible = "rockchip,virtual-camera"; 158 reg = <0x30>; 159 width = <1280>; 160 height = <720>; 161 bus-format = <MEDIA_BUS_FMT_RGB888_1X24>; 162 163 port { 164 vcamera_out: endpoint { 165 remote-endpoint = <&dphy_rx_in>; 166 link-frequencies = /bits/ 64 <320000000>; 167 }; 168 }; 169 }; 170}; 171 172&i2c1 { 173 status = "disabled"; 174}; 175 176&i2c4 { 177 status = "disabled"; 178}; 179 180&mipi_dphy { 181 status = "okay"; 182}; 183 184&mipi_dphy_rx { 185 status = "okay"; 186 187 ports { 188 #address-cells = <1>; 189 #size-cells = <0>; 190 191 port@0 { 192 reg = <0>; 193 #address-cells = <1>; 194 #size-cells = <0>; 195 196 dphy_rx_in: endpoint@1 { 197 reg = <1>; 198 remote-endpoint = <&vcamera_out>; 199 data-lanes = <1 2 3 4>; 200 }; 201 }; 202 203 port@1 { 204 reg = <1>; 205 #address-cells = <1>; 206 #size-cells = <0>; 207 208 dphy_rx_out: endpoint@0 { 209 reg = <0>; 210 remote-endpoint = <&cif_in>; 211 }; 212 }; 213 }; 214}; 215 216&rk809_codec { 217 status = "disabled"; 218}; 219 220&rk_rga { 221 status = "okay"; 222}; 223 224&route_csi { 225 status = "disabled"; 226}; 227 228&sdmmc { 229 status = "disabled"; 230}; 231 232&sdio { 233 status = "disabled"; 234}; 235 236&sfc { 237 status = "okay"; 238}; 239 240&uart4 { 241 status = "disabled"; 242}; 243 244&wireless_bluetooth { 245 status = "disabled"; 246}; 247 248&wireless_wlan { 249 status = "disabled"; 250}; 251 252&tsadc { 253 rockchip,hw-tshut-mode = <1>; /* tshut mode 0:CRU 1:GPIO */ 254 rockchip,hw-tshut-polarity = <0>; /* tshut polarity 0:LOW 1:HIGH */ 255 pinctrl-names = "init", "default"; 256 pinctrl-0 = <&tsadc_otp_gpio>; 257 pinctrl-1 = <&tsadc_otp_out>; 258 status = "okay"; 259}; 260 261&vop_raw { 262 status = "okay"; 263}; 264 265&vopr_mmu { 266 status = "okay"; 267}; 268 269&vpu_mmu { 270 status = "okay"; 271}; 272