1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Copyright (c) 2018 Fuzhou Rockchip Electronics Co., Ltd 4 */ 5 6/dts-v1/; 7#include <dt-bindings/display/drm_mipi_dsi.h> 8#include "rk1808-evb.dtsi" 9 10/ { 11 model = "Rockchip RK1808 EVB X4 Board"; 12 compatible = "rockchip,rk1808-evb-x4", "rockchip,rk1808"; 13 14 chosen { 15 bootargs = "earlycon=uart8250,mmio32,0xff550000 console=ttyFIQ0 dump_initrd init=/init kpti=0"; 16 }; 17}; 18 19&adc_key { 20 power-key { 21 linux,code = <KEY_POWER>; 22 label = "power key"; 23 press-threshold-microvolt = <18000>; 24 }; 25}; 26 27/delete-node/ &backlight; 28/delete-node/ &vcc1v8_dvp; 29/delete-node/ &vdd1v5_dvp; 30/delete-node/ &vcc2v8_dvp; 31 32&cif { 33 status = "okay"; 34 35 port { 36 cif_in: endpoint@0 { 37 remote-endpoint = <&dphy_rx_out>; 38 data-lanes = <1 2 3 4>; 39 }; 40 }; 41}; 42 43&cif_mmu { 44 status = "okay"; 45}; 46 47&cru { 48 assigned-clocks = 49 <&cru PLL_GPLL>, <&cru PLL_CPLL>, 50 <&cru PLL_PPLL>, <&cru ARMCLK>, 51 <&cru MSCLK_PERI>, <&cru LSCLK_PERI>, 52 <&cru HSCLK_BUS_PRE>, <&cru MSCLK_BUS_PRE>, 53 <&cru LSCLK_BUS_PRE>, <&cru DCLK_VOPRAW>; 54 assigned-clock-rates = 55 <1188000000>, <1000000000>, 56 <100000000>, <816000000>, 57 <200000000>, <100000000>, 58 <300000000>, <200000000>, 59 <100000000>, <80000000>; 60}; 61 62&csi_tx { 63 status = "okay"; 64 csi-tx-bypass-mode = <1>; 65 66 panel@0 { 67 compatible = "simple-panel-dsi"; 68 reg = <0>; 69 dsi,flags = <(MIPI_DSI_MODE_VIDEO | MIPI_DSI_MODE_VIDEO_BURST | 70 MIPI_DSI_MODE_LPM | MIPI_DSI_MODE_EOT_PACKET | 71 MIPI_DSI_CLOCK_NON_CONTINUOUS)>; 72 dsi,format = <MIPI_CSI_FMT_RAW8>; 73 dsi,lanes = <4>; 74 75 display-timings { 76 native-mode = <&timing_1280x3_720>; 77 78 timing_1280x3_720: timing-1280x3-720 { 79 clock-frequency = <80000000>; 80 hactive = <3840>; 81 vactive = <720>; 82 hfront-porch = <1200>; 83 hsync-len = <500>; 84 hback-porch = <30>; 85 vfront-porch = <40>; 86 vsync-len = <20>; 87 vback-porch = <40>; 88 hsync-active = <0>; 89 vsync-active = <0>; 90 de-active = <0>; 91 pixelclk-active = <0>; 92 }; 93 timing_4k: timing-4k { 94 clock-frequency = <250000000>; 95 hactive = <3840>; 96 vactive = <2160>; 97 hfront-porch = <1500>; 98 hsync-len = <500>; 99 hback-porch = <30>; 100 vfront-porch = <40>; 101 vsync-len = <20>; 102 vback-porch = <40>; 103 hsync-active = <0>; 104 vsync-active = <0>; 105 de-active = <0>; 106 pixelclk-active = <0>; 107 }; 108 timing_4096: timing-4096 { 109 clock-frequency = <100000000>; 110 hactive = <4096>; 111 vactive = <2048>; 112 hfront-porch = <1500>; 113 hsync-len = <500>; 114 hback-porch = <30>; 115 vfront-porch = <40>; 116 vsync-len = <20>; 117 vback-porch = <40>; 118 hsync-active = <0>; 119 vsync-active = <0>; 120 de-active = <0>; 121 pixelclk-active = <0>; 122 }; 123 timing_1920x3_1080: timing-1920x3-1080 { 124 clock-frequency = <250000000>; 125 hactive = <5760>; 126 vactive = <1080>; 127 hfront-porch = <1500>; 128 hsync-len = <70>; 129 hback-porch = <30>; 130 vfront-porch = <40>; 131 vsync-len = <20>; 132 vback-porch = <40>; 133 hsync-active = <0>; 134 vsync-active = <0>; 135 de-active = <0>; 136 pixelclk-active = <0>; 137 }; 138 }; 139 }; 140}; 141 142&display_subsystem { 143 status = "okay"; 144}; 145 146&emmc { 147 status = "disabled"; 148}; 149 150&gmac { 151 status = "disabled"; 152}; 153 154&i2c0 { 155 status = "okay"; 156 157 vcamera@30 { 158 compatible = "rockchip,virtual-camera"; 159 reg = <0x30>; 160 width = <3840>; 161 height = <720>; 162 bus-format = <MEDIA_BUS_FMT_SBGGR8_1X8>; 163 164 port { 165 vcamera_out: endpoint { 166 remote-endpoint = <&dphy_rx_in>; 167 link-frequencies = /bits/ 64 <320000000>; 168 }; 169 }; 170 }; 171}; 172 173&i2c1 { 174 status = "disabled"; 175}; 176 177&i2c4 { 178 status = "disabled"; 179}; 180 181&mipi_dphy { 182 status = "okay"; 183}; 184 185&mipi_dphy_rx { 186 status = "okay"; 187 188 ports { 189 #address-cells = <1>; 190 #size-cells = <0>; 191 192 port@0 { 193 reg = <0>; 194 #address-cells = <1>; 195 #size-cells = <0>; 196 197 dphy_rx_in: endpoint@1 { 198 reg = <1>; 199 remote-endpoint = <&vcamera_out>; 200 data-lanes = <1 2 3 4>; 201 }; 202 }; 203 204 port@1 { 205 reg = <1>; 206 #address-cells = <1>; 207 #size-cells = <0>; 208 209 dphy_rx_out: endpoint@0 { 210 reg = <0>; 211 remote-endpoint = <&cif_in>; 212 }; 213 }; 214 }; 215}; 216 217&rk809_codec { 218 status = "disabled"; 219}; 220 221&rk_rga { 222 status = "okay"; 223}; 224 225&route_csi { 226 status = "disabled"; 227}; 228 229&sdmmc { 230 status = "disabled"; 231}; 232 233&sdio { 234 status = "disabled"; 235}; 236 237&sfc { 238 status = "okay"; 239}; 240 241&uart4 { 242 status = "disabled"; 243}; 244 245&wireless_bluetooth { 246 status = "disabled"; 247}; 248 249&wireless_wlan { 250 status = "disabled"; 251}; 252 253&tsadc { 254 rockchip,hw-tshut-mode = <1>; /* tshut mode 0:CRU 1:GPIO */ 255 rockchip,hw-tshut-polarity = <0>; /* tshut polarity 0:LOW 1:HIGH */ 256 pinctrl-names = "init", "default"; 257 pinctrl-0 = <&tsadc_otp_gpio>; 258 pinctrl-1 = <&tsadc_otp_out>; 259 status = "okay"; 260}; 261 262&vop_raw { 263 status = "okay"; 264}; 265 266&vopr_mmu { 267 status = "okay"; 268}; 269 270&vpu_mmu { 271 status = "okay"; 272}; 273