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Searched refs:mxc_ccm (Results 1 – 25 of 29) sorted by relevance

12

/OK3568_Linux_fs/u-boot/arch/arm/mach-imx/mx5/
H A Dclock.c74 struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)MXC_CCM_BASE; variable
78 clrsetbits_le32(&mxc_ccm->cscmr1, in set_usboh3_clk()
81 clrsetbits_le32(&mxc_ccm->cscdr1, in set_usboh3_clk()
92 clrsetbits_le32(&mxc_ccm->CCGR2, in enable_usboh3_clk()
112 setbits_le32(&mxc_ccm->CCGR1, mask); in enable_i2c_clk()
114 clrbits_le32(&mxc_ccm->CCGR1, mask); in enable_i2c_clk()
121 clrbits_le32(&mxc_ccm->cscmr1, MXC_CCM_CSCMR1_USB_PHY_CLK_SEL); in set_usb_phy_clk()
129 clrsetbits_le32(&mxc_ccm->CCGR2, in enable_usb_phy1_clk()
143 clrsetbits_le32(&mxc_ccm->CCGR4, in enable_usb_phy1_clk()
152 clrsetbits_le32(&mxc_ccm->CCGR4, in enable_usb_phy2_clk()
[all …]
/OK3568_Linux_fs/u-boot/board/engicam/icorem6/
H A Dicorem6.c55 struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR; in setup_gpmi_nand() local
61 clrbits_le32(&mxc_ccm->CCGR2, MXC_CCM_CCGR2_IOMUX_IPT_CLK_IO_MASK); in setup_gpmi_nand()
64 clrsetbits_le32(&mxc_ccm->cs2cdr, in setup_gpmi_nand()
73 setbits_le32(&mxc_ccm->CCGR2, MXC_CCM_CCGR2_IOMUX_IPT_CLK_IO_MASK); in setup_gpmi_nand()
76 setbits_le32(&mxc_ccm->CCGR4, in setup_gpmi_nand()
84 setbits_le32(&mxc_ccm->CCGR0, MXC_CCM_CCGR0_APBHDMA_MASK); in setup_gpmi_nand()
148 struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR; in setup_display() local
155 reg = __raw_readl(&mxc_ccm->CCGR3); in setup_display()
157 writel(reg, &mxc_ccm->CCGR3); in setup_display()
160 reg = readl(&mxc_ccm->cs2cdr); in setup_display()
[all …]
/OK3568_Linux_fs/u-boot/arch/arm/mach-imx/mx6/
H A Dclock.c1303 struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR; in enable_ipu_clock() local
1305 reg = readl(&mxc_ccm->CCGR3); in enable_ipu_clock()
1307 writel(reg, &mxc_ccm->CCGR3); in enable_ipu_clock()
1310 setbits_le32(&mxc_ccm->CCGR6, MXC_CCM_CCGR6_PRG_CLK0_MASK); in enable_ipu_clock()
1311 setbits_le32(&mxc_ccm->CCGR3, MXC_CCM_CCGR3_IPU2_IPU_MASK); in enable_ipu_clock()
1320 struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR; in disable_ldb_di_clock_sources() local
1324 reg = readl(&mxc_ccm->analog_pfd_528); in disable_ldb_di_clock_sources()
1330 writel(reg, &mxc_ccm->analog_pfd_528); in disable_ldb_di_clock_sources()
1333 reg = readl(&mxc_ccm->analog_pfd_480); in disable_ldb_di_clock_sources()
1335 writel(reg, &mxc_ccm->analog_pfd_480); in disable_ldb_di_clock_sources()
[all …]
H A Dsoc.c300 struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR; in set_ahb_rate() local
304 reg = readl(&mxc_ccm->cbcdr); in set_ahb_rate()
307 (div << MXC_CCM_CBCDR_AHB_PODF_OFFSET), &mxc_ccm->cbcdr); in set_ahb_rate()
312 struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR; in clear_mmdc_ch_mask() local
314 reg = readl(&mxc_ccm->ccdr); in clear_mmdc_ch_mask()
321 writel(reg, &mxc_ccm->ccdr); in clear_mmdc_ch_mask()
653 struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR; in imx_setup_hdmi() local
659 reg = readl(&mxc_ccm->CCGR2); in imx_setup_hdmi()
662 writel(reg, &mxc_ccm->CCGR2); in imx_setup_hdmi()
664 reg = readl(&mxc_ccm->chsccdr); in imx_setup_hdmi()
[all …]
/OK3568_Linux_fs/u-boot/board/engicam/geam6ul/
H A Dgeam6ul.c54 struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR; in setup_gpmi_nand() local
59 clrbits_le32(&mxc_ccm->CCGR4, in setup_gpmi_nand()
71 clrbits_le32(&mxc_ccm->cscmr1, in setup_gpmi_nand()
74 clrsetbits_le32(&mxc_ccm->cscdr1, in setup_gpmi_nand()
81 setbits_le32(&mxc_ccm->CCGR4, in setup_gpmi_nand()
89 setbits_le32(&mxc_ccm->CCGR0, MXC_CCM_CCGR0_APBHDMA_MASK); in setup_gpmi_nand()
/OK3568_Linux_fs/u-boot/board/engicam/isiotmx6ul/
H A Disiotmx6ul.c54 struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR; in setup_gpmi_nand() local
59 clrbits_le32(&mxc_ccm->CCGR4, in setup_gpmi_nand()
71 clrbits_le32(&mxc_ccm->cscmr1, in setup_gpmi_nand()
74 clrsetbits_le32(&mxc_ccm->cscdr1, in setup_gpmi_nand()
81 setbits_le32(&mxc_ccm->CCGR4, in setup_gpmi_nand()
89 setbits_le32(&mxc_ccm->CCGR0, MXC_CCM_CCGR0_APBHDMA_MASK); in setup_gpmi_nand()
/OK3568_Linux_fs/u-boot/board/aristainetos/
H A Daristainetos.c232 struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR; in setup_gpmi_nand() local
239 clrbits_le32(&mxc_ccm->CCGR2, MXC_CCM_CCGR2_IOMUX_IPT_CLK_IO_MASK); in setup_gpmi_nand()
242 clrsetbits_le32(&mxc_ccm->cs2cdr, in setup_gpmi_nand()
251 setbits_le32(&mxc_ccm->CCGR2, MXC_CCM_CCGR2_IOMUX_IPT_CLK_IO_MASK); in setup_gpmi_nand()
254 setbits_le32(&mxc_ccm->CCGR4, in setup_gpmi_nand()
262 setbits_le32(&mxc_ccm->CCGR0, MXC_CCM_CCGR0_APBHDMA_MASK); in setup_gpmi_nand()
H A Daristainetos-v1.c222 struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR; in setup_display() local
227 reg = readl(&mxc_ccm->cs2cdr); in setup_display()
231 writel(reg, &mxc_ccm->cs2cdr); in setup_display()
/OK3568_Linux_fs/u-boot/board/freescale/mx6sabreauto/
H A Dmx6sabreauto.c365 struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR; in setup_gpmi_nand() local
375 setbits_le32(&mxc_ccm->CCGR0, MXC_CCM_CCGR0_APBHDMA_MASK); in setup_gpmi_nand()
540 struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR; in setup_display() local
549 reg = readl(&mxc_ccm->CCGR3); in setup_display()
551 writel(reg, &mxc_ccm->CCGR3); in setup_display()
554 reg = readl(&mxc_ccm->cs2cdr); in setup_display()
559 writel(reg, &mxc_ccm->cs2cdr); in setup_display()
561 reg = readl(&mxc_ccm->cscmr2); in setup_display()
563 writel(reg, &mxc_ccm->cscmr2); in setup_display()
565 reg = readl(&mxc_ccm->chsccdr); in setup_display()
[all …]
/OK3568_Linux_fs/u-boot/board/barco/platinum/
H A Dplatinum.c66 struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR; in setup_gpmi_nand() local
72 clrsetbits_le32(&mxc_ccm->cs2cdr, in setup_gpmi_nand()
81 setbits_le32(&mxc_ccm->CCGR4, in setup_gpmi_nand()
89 setbits_le32(&mxc_ccm->CCGR0, MXC_CCM_CCGR0_APBHDMA_MASK); in setup_gpmi_nand()
/OK3568_Linux_fs/u-boot/board/kosagi/novena/
H A Dvideo.c387 struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR; in setup_display_clock() local
395 setbits_le32(&mxc_ccm->CCGR3, MXC_CCM_CCGR3_LDB_DI0_MASK); in setup_display_clock()
398 clrsetbits_le32(&mxc_ccm->cs2cdr, in setup_display_clock()
403 clrbits_le32(&mxc_ccm->cscmr2, MXC_CCM_CSCMR2_LDB_DI0_IPU_DIV); in setup_display_clock()
406 clrsetbits_le32(&mxc_ccm->chsccdr, in setup_display_clock()
/OK3568_Linux_fs/u-boot/board/ge/bx50v3/
H A Dbx50v3.c437 struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR; in setup_display_b850v3() local
443 clrbits_le32(&mxc_ccm->cscmr2, MXC_CCM_CSCMR2_LDB_DI0_IPU_DIV); in setup_display_b850v3()
448 clrsetbits_le32(&mxc_ccm->chsccdr, in setup_display_b850v3()
454 setbits_le32(&mxc_ccm->CCGR3, MXC_CCM_CCGR3_LDB_DI0_MASK); in setup_display_b850v3()
478 struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR; in setup_display_bx50v3() local
489 setbits_le32(&mxc_ccm->cscmr2, MXC_CCM_CSCMR2_LDB_DI0_IPU_DIV); in setup_display_bx50v3()
492 clrsetbits_le32(&mxc_ccm->chsccdr, in setup_display_bx50v3()
498 setbits_le32(&mxc_ccm->CCGR3, MXC_CCM_CCGR3_LDB_DI0_MASK); in setup_display_bx50v3()
/OK3568_Linux_fs/u-boot/board/freescale/mx6sabresd/
H A Dmx6sabresd.c488 struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR; in setup_display() local
499 reg = readl(&mxc_ccm->CCGR3); in setup_display()
501 writel(reg, &mxc_ccm->CCGR3); in setup_display()
504 reg = readl(&mxc_ccm->cs2cdr); in setup_display()
509 writel(reg, &mxc_ccm->cs2cdr); in setup_display()
511 reg = readl(&mxc_ccm->cscmr2); in setup_display()
513 writel(reg, &mxc_ccm->cscmr2); in setup_display()
515 reg = readl(&mxc_ccm->chsccdr); in setup_display()
520 writel(reg, &mxc_ccm->chsccdr); in setup_display()
/OK3568_Linux_fs/u-boot/board/phytec/pcm058/
H A Dpcm058.c293 struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR; in setup_gpmi_nand() local
299 clrbits_le32(&mxc_ccm->CCGR2, MXC_CCM_CCGR2_IOMUX_IPT_CLK_IO_MASK); in setup_gpmi_nand()
302 clrsetbits_le32(&mxc_ccm->cs2cdr, in setup_gpmi_nand()
311 setbits_le32(&mxc_ccm->CCGR2, MXC_CCM_CCGR2_IOMUX_IPT_CLK_IO_MASK); in setup_gpmi_nand()
314 setbits_le32(&mxc_ccm->CCGR4, in setup_gpmi_nand()
322 setbits_le32(&mxc_ccm->CCGR0, MXC_CCM_CCGR0_APBHDMA_MASK); in setup_gpmi_nand()
/OK3568_Linux_fs/u-boot/board/gateworks/gw_ventana/
H A Dgw_ventana.c101 struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR; in setup_gpmi_nand() local
107 clrsetbits_le32(&mxc_ccm->cs2cdr, in setup_gpmi_nand()
116 setbits_le32(&mxc_ccm->CCGR4, in setup_gpmi_nand()
124 setbits_le32(&mxc_ccm->CCGR0, MXC_CCM_CCGR0_APBHDMA_MASK); in setup_gpmi_nand()
432 struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR; in setup_display() local
439 reg = __raw_readl(&mxc_ccm->CCGR3); in setup_display()
441 writel(reg, &mxc_ccm->CCGR3); in setup_display()
444 reg = readl(&mxc_ccm->cs2cdr); in setup_display()
449 writel(reg, &mxc_ccm->cs2cdr); in setup_display()
451 reg = readl(&mxc_ccm->cscmr2); in setup_display()
[all …]
/OK3568_Linux_fs/u-boot/board/toradex/colibri_imx6/
H A Dcolibri_imx6.c572 struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR; in setup_display() local
579 reg = __raw_readl(&mxc_ccm->CCGR3); in setup_display()
581 writel(reg, &mxc_ccm->CCGR3); in setup_display()
584 reg = readl(&mxc_ccm->cs2cdr); in setup_display()
589 writel(reg, &mxc_ccm->cs2cdr); in setup_display()
591 reg = readl(&mxc_ccm->cscmr2); in setup_display()
593 writel(reg, &mxc_ccm->cscmr2); in setup_display()
595 reg = readl(&mxc_ccm->chsccdr); in setup_display()
598 writel(reg, &mxc_ccm->chsccdr); in setup_display()
/OK3568_Linux_fs/u-boot/board/boundary/nitrogen6x/
H A Dnitrogen6x.c757 struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR; in setup_display() local
764 reg = __raw_readl(&mxc_ccm->CCGR3); in setup_display()
766 writel(reg, &mxc_ccm->CCGR3); in setup_display()
769 reg = readl(&mxc_ccm->cs2cdr); in setup_display()
774 writel(reg, &mxc_ccm->cs2cdr); in setup_display()
776 reg = readl(&mxc_ccm->cscmr2); in setup_display()
778 writel(reg, &mxc_ccm->cscmr2); in setup_display()
780 reg = readl(&mxc_ccm->chsccdr); in setup_display()
783 writel(reg, &mxc_ccm->chsccdr); in setup_display()
/OK3568_Linux_fs/u-boot/board/barco/titanium/
H A Dtitanium.c159 struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR; in setup_gpmi_nand() local
166 clrsetbits_le32(&mxc_ccm->cs2cdr, in setup_gpmi_nand()
175 setbits_le32(&mxc_ccm->CCGR4, in setup_gpmi_nand()
183 setbits_le32(&mxc_ccm->CCGR0, MXC_CCM_CCGR0_APBHDMA_MASK); in setup_gpmi_nand()
/OK3568_Linux_fs/u-boot/board/phytec/pfla02/
H A Dpfla02.c275 struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR; in setup_gpmi_nand() local
281 clrbits_le32(&mxc_ccm->CCGR2, MXC_CCM_CCGR2_IOMUX_IPT_CLK_IO_MASK); in setup_gpmi_nand()
284 clrsetbits_le32(&mxc_ccm->cs2cdr, in setup_gpmi_nand()
293 setbits_le32(&mxc_ccm->CCGR2, MXC_CCM_CCGR2_IOMUX_IPT_CLK_IO_MASK); in setup_gpmi_nand()
296 setbits_le32(&mxc_ccm->CCGR4, in setup_gpmi_nand()
304 setbits_le32(&mxc_ccm->CCGR0, MXC_CCM_CCGR0_APBHDMA_MASK); in setup_gpmi_nand()
/OK3568_Linux_fs/u-boot/board/toradex/apalis_imx6/
H A Dapalis_imx6.c694 struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR; in setup_display() local
701 reg = __raw_readl(&mxc_ccm->CCGR3); in setup_display()
703 writel(reg, &mxc_ccm->CCGR3); in setup_display()
706 reg = readl(&mxc_ccm->cs2cdr); in setup_display()
711 writel(reg, &mxc_ccm->cs2cdr); in setup_display()
713 reg = readl(&mxc_ccm->cscmr2); in setup_display()
715 writel(reg, &mxc_ccm->cscmr2); in setup_display()
717 reg = readl(&mxc_ccm->chsccdr); in setup_display()
720 writel(reg, &mxc_ccm->chsccdr); in setup_display()
/OK3568_Linux_fs/u-boot/board/embest/mx6boards/
H A Dmx6boards.c461 struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR; in setup_display() local
469 setbits_le32(&mxc_ccm->CCGR3, in setup_display()
473 clrsetbits_le32(&mxc_ccm->cs2cdr, in setup_display()
477 setbits_le32(&mxc_ccm->cscmr2, in setup_display()
480 setbits_le32(&mxc_ccm->chsccdr, in setup_display()
/OK3568_Linux_fs/u-boot/drivers/video/
H A Dipu_common.c26 extern struct mxc_ccm_reg *mxc_ccm;
160 reg = __raw_readl(&mxc_ccm->ccdr); in clk_ipu_enable()
162 __raw_writel(reg, &mxc_ccm->ccdr); in clk_ipu_enable()
165 reg = __raw_readl(&mxc_ccm->clpcr); in clk_ipu_enable()
167 __raw_writel(reg, &mxc_ccm->clpcr); in clk_ipu_enable()
185 reg = __raw_readl(&mxc_ccm->ccdr); in clk_ipu_disable()
187 __raw_writel(reg, &mxc_ccm->ccdr); in clk_ipu_disable()
190 reg = __raw_readl(&mxc_ccm->clpcr); in clk_ipu_disable()
192 __raw_writel(reg, &mxc_ccm->clpcr); in clk_ipu_disable()
/OK3568_Linux_fs/u-boot/board/advantech/dms-ba16/
H A Ddms-ba16.c397 struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR; in setup_display() local
400 clrbits_le32(&mxc_ccm->cscmr2, MXC_CCM_CSCMR2_LDB_DI0_IPU_DIV); in setup_display()
405 clrsetbits_le32(&mxc_ccm->chsccdr, in setup_display()
411 setbits_le32(&mxc_ccm->CCGR3, MXC_CCM_CCGR3_LDB_DI0_MASK); in setup_display()
/OK3568_Linux_fs/u-boot/board/wandboard/
H A Dwandboard.c352 struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR; in setup_display() local
358 reg = readl(&mxc_ccm->chsccdr); in setup_display()
361 writel(reg, &mxc_ccm->chsccdr); in setup_display()
/OK3568_Linux_fs/u-boot/board/congatec/cgtqmx6eval/
H A Dcgtqmx6eval.c628 struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR; in setup_display() local
636 setbits_le32(&mxc_ccm->CCGR3, MXC_CCM_CCGR3_LDB_DI0_MASK | in setup_display()
640 reg = readl(&mxc_ccm->cs2cdr); in setup_display()
645 writel(reg, &mxc_ccm->cs2cdr); in setup_display()
647 setbits_le32(&mxc_ccm->cscmr2, MXC_CCM_CSCMR2_LDB_DI0_IPU_DIV | in setup_display()
650 setbits_le32(&mxc_ccm->chsccdr, CHSCCDR_CLK_SEL_LDB_DI0 << in setup_display()

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