1303 	struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR;  in enable_ipu_clock()  local
1305 	reg = readl(&mxc_ccm->CCGR3);  in enable_ipu_clock()
1307 	writel(reg, &mxc_ccm->CCGR3);  in enable_ipu_clock()
1310 		setbits_le32(&mxc_ccm->CCGR6, MXC_CCM_CCGR6_PRG_CLK0_MASK);  in enable_ipu_clock()
1311 		setbits_le32(&mxc_ccm->CCGR3, MXC_CCM_CCGR3_IPU2_IPU_MASK);  in enable_ipu_clock()
1320 	struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR;  in disable_ldb_di_clock_sources()  local
1324 	reg = readl(&mxc_ccm->analog_pfd_528);  in disable_ldb_di_clock_sources()
1330 	writel(reg, &mxc_ccm->analog_pfd_528);  in disable_ldb_di_clock_sources()
1333 	reg = readl(&mxc_ccm->analog_pfd_480);  in disable_ldb_di_clock_sources()
1335 	writel(reg, &mxc_ccm->analog_pfd_480);  in disable_ldb_di_clock_sources()
1338 	reg = readl(&mxc_ccm->analog_pll_video);  in disable_ldb_di_clock_sources()
1340 	writel(reg, &mxc_ccm->analog_pll_video);  in disable_ldb_di_clock_sources()
1345 	struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR;  in enable_ldb_di_clock_sources()  local
1348 	reg = readl(&mxc_ccm->analog_pfd_528);  in enable_ldb_di_clock_sources()
1353 	writel(reg, &mxc_ccm->analog_pfd_528);  in enable_ldb_di_clock_sources()
1355 	reg = readl(&mxc_ccm->analog_pfd_480);  in enable_ldb_di_clock_sources()
1357 	writel(reg, &mxc_ccm->analog_pfd_480);  in enable_ldb_di_clock_sources()
1366 	struct mxc_ccm_reg *mxc_ccm = (struct mxc_ccm_reg *)CCM_BASE_ADDR;  in select_ldb_di_clock_source()  local
1394 	reg = readl(&mxc_ccm->ccdr);  in select_ldb_di_clock_source()
1396 	writel(reg, &mxc_ccm->ccdr);  in select_ldb_di_clock_source()
1399 	reg = readl(&mxc_ccm->cbcmr);  in select_ldb_di_clock_source()
1401 	writel(reg, &mxc_ccm->cbcmr);  in select_ldb_di_clock_source()
1407 	reg = readl(&mxc_ccm->cbcdr);  in select_ldb_di_clock_source()
1409 	writel(reg, &mxc_ccm->cbcdr);  in select_ldb_di_clock_source()
1412 	while (readl(&mxc_ccm->cdhipr))  in select_ldb_di_clock_source()
1415 	reg = readl(&mxc_ccm->ccsr);  in select_ldb_di_clock_source()
1417 	writel(reg, &mxc_ccm->ccsr);  in select_ldb_di_clock_source()
1420 	reg = readl(&mxc_ccm->cs2cdr);  in select_ldb_di_clock_source()
1423 	writel(reg, &mxc_ccm->cs2cdr);  in select_ldb_di_clock_source()
1426 	reg = readl(&mxc_ccm->cs2cdr);  in select_ldb_di_clock_source()
1431 	writel(reg, &mxc_ccm->cs2cdr);  in select_ldb_di_clock_source()
1434 	reg = readl(&mxc_ccm->cs2cdr);  in select_ldb_di_clock_source()
1439 	writel(reg, &mxc_ccm->cs2cdr);  in select_ldb_di_clock_source()
1442 	reg = readl(&mxc_ccm->ccsr);  in select_ldb_di_clock_source()
1444 	writel(reg, &mxc_ccm->ccsr);  in select_ldb_di_clock_source()
1450 	reg = readl(&mxc_ccm->cbcdr);  in select_ldb_di_clock_source()
1452 	writel(reg, &mxc_ccm->cbcdr);  in select_ldb_di_clock_source()
1455 	while (readl(&mxc_ccm->cdhipr))  in select_ldb_di_clock_source()
1458 	reg = readl(&mxc_ccm->ccdr);  in select_ldb_di_clock_source()
1460 	writel(reg, &mxc_ccm->ccdr);  in select_ldb_di_clock_source()