| 39848945 | 09-May-2018 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
SPM: Do not trap S-EL0 access to SVE/SIMD/FP regs
This allows secure partitions to access these registers. This is
needed in some cases. For example, it has been reported that in order
to implement
SPM: Do not trap S-EL0 access to SVE/SIMD/FP regs
This allows secure partitions to access these registers. This is
needed in some cases. For example, it has been reported that in order
to implement secure storage services, a secure partition needs to
encrypt/decrypt some authentication variables, which requires FP/SIMD
support.
Note that SPM will not do any saving/restoring of these registers on
behalf of the SP. This falls under the SP's responsibility.
Also note that if the SP gets preempted, it might not get a chance to
save/restore FP/SIMD registers first. This patch does not address this
problem. It only serves as a temporary solution to unblock development
on the secure partition side.
Change-Id: I3b8ccdebdac0219f6ac96ad66ab2be0be8374ad3
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
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| b3323cd6 | 17-Apr-2018 |
Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
Fix some MISRA defects in SPM code
Change-Id: I989c1f4aef8e3cb20d5d19e6347575e6449bb60b
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
| 6ab136c2 | 29-Mar-2018 |
Dimitris Papastamos <dimitris.papastamos@arm.com> |
Merge pull request #1313 from jonathanwright-ARM/jw/MISRA-switch-statements
Fix switch statements to comply with MISRA rules |
| 9f85f9e3 | 21-Mar-2018 |
Joel Hutton <Joel.Hutton@Arm.com> |
Clean usage of void pointers to access symbols
Void pointers have been used to access linker symbols, by declaring an
extern pointer, then taking the address of it. This limits symbols
values to ali
Clean usage of void pointers to access symbols
Void pointers have been used to access linker symbols, by declaring an
extern pointer, then taking the address of it. This limits symbols
values to aligned pointer values. To remove this restriction an
IMPORT_SYM macro has been introduced, which declares it as a char
pointer and casts it to the required type.
Change-Id: I89877fc3b13ed311817bb8ba79d4872b89bfd3b0
Signed-off-by: Joel Hutton <Joel.Hutton@Arm.com>
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| 185a23ff | 14-Mar-2018 |
Jonathan Wright <jonathan.wright@arm.com> |
services: fix switch statements to comply with MISRA rules
Ensure (where possible) that switch statements in services comply with
MISRA rules 16.1 - 16.7.
Change-Id: I47bf6ed4a026201e6fe125ce518424
services: fix switch statements to comply with MISRA rules
Ensure (where possible) that switch statements in services comply with
MISRA rules 16.1 - 16.7.
Change-Id: I47bf6ed4a026201e6fe125ce51842482e99e8bb0
Signed-off-by: Jonathan Wright <jonathan.wright@arm.com>
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| 085e80ec | 21-Mar-2018 |
Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
Rename 'smcc' to 'smccc'
When the source code says 'SMCC' it is talking about the SMC Calling
Convention. The correct acronym is SMCCC. This affects a few definitions
and file names.
Some files hav
Rename 'smcc' to 'smccc'
When the source code says 'SMCC' it is talking about the SMC Calling
Convention. The correct acronym is SMCCC. This affects a few definitions
and file names.
Some files have been renamed (smcc.h, smcc_helpers.h and smcc_macros.S)
but the old files have been kept for compatibility, they include the
new ones with an ERROR_DEPRECATED guard.
Change-Id: I78f94052a502436fdd97ca32c0fe86bd58173f2f
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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|
| 73a96051 | 28-Feb-2018 |
davidcunado-arm <david.cunado@arm.com> |
Merge pull request #1282 from robertovargas-arm/misra-changes
Misra changes |
| 7fabe1a8 | 12-Feb-2018 |
Roberto Vargas <roberto.vargas@arm.com> |
Fix MISRA rule 8.4 in common code
Rule 8.4: A compatible declaration shall be visible when
an object or function with external linkage is defined.
Change-Id: I26e042cb251a6f9590afa1340fda
Fix MISRA rule 8.4 in common code
Rule 8.4: A compatible declaration shall be visible when
an object or function with external linkage is defined.
Change-Id: I26e042cb251a6f9590afa1340fdac73e42f23979
Signed-off-by: Roberto Vargas <roberto.vargas@arm.com>
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| 8e3032f9 | 22-Jan-2018 |
Jeenu Viswambharan <jeenu.viswambharan@arm.com> |
SDEI: Pop dispatch context only after error checking
Currently, when the client attempts to do SDEI_EVENT_COMPLETE or
SDEI_EVENT_COMPLETE_AND_RESUME, the dispatcher pops off the outstanding
dispatch
SDEI: Pop dispatch context only after error checking
Currently, when the client attempts to do SDEI_EVENT_COMPLETE or
SDEI_EVENT_COMPLETE_AND_RESUME, the dispatcher pops off the outstanding
dispatch context for sanity check. There are however other checks
following this, which could potentially return failure. If that happens,
by popping the context, the dispatcher has inadvertently discarded a
valid context.
This patch fixes this bug by inspecting (not actually popping) the
outstanding context. The context is popped only after all error checks
are completed.
Change-Id: Ie199f6442f871a8177a8247a0c646543bad76d21
Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
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|
| 6bf0e079 | 19-Feb-2018 |
Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
Ensure the correct execution of TLBI instructions
After executing a TLBI a DSB is needed to ensure completion of the
TLBI.
rk3328: The MMU is allowed to load TLB entries for as long as it is
enable
Ensure the correct execution of TLBI instructions
After executing a TLBI a DSB is needed to ensure completion of the
TLBI.
rk3328: The MMU is allowed to load TLB entries for as long as it is
enabled. Because of this, the correct place to execute a TLBI is right
after disabling the MMU.
Change-Id: I8280f248d10b49a8c354a4ccbdc8f8345ac4c170
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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|
| fb1198b1 | 14-Feb-2018 |
Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
Remove URLs from comments
This fixes all defects according to MISRA Rule 3.1: "The character
sequences /* and // shall not be used within a comment". This affects
all URLs in comments, so they have
Remove URLs from comments
This fixes all defects according to MISRA Rule 3.1: "The character
sequences /* and // shall not be used within a comment". This affects
all URLs in comments, so they have been removed:
- The link in `sdei_state.c` can also be found in the documentation file
`docs/sdei.rst`.
- The bug that the file `io_fip.c` talks about doesn't affect the
currently supported version of GCC, so it doesn't make sense to keep
the comment. Note that the version of GCC officially supported is the
one that comes with Linaro Release 17.10, which is GCC 6.2.
- The link in `tzc400.c` was broken, and it didn't correctly direct to
the Technical Reference Manual it should. The link has been replaced
by the title of the document, which is more convenient when looking
for the document.
Change-Id: I89f60c25f635fd4c008a5d3a14028f814c147bbe
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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| a5b4c400 | 08-Jan-2018 |
Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
SPM: Fix version header definitions
Rename SP_VERSION macros to MM_VERSION, which is the name used in the MM
specification [1]. Also, a few more helper macros have been added.
MM-specific definitio
SPM: Fix version header definitions
Rename SP_VERSION macros to MM_VERSION, which is the name used in the MM
specification [1]. Also, a few more helper macros have been added.
MM-specific definitions have been moved to their own header file.
[1] http://infocenter.arm.com/help/topic/com.arm.doc.den0060a/DEN0060A_ARM_MM_Interface_Specification.pdf
Change-Id: Ia10e48c7e81a7a1f5eeca29a5270cae740a4a88a
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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|
| a43c85db | 08-Jan-2018 |
Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
SPM: Allow secondary CPUs to use the Secure Partition
The Secure Partition should be able to be used from any CPU, not just
the lead one. This patch point the secure contexts of all secondary
CPUs t
SPM: Allow secondary CPUs to use the Secure Partition
The Secure Partition should be able to be used from any CPU, not just
the lead one. This patch point the secure contexts of all secondary
CPUs to the same one used by the lead CPU for the Secure Partition. This
way, they can also use it.
In order to prevent more than one CPU from using the Secure Partition at
the same time, a lock has been added.
Change-Id: Ica76373127c3626498b06c558a4874ce72201ff7
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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|
| 26bd5f82 | 18-Dec-2017 |
Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
SPM: Move initialization flag to context struct
Whether a Secure Partition is being initialized or not is something
related to that specific partition, so it should be saved with the
rest of the inf
SPM: Move initialization flag to context struct
Whether a Secure Partition is being initialized or not is something
related to that specific partition, so it should be saved with the
rest of the information related to it.
Change-Id: Ie8a780f70df83fb03ef9c01ba37960208d9b5319
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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|
| 4d2787ce | 07-Dec-2017 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
SPM: Fix MM_COMMUNICATE_AARCH32/64 parameters
This partially reverts commit d6b532b50f8, keeping only the fixes to
the assertions. The changes related to the order of arguments passed
to the secure
SPM: Fix MM_COMMUNICATE_AARCH32/64 parameters
This partially reverts commit d6b532b50f8, keeping only the fixes to
the assertions. The changes related to the order of arguments passed
to the secure partition were not correct and violated the
specification of the SP_EVENT_COMPLETE SMC.
This patch also improves the MM_COMMUNICATE argument validation. The
cookie argument, as it comes from normal world, can't be trusted and thus
needs to always be validated at run time rather than using an assertion.
Also validate the communication buffer address and return
INVALID_PARAMETER if it is zero, as per the MM specification.
Fix a few typos in comments and use the "secure partition" terminology
rather than "secure payload".
Change-Id: Ice6b7b5494b729dd44611f9a93d362c55ab244f7
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
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|
| 83df7ce3 | 10-Dec-2017 |
davidcunado-arm <david.cunado@arm.com> |
Merge pull request #1187 from antonio-nino-diaz-arm/an/spm-xlat-dram
SPM: Move S-EL1/S-EL0 xlat tables to TZC DRAM |
| 9f0ee04f | 09-Dec-2017 |
davidcunado-arm <david.cunado@arm.com> |
Merge pull request #1184 from antonio-nino-diaz-arm/an/bl31-in-dram
fvp: Disable SYSTEM_SUSPEND when ARM_BL31_IN_DRAM |
| 62854fce | 09-Dec-2017 |
davidcunado-arm <david.cunado@arm.com> |
Merge pull request #1183 from jeenu-arm/sdei-reset-fix
SDEI: Fix return value of reset calls |
| 45d640f0 | 17-Nov-2017 |
Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
SPM: Move S-EL1/S-EL0 xlat tables to TZC DRAM
A new platform define, `PLAT_SP_IMAGE_XLAT_SECTION_NAME`, has been
introduced to select the section where the translation tables used by
the S-EL1/S-EL0
SPM: Move S-EL1/S-EL0 xlat tables to TZC DRAM
A new platform define, `PLAT_SP_IMAGE_XLAT_SECTION_NAME`, has been
introduced to select the section where the translation tables used by
the S-EL1/S-EL0 are placed.
This define has been used to move the translation tables to DRAM secured
by TrustZone.
Most of the extra needed space in BL31 when SPM is enabled is due to the
large size of the translation tables. By moving them to this memory
region we can save 44 KiB.
A new argument has been added to REGISTER_XLAT_CONTEXT2() to specify the
region where the translation tables have to be placed by the linker.
Change-Id: Ia81709b4227cb8c92601f0caf258f624c0467719
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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| 2633dfeb | 24-Nov-2017 |
Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
SPM: Remove ARM platforms header from SPM common code
Common code mustn't include ARM platforms headers.
Change-Id: Ib6e4f5a77c2d095e6e8c3ad89c89cb1959cd3043
Signed-off-by: Antonio Nino Diaz <anton
SPM: Remove ARM platforms header from SPM common code
Common code mustn't include ARM platforms headers.
Change-Id: Ib6e4f5a77c2d095e6e8c3ad89c89cb1959cd3043
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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| ad55b97a | 30-Nov-2017 |
Jeenu Viswambharan <jeenu.viswambharan@arm.com> |
SDEI: Fix return value of reset calls
At present, both SDEI_PRIVATE_RESET and SDEI_SHARED_RESET returns
SDEI_PENDING if they fail to unregister an event. The SDEI specification
however requires that
SDEI: Fix return value of reset calls
At present, both SDEI_PRIVATE_RESET and SDEI_SHARED_RESET returns
SDEI_PENDING if they fail to unregister an event. The SDEI specification
however requires that the APIs return SDEI_EDENY in these cases. This
patch fixes the return codes for the reset APIs.
Change-Id: Ic14484c91fa8396910387196c256d1ff13d03afd
Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
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| 756a2a0e | 01-Dec-2017 |
Sandrine Bailleux <sandrine.bailleux@arm.com> |
SPM: Rename SP_COMMUNICATE macros
Rename SP_COMMUNICATE_AARCH32/AARCH64 into MM_COMMUNICATE_AARCH32/AARCH64
to align with the MM specification [1].
[1] http://infocenter.arm.com/help/topic/com.arm.
SPM: Rename SP_COMMUNICATE macros
Rename SP_COMMUNICATE_AARCH32/AARCH64 into MM_COMMUNICATE_AARCH32/AARCH64
to align with the MM specification [1].
[1] http://infocenter.arm.com/help/topic/com.arm.doc.den0060a/DEN0060A_ARM_MM_Interface_Specification.pdf
Change-Id: I478aa4024ace7507d14a5d366aa8e20681075b03
Signed-off-by: Sandrine Bailleux <sandrine.bailleux@arm.com>
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| fa0ed2b9 | 01-Dec-2017 |
Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
SPM: Rename SP_MEM_ATTR*** defines
The defines have been renamed to match the names used in the
documentation.
Change-Id: I2f18b65112d2db040a89d5a8522e9790c3e21628
Signed-off-by: Antonio Nino Diaz
SPM: Rename SP_MEM_ATTR*** defines
The defines have been renamed to match the names used in the
documentation.
Change-Id: I2f18b65112d2db040a89d5a8522e9790c3e21628
Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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| d162a27d | 23-Nov-2017 |
davidcunado-arm <david.cunado@arm.com> |
Merge pull request #1169 from antonio-nino-diaz-arm/an/spm-fixes
SPM fixes |
| f1a67d05 | 16-Nov-2017 |
Jeenu Viswambharan <jeenu.viswambharan@arm.com> |
SDEI: Assert that dynamic events have Normal priority
The SDEI specification requires that binding a client interrupt
dispatches SDEI Normal priority event. This means that dynamic events
can't have
SDEI: Assert that dynamic events have Normal priority
The SDEI specification requires that binding a client interrupt
dispatches SDEI Normal priority event. This means that dynamic events
can't have Critical priority. Add asserts for this.
Change-Id: I0bdd9e0e642fb2b61810cb9f4cbfbd35bba521d1
Signed-off-by: Jeenu Viswambharan <jeenu.viswambharan@arm.com>
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|