fix(drtm): map DLME and DRTM parameter region as execute-never

Replace MT_MEMORY | MT_NS | MT_RO with MT_NS | MT_RO_DATA for the DRTM
parameter and DLME dynamic mappings. This maps the regions as re

fix(drtm): map DLME and DRTM parameter region as execute-never

Replace MT_MEMORY | MT_NS | MT_RO with MT_NS | MT_RO_DATA for the DRTM
parameter and DLME dynamic mappings. This maps the regions as read-only
data and execute-never. This is as per DRTM specification.

Change-Id: I3e0f555e9a26726389a7c5f6b4fef65cb4078ee2
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>

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fix(spmd): remove a racy assert in g0 int. handler

handle_interrupt_exception calls plat_ic_get_pending_interrupt_type to
perform a first triage and route to the corresponding interrupt handler
base

fix(spmd): remove a racy assert in g0 int. handler

handle_interrupt_exception calls plat_ic_get_pending_interrupt_type to
perform a first triage and route to the corresponding interrupt handler
based on the interrupt type.
A registered handler must not assume that the HPPI hasn't changed from
the top level handler until reaching to it. The first thing a handler
must do is attempting to acknowledge the interrupt and process it if
it's a valid INTID. Meanwhile, it may have happened the interrupt has
been acknowledged by another PE, or another high priority interrupt got
asserted, or any other valid reason for the HPPI to change.
The reasoning is the same for an interrupt delegated by lower EL through
the FFA_EL3_INTR_HANDLE interface. For a G0 interrupt triggered while
secure world runs, the first triage is done by lower EL e.g. S-EL2 and
routes it to EL3 for handling. Once there, the HPPI might have changed
so the same rules as above apply.

Remove the assert from SPMD g0 interrupt handlers that is reading again
the HPPI which may unwillingly trigger in a racy situation.

Change-Id: I35f30ec3c0358953301e2b99949a6b758dabf36c
Signed-off-by: Olivier Deprez <olivier.deprez@arm.com>

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Merge "feat(spm-mm): fix wrong range of SPM_MM" into integration

refactor(drtm): use crypto-agile measured boot

Update the DRTM boot flow to use the crypto-agile API. Replace the
previous single-algorithm hash configuration with dynamic algorithm
selection. Align

refactor(drtm): use crypto-agile measured boot

Update the DRTM boot flow to use the crypto-agile API. Replace the
previous single-algorithm hash configuration with dynamic algorithm
selection. Align image measurement and event log header generation with
the new hashing model and update platform glue code accordingly.

Change-Id: I22930440476895c23dbd4e04502757d2f6726e33
Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>

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feat(spm-mm): fix wrong range of SPM_MM

According to SMCCC specification [1],
Table 6-4: Reserved Standard Secure Service Call range,

fid 0x40-0x4f are reserved for Management Mode,
fid 0x50-0x5f a

feat(spm-mm): fix wrong range of SPM_MM

According to SMCCC specification [1],
Table 6-4: Reserved Standard Secure Service Call range,

fid 0x40-0x4f are reserved for Management Mode,
fid 0x50-0x5f are reserved for TRNG interface and
fid 0x60-0x7f are not reserved yet for Standard Secure Service Calls
and current SPM_MM's implementation uses the 0x40-0x4f and 0x60-0x7f fids.

However, the is_spm_mm_fid() is checking TRNG range too
so it returns false positive and
TRNG request couldn't be handled properly.

To resolve this, remove the TRNG range check in is_spm_mm_fid().

Link: https://developer.arm.com/documentation/den0028/latest/ [1]
Change-Id: Ide41cf3451412676f604e31f3d88aeb2e601c5f2
Signed-off-by: Yeoreum Yun <yeoreum.yun@arm.com>

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feat(per-cpu): migrate spm_core_context to per-cpu framework

migrate spm_core_context objects to the NUMA-aware per-cpu framework to
optimize memory access and to efficiently utilize memory.

Signed

feat(per-cpu): migrate spm_core_context to per-cpu framework

migrate spm_core_context objects to the NUMA-aware per-cpu framework to
optimize memory access and to efficiently utilize memory.

Signed-off-by: Sammit Joshi <sammit.joshi@arm.com>
Signed-off-by: Rohit Mathew <rohit.mathew@arm.com>
Change-Id: Ie600ae755cfb738adde51cfc4af3cddbbccbbaef

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feat(per-cpu): migrate rmm_context to per-cpu framework

migrate rmm_context objects to the NUMA-aware per-cpu framework to
optimize memory access and to efficiently utilize memory.

Signed-off-by: S

feat(per-cpu): migrate rmm_context to per-cpu framework

migrate rmm_context objects to the NUMA-aware per-cpu framework to
optimize memory access and to efficiently utilize memory.

Signed-off-by: Sammit Joshi <sammit.joshi@arm.com>
Signed-off-by: Rohit Mathew <rohit.mathew@arm.com>
Change-Id: I72d49c3d860dac10bd3930ce400b0199bedd887b

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feat(lfa): introduce support for call_again for LFA_PRIME

LFA_PRIME is a single-threaded operation that is not pinned to
a specific CPU. The implementation must support calls being
issued from diffe

feat(lfa): introduce support for call_again for LFA_PRIME

LFA_PRIME is a single-threaded operation that is not pinned to
a specific CPU. The implementation must support calls being
issued from different CPUs, even for several calls to prime the
same component.

This patch checks if the plat_lfa_load_auth_image return -EAGAIN
indicating that the platform expects the LFA_PRIME call to be
issued again. This is done by returning LFA_SUCCESS and setting
flags[0] to 1, indicating that LFA_PRIME is incomplete and must
be called again.

Change-Id: Ia3046b5467c50c4c51392bac3fb9e9533f2438db
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>

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feat(lfa): allow LFA_PRIME from one CPU at a time

LFA_PRIME is a single-threaded operation that is not pinned
to a specific CPU. The implementation must support calls being
issued from different CPU

feat(lfa): allow LFA_PRIME from one CPU at a time

LFA_PRIME is a single-threaded operation that is not pinned
to a specific CPU. The implementation must support calls being
issued from different CPUs, even for several calls to prime
the same component. However, those calls must not happen
concurrently.

This patch introduces a spinlock across the LFA_PRIME call to
support this requirement. In case of concurrent calls, the
LFA_BUSY error code is returned to the caller.

Change-Id: I0574a155ea66b527e26b0dd73272a103e4f936b1
Signed-off-by: Varun Wadekar <vwadekar@nvidia.com>

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Merge "fix(rmmd): correct activation condition check" into integration

Merge changes from topic "mb/lfa-rmm-test" into integration

* changes:
fix(rmmd): avoid race conditions in CPU finish
fix(arm): move lfa componet header to common and fix the helper
chore(lfa)

Merge changes from topic "mb/lfa-rmm-test" into integration

* changes:
fix(rmmd): avoid race conditions in CPU finish
fix(arm): move lfa componet header to common and fix the helper
chore(lfa): rename component_id to lfa_component_id

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Merge "feat(el3-spmc): allow physical partitions to have multiple UUIDs" into integration

feat(el3-spmc): allow physical partitions to have multiple UUIDs

Physical partitions can now be assigned multiple UUIDs. This updates
- FFA_PARTITION_INFO_GET handling to return all the required

feat(el3-spmc): allow physical partitions to have multiple UUIDs

Physical partitions can now be assigned multiple UUIDs. This updates
- FFA_PARTITION_INFO_GET handling to return all the required
parttion descriptors
- device tree parsing to read multiple UUIDs

Change-Id: Ib9a961130aace75ba31b6610873138f35d355f09
Signed-off-by: Jay Monkman <jmonkman@google.com>
Signed-off-by: Andrei Homescu <ahomescu@xwf.google.com>

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Merge "feat(el3-spmc): update FF-A version checks" into integration

Merge "feat(el3-spmc): enable FFA_MEM_RETRIEVE_MEM_REQ from the hypervisor" into integration

feat(el3-spmc): update FF-A version checks

Fixed several version checks that failed with FF-A 1.2.

Change-Id: Idb37795e25eaa6f38ac4f065f68f8c8183cd26ea
Signed-off-by: Jay Monkman <jmonkman@google.c

feat(el3-spmc): update FF-A version checks

Fixed several version checks that failed with FF-A 1.2.

Change-Id: Idb37795e25eaa6f38ac4f065f68f8c8183cd26ea
Signed-off-by: Jay Monkman <jmonkman@google.com>
Signed-off-by: Andrei Homescu <ahomescu@google.com>

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Merge "fix(el3-spmc): validate fragment offset" into integration

fix(sdei): fix coverity finding array index read

Fix - CID 463142: (#1 of 1): Overflowed array index
read (INTEGER_OVERFLOW)

Based on issue -
https://scan4.scan.coverity.com/#/project-view/68818/1

fix(sdei): fix coverity finding array index read

Fix - CID 463142: (#1 of 1): Overflowed array index
read (INTEGER_OVERFLOW)

Based on issue -
https://scan4.scan.coverity.com/#/project-view/68818/11439?selectedIssue=463142

Add boundary checks overflow checks.

Change-Id: I56022b605008f8d35231d70d058c4d449d618d34
Signed-off-by: Govindraj Raja <govindraj.raja@arm.com>

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fix(rmmd): correct activation condition check

Update the activation condition in rmmd_primary_activate to ensure the
function behaves correctly when the return code is zero. This change
prevents pot

fix(rmmd): correct activation condition check

Update the activation condition in rmmd_primary_activate to ensure the
function behaves correctly when the return code is zero. This change
prevents potential issues during the activation process.

Change-Id: I94d76c1e491f114b7fb32dd85dbfcfe2f5f1d3da
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>

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fix(rmmd): avoid race conditions in CPU finish

Create a local copy of entry point info to prevent race conditions when
accessing shared data. This change ensures that the CPU finish handler
operates

fix(rmmd): avoid race conditions in CPU finish

Create a local copy of entry point info to prevent race conditions when
accessing shared data. This change ensures that the CPU finish handler
operates on a consistent state without interference from other threads,
improving stability and reliability of the service.

Change-Id: I84fbc21672dde0f19176f63ee94afafc0084004e
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>

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chore(lfa): rename component_id to lfa_component_id

Refactor the function lfa_is_prime_complete to use a more specific
parameter name, lfa_component_id, enhancing code clarity. This change
improves

chore(lfa): rename component_id to lfa_component_id

Refactor the function lfa_is_prime_complete to use a more specific
parameter name, lfa_component_id, enhancing code clarity. This change
improves readability and reduces potential confusion with other
component identifiers in the codebase.

Change-Id: I00285fce4b7149bd97d6386ef471e9d1598a3fed
Signed-off-by: Manish V Badarkhe <Manish.Badarkhe@arm.com>

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feat(el3-spmc): enable FFA_MEM_RETRIEVE_MEM_REQ from the hypervisor

pKVM calls this FF-A function to retrieve the descriptors
for regions donated/lent/shared by a VM with an SP.

Change-Id: I55f1d67

feat(el3-spmc): enable FFA_MEM_RETRIEVE_MEM_REQ from the hypervisor

pKVM calls this FF-A function to retrieve the descriptors
for regions donated/lent/shared by a VM with an SP.

Change-Id: I55f1d675db741bc8ddaaacae0d4d60245000fb34
Signed-off-by: Andrei Homescu <ahomescu@xwf.google.com>

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fix(el3-spmc): validate fragment offset

Per Table 4.3 of DEN 0140 1.3ALP0, the fragment offset passed to
FFA_MEM_FRAG_RX has the following requirement:

Offset must be equal to one of the followin

fix(el3-spmc): validate fragment offset

Per Table 4.3 of DEN 0140 1.3ALP0, the fragment offset passed to
FFA_MEM_FRAG_RX has the following requirement:

Offset must be equal to one of the following:
– The number of bytes of the transaction descriptor
transmitted prior to the invocation of this
interface.
– The offset used in the previous invocation of this
interface. This allows the Sender to re-transmit
the previous fragment if the Receiver could not
receive it due to an IMPLEMENTATION DEFINED
reason.

Keep track of the last and next fragment offsets between calls
to FFA_MEM_RETRIEVE_REQ and FFA_MEM_FRAG_RX and validate the
fragment offset, returning INVALID_PARAMETERS if it doesn't match
one of the two expected values.

BREAKING CHANGE: no longer accepts invalid fragment offsets

Change-Id: If549bb62a1960e9367d14bae842cb4e289429669
Signed-off-by: Andrei Homescu <ahomescu@xwf.google.com>

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perf(spmd): don't initialise context on boot, do it on CPU_ON

Normal and Realm worlds setup their contexts whenever a core comes
online. This speeds up boot and as a side effect allows any cores tha

perf(spmd): don't initialise context on boot, do it on CPU_ON

Normal and Realm worlds setup their contexts whenever a core comes
online. This speeds up boot and as a side effect allows any cores that
are never turned on to not be initialised.

So do this for spmd's Secure world too. This makes all three worlds
consistent.

Change-Id: I8676d2a03a472074176e4db06910fc2b6cbf269a
Signed-off-by: Boyan Karatotev <boyan.karatotev@arm.com>

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Merge "fix(el3-spmc): do not check NS bit for fragments" into integration