1 /* 2 * Copyright (c) 2013-2018, ARM Limited and Contributors. All rights reserved. 3 * 4 * SPDX-License-Identifier: BSD-3-Clause 5 */ 6 7 #include <plat_arm.h> 8 #include <platform.h> 9 #include <tbbr_img_def.h> 10 #include "fvp_private.h" 11 12 13 /******************************************************************************* 14 * Perform any BL1 specific platform actions. 15 ******************************************************************************/ 16 void bl1_early_platform_setup(void) 17 { 18 arm_bl1_early_platform_setup(); 19 20 /* Initialize the platform config for future decision making */ 21 fvp_config_setup(); 22 23 /* 24 * Initialize Interconnect for this cluster during cold boot. 25 * No need for locks as no other CPU is active. 26 */ 27 fvp_interconnect_init(); 28 /* 29 * Enable coherency in Interconnect for the primary CPU's cluster. 30 */ 31 fvp_interconnect_enable(); 32 } 33 34 /******************************************************************************* 35 * The following function checks if Firmware update is needed, 36 * by checking if TOC in FIP image is valid or not. 37 ******************************************************************************/ 38 unsigned int bl1_plat_get_next_image_id(void) 39 { 40 if (!arm_io_is_toc_valid()) 41 return NS_BL1U_IMAGE_ID; 42 43 return BL2_IMAGE_ID; 44 } 45 46