fix(st-crypto): do not set IPRST if BUSY flag is present

An issue appear when a IPRST is set when BUSY flag is still set.
Put the IP reset under condition solve this issue.

Signed-off-by: Maxime Mé

fix(st-crypto): do not set IPRST if BUSY flag is present

An issue appear when a IPRST is set when BUSY flag is still set.
Put the IP reset under condition solve this issue.

Signed-off-by: Maxime Méré <maxime.mere@foss.st.com>
Change-Id: Ibb096c1a362b8077285812e1ffca749c7fc93a03

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fix(st-ddr): bad refresh update level toggle sequence

wait_refresh_update_done_ack() must toggle RFSHCTL3_REFRESH_UPDATE_LEVEL
bit at each call to follow the recommended procedure.
Fix action and lo

fix(st-ddr): bad refresh update level toggle sequence

wait_refresh_update_done_ack() must toggle RFSHCTL3_REFRESH_UPDATE_LEVEL
bit at each call to follow the recommended procedure.
Fix action and loop condition.

Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@foss.st.com>
Change-Id: Iacf1e92a1ddaf2ab10e4f3a873be6ad1d3576e5f

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fix(st-ddr): remove TODO in STM32MP2 driver

Remove useless ddr_get_io_calibration_val service.
Other items are deleted as they're useless on STM32MP2 series.

Signed-off-by: Nicolas Le Bayon <nicola

fix(st-ddr): remove TODO in STM32MP2 driver

Remove useless ddr_get_io_calibration_val service.
Other items are deleted as they're useless on STM32MP2 series.

Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@foss.st.com>
Change-Id: I30bb18f156ff6dc06147987654363472a1e0182d

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refactor(st-pmic): use LOG_LEVEL for regulator debug output

The stpmic2_dump_regulators() function now uses LOG_LEVEL instead of
EVENT_LOG_LEVEL to align with general logging conventions.

Additiona

refactor(st-pmic): use LOG_LEVEL for regulator debug output

The stpmic2_dump_regulators() function now uses LOG_LEVEL instead of
EVENT_LOG_LEVEL to align with general logging conventions.

Additionally, the guard has been moved inside the function, removing
unnecessary preprocessor checks where the function is used and thereby
improving consistency.

Change-Id: I087de124e6795a599b4f91a7613c6dfa3f76bb7a
Signed-off-by: Boerge Struempfel <boerge.struempfel@gmail.com>

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fix(st-pmic): remove deadcode from STPMIC2 driver

"regul" corresponds to a specific part of a global table that can't be
undefined. Thus, checking if it is NULL is useless.

Issue found by Coverity

fix(st-pmic): remove deadcode from STPMIC2 driver

"regul" corresponds to a specific part of a global table that can't be
undefined. Thus, checking if it is NULL is useless.

Issue found by Coverity (CID 445089).

Signed-off-by: Maxime Méré <maxime.mere@foss.st.com>
Change-Id: Ic812bc1fde12fe8389677c7c72fb85246c50f5c9

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fix(st-ddr): move skipddc_dat definition

The skipddc_dat variable is only use at one place in dfixlat_program()
function. Move its definition and update there to avoid compilation
issues about varia

fix(st-ddr): move skipddc_dat definition

The skipddc_dat variable is only use at one place in dfixlat_program()
function. Move its definition and update there to avoid compilation
issues about variables being set but not used.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: I6b5273365f1da26773fc46f898362cb9af170506

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fix(st-ddr): fix coverity issue in ddrphyinit

Address issue CID 445362 and CID 445361 found during coverity scan.

Change-Id: I1ab460d2e1353b81517788e32de662f203b0352f
Signed-off-by: Maxime Méré <ma

fix(st-ddr): fix coverity issue in ddrphyinit

Address issue CID 445362 and CID 445361 found during coverity scan.

Change-Id: I1ab460d2e1353b81517788e32de662f203b0352f
Signed-off-by: Maxime Méré <maxime.mere@foss.st.com>

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feat(st-ddr): add STM32MP2 driver

Add driver to support DDR on STM32MP2 platform. It drives the DDR PHY
and its firmware, as well as the DDR controller.

Signed-off-by: Nicolas Le Bayon <nicolas.le.

feat(st-ddr): add STM32MP2 driver

Add driver to support DDR on STM32MP2 platform. It drives the DDR PHY
and its firmware, as well as the DDR controller.

Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
Signed-off-by: Maxime Méré <maxime.mere@foss.st.com>
Change-Id: I93de2db1b9378d5654e76b3bf6f3407d80bc4ca5

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refactor(st-ddr): create generic services

Disabling AXI port, enabling host interface and both enabling/disabling
software self-refresh services are already present inside the driver
source code.
Fa

refactor(st-ddr): create generic services

Disabling AXI port, enabling host interface and both enabling/disabling
software self-refresh services are already present inside the driver
source code.
Factorize by gathering them as services inside the generic part,
and adapt driver to call these new functions.

Add services to manage quasi-dynamic registers. DDRCTRL contains
quasi-dynamic registers, which are dynamic only under some conditions
defined by the user guide (with 4 groups).
In our driver, out of reset state, only groups 3 and 4 are updated.
Group 4 needs only sw_done/sw_done_ack sequence, already available.
Group 3 sequence include more conditions, that are gathered in
specific services. stm32mp_ddr_disable_host_interface() has been added
to do this.

Add dedicated generic service to toggle rfshctl3.refresh_update_level
and wait for completion.

Manage AXI ports and HIF when updating QD3 registers. Quasi-dynamic
group 3 (QD3) registers are updated when DDR is not completely
initialized, i.e. when AXI ports are not enabled and possibly when
host interface (HIF) is not enabled too.
In that case, a specific mechanism is necessary to restore the same
conditions as before accessing QD3 registers.
Static functions have been added to get AXI ports and HIF states and
are used to determine the needed conditions to set/unset.

Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
Change-Id: I880f88b1cb6fc76199ad9ea33e9d63a5c469aed4

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refactor(st-ddr): remove name from stm32mp_ddr_reg_desc

It was only used for an error trace, with little added value. This
allows some gains in DDR driver data size.

Signed-off-by: Yann Gautier <ya

refactor(st-ddr): remove name from stm32mp_ddr_reg_desc

It was only used for an error trace, with little added value. This
allows some gains in DDR driver data size.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: I02e2fc75efd90ff188e62f39850b9bd4c3af1649

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refactor(st-ddr): add definition for timeouts and delays

Instead of using hard-coded number in DDR driver, use macros.
Modify TIMEOUT_US_1S to DDR_TIMEOUT_US_1S to align with other defines.

Signed-

refactor(st-ddr): add definition for timeouts and delays

Instead of using hard-coded number in DDR driver, use macros.
Modify TIMEOUT_US_1S to DDR_TIMEOUT_US_1S to align with other defines.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: I489084132821774b0049a4a5d7fc30db24a7bb11

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feat(stm32mp1): handle DDR power supplies

Modify the DDR driver to handle the DDR power supplies when a PMIC
is present in the function stm32mp_board_ddr_power_init(), define
in the platform file.

feat(stm32mp1): handle DDR power supplies

Modify the DDR driver to handle the DDR power supplies when a PMIC
is present in the function stm32mp_board_ddr_power_init(), define
in the platform file.

This patch allows to easily modify the used DDR power supplies
for customer boards, when they don't use STPMIC1 PMU or when
the regulators are not connected as on the STMicroelectronics
boards.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Change-Id: I93ee6295ef7032ac20f03608d22cd460f7d87ef5

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refactor: digest sizes

The digest size in bytes for sha1/256/384/512 were defined in multiple
places. Refactor the macros into a common header file.

Change-Id: I84ef3561486ff70345ae8c871d5d6e156457

refactor: digest sizes

The digest size in bytes for sha1/256/384/512 were defined in multiple
places. Refactor the macros into a common header file.

Change-Id: I84ef3561486ff70345ae8c871d5d6e1564574ec2
Signed-off-by: Raghu Krishnamurthy <raghupathyk@nvidia.com>

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feat(st-pmic): add STPMIC2 driver

The STPMIC2 embeds 15 regulators with various
properties, and is designed to supply the STM32MP2
SOC. This driver handles a minimal set of feature
to handle the boo

feat(st-pmic): add STPMIC2 driver

The STPMIC2 embeds 15 regulators with various
properties, and is designed to supply the STM32MP2
SOC. This driver handles a minimal set of feature
to handle the boot of a board.

Signed-off-by: Pascal Paillet <p.paillet@st.com>
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Maxime Méré <maxime.mere@foss.st.com>
Change-Id: Ibe0cacf8aec2871eb9a86ec16cbbd18d3745fe9e

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feat(st-regulator): support regulator_set_voltage for fixed regulator

Always support the regulator_set_voltage operation for the same voltage.
This patch prepares the DDR power configuration when th

feat(st-regulator): support regulator_set_voltage for fixed regulator

Always support the regulator_set_voltage operation for the same voltage.
This patch prepares the DDR power configuration when the power supplies
are fixed.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Maxime Méré <maxime.mere@foss.st.com>
Change-Id: Idf032b03c6f0c95f997dec3ed8a0d38c54a3de15

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feat(st-regulator): add enable ramp-delay

Permit to override enable ramp-delay value from
the device tree in BL2.

Change-Id: Id8e803b368055a50fbd14d4527917c449b958ad9
Signed-off-by: Pascal Paillet

feat(st-regulator): add enable ramp-delay

Permit to override enable ramp-delay value from
the device tree in BL2.

Change-Id: Id8e803b368055a50fbd14d4527917c449b958ad9
Signed-off-by: Pascal Paillet <p.paillet@st.com>
Signed-off-by: Maxime Méré <maxime.mere@foss.st.com>

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feat(stm32mp2): enable DDR sub-system clock

Create a DDR helper files, and add a function to enable DDR clocks
in RCC_DDRCPCFGR register.
Call this ddr_sub_system_clk_init() just before clock driver

feat(stm32mp2): enable DDR sub-system clock

Create a DDR helper files, and add a function to enable DDR clocks
in RCC_DDRCPCFGR register.
Call this ddr_sub_system_clk_init() just before clock driver init,
as it needs to be done before enabling DDR PLL clock (PLL2).

Change-Id: I365d6aa034363d0c036ce2d9f944f077ba86e193
Signed-off-by: Yann Gautier <yann.gautier@st.com>

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feat(st-reset): add stm32mp2_reset driver

This driver manages the resets of the peripherals embedded in STM32MP2.
Like clock driver, it also uses the RCC peripheral.

Change-Id: I8217891bdf1b847925a

feat(st-reset): add stm32mp2_reset driver

This driver manages the resets of the peripherals embedded in STM32MP2.
Like clock driver, it also uses the RCC peripheral.

Change-Id: I8217891bdf1b847925aad77f3f6ef542f08d1fba
Signed-off-by: Yann Gautier <yann.gautier@st.com>

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feat(st-clock): add STM32MP2 clock driver

This driver manages the clocks on STM32MP2 platforms.
It uses a dedicated RCC (Reset and Clock Control) peripheral.

Change-Id: I6ba2173e73222269a2dfca4c689

feat(st-clock): add STM32MP2 clock driver

This driver manages the clocks on STM32MP2 platforms.
It uses a dedicated RCC (Reset and Clock Control) peripheral.

Change-Id: I6ba2173e73222269a2dfca4c6897229276a150c0
Signed-off-by: Yann Gautier <yann.gautier@st.com>
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@st.com>

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feat(st-reset): add system reset management

Add the system reset management into the stm32mp
reset driver.

Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Change-Id: I748f10de2398e1323160f479

feat(st-reset): add system reset management

Add the system reset management into the stm32mp
reset driver.

Signed-off-by: Lionel Debieve <lionel.debieve@st.com>
Change-Id: I748f10de2398e1323160f479f99e92abd2f65dca

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fix(st-gpio): configure each GPIO mux as secure for STM32MP2

GPIOs are configured as secure by default on STM32MP2. The former code
is then put under #if STM32MP13 || STM32MP15. The else part is for

fix(st-gpio): configure each GPIO mux as secure for STM32MP2

GPIOs are configured as secure by default on STM32MP2. The former code
is then put under #if STM32MP13 || STM32MP15. The else part is for
STM32MP2 family.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Christophe Kerello <christophe.kerello@foss.st.com>
Change-Id: I80c5944d4ae662f9e28269c3dc543b13f0e26a7b

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feat(st-gpio): add set GPIO config API

Add get and set GPIO level from bank and pin value.
Add functions to set a pad in GPIO configuration
and to apply some settings.

Change-Id: I5e3acb5c95cd03f3e

feat(st-gpio): add set GPIO config API

Add get and set GPIO level from bank and pin value.
Add functions to set a pad in GPIO configuration
and to apply some settings.

Change-Id: I5e3acb5c95cd03f3e130e1a263b221b956cb3c8d
Signed-off-by: Pascal Paillet <p.paillet@st.com>

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feat(st-clock): use early traces

Replace trace macros with their corresponding EARLY_* macros.

Change-Id: I39b163964fa3129be38e58352b5dee9b4081675b
Signed-off-by: Yann Gautier <yann.gautier@foss.st

feat(st-clock): use early traces

Replace trace macros with their corresponding EARLY_* macros.

Change-Id: I39b163964fa3129be38e58352b5dee9b4081675b
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>

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fix(st-clock): adapt order of CSS on LSE and HSE

Fix the activation order of the CSS to prevent a faulty halt, according
to the reference manual (RM0442 Rev 6, Chapter: 10.4.3 Clock security
system

fix(st-clock): adapt order of CSS on LSE and HSE

Fix the activation order of the CSS to prevent a faulty halt, according
to the reference manual (RM0442 Rev 6, Chapter: 10.4.3 Clock security
system CSS) it must be done after selecting the LSE clock via the RTCSRC
field.
For the HSE clock, this can be activated even when HSEON is '0'.

Signed-off-by: Christoph Fritz <chf@fritzc.com>
Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com>
Change-Id: Ied01baac1ccc63dcef78bf5f9180bb8628cce2d0

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refactor(st-clock): remove unused struct

The struct clk_fixed_rate is used nowhere in the code, remove its
definition.

Change-Id: I139ad05a249357da96a996feabd4b1f53e290f2a
Signed-off-by: Yann Gauti

refactor(st-clock): remove unused struct

The struct clk_fixed_rate is used nowhere in the code, remove its
definition.

Change-Id: I139ad05a249357da96a996feabd4b1f53e290f2a
Signed-off-by: Yann Gautier <yann.gautier@foss.st.com>

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