1// SPDX-License-Identifier: (GPL-2.0-or-later OR BSD-3-Clause) 2/* 3 * Copyright (C) 2023-2024, STMicroelectronics - All Rights Reserved 4 * Author: Alexandre Torgue <alexandre.torgue@foss.st.com> for STMicroelectronics. 5 */ 6#include <dt-bindings/pinctrl/stm32-pinfunc.h> 7 8&pinctrl { 9 /omit-if-no-ref/ 10 sdmmc1_b4_pins_a: sdmmc1-b4-0 { 11 pins1 { 12 pinmux = <STM32_PINMUX('E', 4, AF10)>, /* SDMMC1_D0 */ 13 <STM32_PINMUX('E', 5, AF10)>, /* SDMMC1_D1 */ 14 <STM32_PINMUX('E', 0, AF10)>, /* SDMMC1_D2 */ 15 <STM32_PINMUX('E', 1, AF10)>, /* SDMMC1_D3 */ 16 <STM32_PINMUX('E', 2, AF10)>; /* SDMMC1_CMD */ 17 slew-rate = <2>; 18 drive-push-pull; 19 bias-disable; 20 }; 21 pins2 { 22 pinmux = <STM32_PINMUX('E', 3, AF10)>; /* SDMMC1_CK */ 23 slew-rate = <3>; 24 drive-push-pull; 25 bias-disable; 26 }; 27 }; 28 29 /omit-if-no-ref/ 30 sdmmc2_b4_pins_a: sdmmc2-b4-0 { 31 pins1 { 32 pinmux = <STM32_PINMUX('E', 13, AF12)>, /* SDMMC2_D0 */ 33 <STM32_PINMUX('E', 11, AF12)>, /* SDMMC2_D1 */ 34 <STM32_PINMUX('E', 8, AF12)>, /* SDMMC2_D2 */ 35 <STM32_PINMUX('E', 12, AF12)>, /* SDMMC2_D3 */ 36 <STM32_PINMUX('E', 15, AF12)>; /* SDMMC2_CMD */ 37 slew-rate = <2>; 38 drive-push-pull; 39 bias-pull-up; 40 }; 41 pins2 { 42 pinmux = <STM32_PINMUX('E', 14, AF12)>; /* SDMMC2_CK */ 43 slew-rate = <3>; 44 drive-push-pull; 45 bias-pull-up; 46 }; 47 }; 48 49 /omit-if-no-ref/ 50 sdmmc2_d47_pins_a: sdmmc2-d47-0 { 51 pins { 52 pinmux = <STM32_PINMUX('E', 10, AF12)>, /* SDMMC2_D4 */ 53 <STM32_PINMUX('E', 9, AF12)>, /* SDMMC2_D5 */ 54 <STM32_PINMUX('E', 6, AF12)>, /* SDMMC2_D6 */ 55 <STM32_PINMUX('E', 7, AF12)>; /* SDMMC2_D7 */ 56 slew-rate = <2>; 57 drive-push-pull; 58 bias-pull-up; 59 }; 60 }; 61 62 /omit-if-no-ref/ 63 usart2_pins_a: usart2-0 { 64 pins1 { 65 pinmux = <STM32_PINMUX('A', 4, AF6)>; /* USART2_TX */ 66 bias-disable; 67 drive-push-pull; 68 slew-rate = <0>; 69 }; 70 pins2 { 71 pinmux = <STM32_PINMUX('A', 8, AF8)>; /* USART2_RX */ 72 bias-disable; 73 }; 74 }; 75}; 76