fix(st-ddr): add missing newline

Add a missing \n at the end of an ERROR trace in ST DDR driver.

Change-Id: I11e602214c96f182dcae6f109926cc1baa1c6d82
Signed-off-by: Yann Gautier <yann.gautier@st.co

fix(st-ddr): add missing newline

Add a missing \n at the end of an ERROR trace in ST DDR driver.

Change-Id: I11e602214c96f182dcae6f109926cc1baa1c6d82
Signed-off-by: Yann Gautier <yann.gautier@st.com>

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fix(st-ddr): fix coverity static analysis issues

Fix following issues in the DDR driver:
- potential overflowing expression (four occurrences),
- returned value not checked before using it,
- potent

fix(st-ddr): fix coverity static analysis issues

Fix following issues in the DDR driver:
- potential overflowing expression (four occurrences),
- returned value not checked before using it,
- potential underflow of the type of a variable,
- unused assigned value before overwriting it (two occurrences).
- declaring variable `ck_anib_inst` without initializer in
txslewrate_program(),
- else branch identical to the then branch in atxslewrate_program(),
- a less-than-zero comparison of an unsigned value is never true in
ddrphy_phyinit_calcmb().

Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@foss.st.com>
Change-Id: I2d7a26083e569008cb7650c29b3a18ff7757a0f5

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fix(st-rif): do not assign an unused value for node when parsing config

In risaf_parse_fwconfig(), node was assigned a -1 value. But it is then
overwritten without the first value being used. Remove

fix(st-rif): do not assign an unused value for node when parsing config

In risaf_parse_fwconfig(), node was assigned a -1 value. But it is then
overwritten without the first value being used. Remove this assignment.
This issue was found by Coverity: Defect (unused_value).

Change-Id: Id463d91bb62e37e3413ee8ddd9089f7a93c8e8b0
Signed-off-by: Yann Gautier <yann.gautier@st.com>

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fix(st-pmic): initialize some structs in dt_pmic2_i2c_config

Initialize i2c_info & i2c_init structs with zeros to avoid random values
from the stack.
This corrects MISRA_C_2012_Rule_9.1: The value o

fix(st-pmic): initialize some structs in dt_pmic2_i2c_config

Initialize i2c_info & i2c_init structs with zeros to avoid random values
from the stack.
This corrects MISRA_C_2012_Rule_9.1: The value of an object with
automatic storage duration shall not be read before it has been set.

Change-Id: I6f9caac4ef23287ff875b9f375b93c6ba3281288
Signed-off-by: Yann Gautier <yann.gautier@st.com>

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fix(st-pmic): check stpmic2_is_buck1_high_voltage return

There was no check on stpmic2_is_buck1_high_voltage() for buck1 in
register_pmic2 function. Add a check on ret, and return with an error
mess

fix(st-pmic): check stpmic2_is_buck1_high_voltage return

There was no check on stpmic2_is_buck1_high_voltage() for buck1 in
register_pmic2 function. Add a check on ret, and return with an error
message in case of error.
This was found with Coverity analysis (unused_value).

Change-Id: I0a269aadb5344a29f94302c8d4ff6cd41773961f
Signed-off-by: Yann Gautier <yann.gautier@st.com>

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feat(st-clock): keep TAMP_BKP_REG_CLK always on

Toggling TAMP_BKP_REG_CLK on each TAMPER backup register access
leads to some instabilities in UART and USB programmer mode.
Set TAMP_BKP_REG_CLK to a

feat(st-clock): keep TAMP_BKP_REG_CLK always on

Toggling TAMP_BKP_REG_CLK on each TAMPER backup register access
leads to some instabilities in UART and USB programmer mode.
Set TAMP_BKP_REG_CLK to always on to avoid unwanted tampers.
It is applied to both STM32MP1 and STM32MP2.

Change-Id: Id5f5bb4f871ab1a2b2350eca0c595b666e8271b9
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@foss.st.com>
Signed-off-by: Christophe Kerello <christophe.kerello@foss.st.com>

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fix(st-clock): check fdt_subnode_offset return

In stm32_clk_parse_fdt_all_pll() for both MP13 and MP15 drivers, the
return value of fdt_subnode_offset(). If the node is not found, just
continue the

fix(st-clock): check fdt_subnode_offset return

In stm32_clk_parse_fdt_all_pll() for both MP13 and MP15 drivers, the
return value of fdt_subnode_offset(). If the node is not found, just
continue the loop to the next index.
This was found by Coverity: Defect (unchecked_return_value inferred)

Change-Id: Idd603c8aefc6dabbf139759cd5332ee367c69c73
Signed-off-by: Yann Gautier <yann.gautier@st.com>

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fix(st-clock): remove some variables default assignment

Some variables are assigned default values, but are overwritten before
those values have been used. Remove the default assignment.
This was fo

fix(st-clock): remove some variables default assignment

Some variables are assigned default values, but are overwritten before
those values have been used. Remove the default assignment.
This was found with Coverity: Defect (unused_value)

Change-Id: I0286e64005bd766626ec7a80f88188dff31ede11
Signed-off-by: Yann Gautier <yann.gautier@st.com>

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fix(st-clock): do not return NULL in _clk_get

The return value of _clk_get() is never checked. It can return NULL if
The clock ID is above the number of clocks. To avoid issues, panic in
that case.

fix(st-clock): do not return NULL in _clk_get

The return value of _clk_get() is never checked. It can return NULL if
The clock ID is above the number of clocks. To avoid issues, panic in
that case. The function will either return a correct value or panic.
And it is then not needed to check _clk_get is not NULL.
While at it remove an extra space when calling assert function, and a
cast for NO_OPS to avoid a MISRA warning.
This was found by Coverity:
Defect (null_pointer_dereference_crash return_value)

Change-Id: I5270a19af19db038347315adb7cd7f8671e8365d
Signed-off-by: Yann Gautier <yann.gautier@st.com>

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feat(st-clock): add trace for unknown clock identifier

Add a trace to identify usage of unknown clock identifier with
clock API.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Chang

feat(st-clock): add trace for unknown clock identifier

Add a trace to identify usage of unknown clock identifier with
clock API.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Change-Id: Iea1f7de3e7692c6d27c714ed377c4c69a31d1e3d

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feat(st-clock): add ck_sys_dbg clock for STM32MP2

Add management of ck_sys_dbg clock.

Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com>
Change-Id: Ieca03a649b0dfdb824ef0c9c67ec6a3d4e

feat(st-clock): add ck_sys_dbg clock for STM32MP2

Add management of ck_sys_dbg clock.

Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com>
Change-Id: Ieca03a649b0dfdb824ef0c9c67ec6a3d4eae1715

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fix(st-clock): remove CLK_CFG/CMD_CLK support for st,kerclk

Remove the CMD_CLK support and CLK_CFG macro for st,kerclk,
because it is unused and not required in Binding (see OP-TEE file
documentatio

fix(st-clock): remove CLK_CFG/CMD_CLK support for st,kerclk

Remove the CMD_CLK support and CLK_CFG macro for st,kerclk,
because it is unused and not required in Binding (see OP-TEE file
documentation/devicetree/bindings/clock/st,stm32mp25-rcc.yaml)

The only supported macro are :
- DIV(DIV_<DIV-CLOCK>, value)
- MUX_CFG(MUX_<KERNEL-CLOCK>, MUX<KERNEL-CLOCK>_<PARENT-CLOCK>
- MCO_CFG(MCO_CLOCK, MUX_<MCO-CLOCK>_<PARENT-CLOCK>, ON / OFF)

The CLK_CMD command was defined for STM32MP1 SoC but is it no more
required for STM32MP2 clock tree definition and the RCC clock driver
and associated binding files can be simplified.

Change-Id: I1021fbe99ac004d3614cbf8345476bf57e350b0c
Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>

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fix(st-clock): increase startup timeout for oscillators for STM32MP2

The startup timeout for oscillators has been increased to accommodate
the maximum startup time of 2 seconds, as specified in the

fix(st-clock): increase startup timeout for oscillators for STM32MP2

The startup timeout for oscillators has been increased to accommodate
the maximum startup time of 2 seconds, as specified in the datasheet.

Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com>
Change-Id: I138a24403f7563534a3fd89667084890f19d8b00

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fix(st-clock): increase startup timeout for oscillators for STM32MP1

The startup timeout for oscillators has been increased to accommodate
the maximum startup time of 2 seconds, as specified in the

fix(st-clock): increase startup timeout for oscillators for STM32MP1

The startup timeout for oscillators has been increased to accommodate
the maximum startup time of 2 seconds, as specified in the datasheet.

Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com>
Change-Id: I883540ec739b31522cc5d20125847400aefa595f

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refactor(st-clock): move oscillators ops from clk-stm32-core to drivers

To allow a finer management of oscillators, move the oscillators ops
structure from clock core driver to platform clocks drive

refactor(st-clock): move oscillators ops from clk-stm32-core to drivers

To allow a finer management of oscillators, move the oscillators ops
structure from clock core driver to platform clocks drivers.
This is mainly needed for STM32MP2, if it is not master of the platform
and requires some special operations on oscillators.

Signed-off-by: Gabriel Fernandez <gabriel.fernandez@foss.st.com>
Change-Id: Ibdef015119a17cc50a151f7e3a11d168376d11ca

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feat(st-clock): add barriers in clock driver

Add barriers in the clock drivers.
Even if peripheral memory is non-cacheable and the order of operations
sent on the bus is guaranteed, there is no guar

feat(st-clock): add barriers in clock driver

Add barriers in the clock drivers.
Even if peripheral memory is non-cacheable and the order of operations
sent on the bus is guaranteed, there is no guarantee regarding the order
of reception on the device. This implies that the order of accesses
arriving at the device memory is guaranteed only within the same
peripheral. Add a DMB before disabling a clock. And re-read the RCC
register after enabling a clock to be sure the transaction has reached
the clock peripheral.

Signed-off-by: Maxime Méré <maxime.mere@foss.st.com>
Change-Id: Ie37409173a3e3f4f4acf96a5ada8ae1b5a0c6784

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feat(st-rif): add STM32MP2x support in RIFSC driver

Adapt RIFSC driver to support all STM32MP2 variants, with specific
RIFSC IDs- in semaphore list, and maximum ID.

Signed-off-by: Nicolas Le Bayon

feat(st-rif): add STM32MP2x support in RIFSC driver

Adapt RIFSC driver to support all STM32MP2 variants, with specific
RIFSC IDs- in semaphore list, and maximum ID.

Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
Change-Id: Ice244c4518c0b657d625bd7269ea6ad9a04e80c6

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feat(st-usb): enable USBOTG DFU for STM32MP21

USBOTG DFU mode is present on STM32MP21. Adapt device start and stop
sequences using STM32MP21 flag.

Change-Id: Ife8d545cedfa769f58d5c9bc0a3df8b5336b60

feat(st-usb): enable USBOTG DFU for STM32MP21

USBOTG DFU mode is present on STM32MP21. Adapt device start and stop
sequences using STM32MP21 flag.

Change-Id: Ife8d545cedfa769f58d5c9bc0a3df8b5336b60a9
Signed-off-by: Pankaj Dev <pankaj.dev@st.com>
Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>

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feat(st-rif): add RISAF MCE support for STM32MP21

On STM32MP21, RISAF embeds a second encryption method, based on MCE
peripheral, specifically against side-channel attacks using a specific
key with

feat(st-rif): add RISAF MCE support for STM32MP21

On STM32MP21, RISAF embeds a second encryption method, based on MCE
peripheral, specifically against side-channel attacks using a specific
key with two possible sizes: 128 or 256 bits.
Size can be configured via device tree.
Add stm32mp2_risaf_write_mce_key() service in RISAF driver.

Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
Change-Id: I819385b0d9dcaa1081b51206211cec5b73b4d4b4

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feat(st-bsec): add STM32MP21 version support

STM32MP21 is designed with BSEC IP v1.2.

Signed-off-by: Nicolas Le Bayon <nicolas.le.bayon@st.com>
Change-Id: I722b27c62d4c022040e3435ce7e4bb67f6260107

feat(st-pmic): force STPMIC1 and its I2C secure in BL2

On STM32MP13, the PMIC, and so its I2C bus must be secured. Instead
of looking for that info in device tree, just force them to DT_SECURE.

Sig

feat(st-pmic): force STPMIC1 and its I2C secure in BL2

On STM32MP13, the PMIC, and so its I2C bus must be secured. Instead
of looking for that info in device tree, just force them to DT_SECURE.

Signed-off-by: Yann Gautier <yann.gautier@st.com>
Change-Id: I408f260f07f57031816080314549991d28cd08e9

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feat(st-pmic): display information only in BL2

Display the STPMIC version and product ID only in BL2.

No need to be displayed in BL31, when STPMIC drvier is used to switch off
the DDR power supplie

feat(st-pmic): display information only in BL2

Display the STPMIC version and product ID only in BL2.

No need to be displayed in BL31, when STPMIC drvier is used to switch off
the DDR power supplies.

This patch also move the 'pmic2->ref_id' initialization in
initialize_pmic_i2c().

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Change-Id: Ic414c735d16e2937d1435918843d3fad20e8bde5

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feat(st-pmic): add default regulator configuration for enable_ramp_delay

Configure the default ramp delay for the STPMIC25, STPMIC2L and STPMIC1L
regulators, the DT configuration should be used only

feat(st-pmic): add default regulator configuration for enable_ramp_delay

Configure the default ramp delay for the STPMIC25, STPMIC2L and STPMIC1L
regulators, the DT configuration should be used only to change this
values, for example for board or external device constraints.

The behavior is aligned with STPMIC1 driver and the 1ms value is aligned
with OP-TEE driver.
This patch allows to align the regulator part of the device tree
between OP-TEE and TF-A.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Change-Id: I97f00fe118f89d45b3d7bc80ca11aa2e74d9e06c

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feat(stm32mp1): make stpmic2 usable for STM32MP1

Update STPMIC2 driver to use it on STM32MP1 especially
STM32MP_STPMIC1L.

Change-Id: I0db727a093a6a85dca7a74be280c0d1af0e54417
Signed-off-by: Pascal

feat(stm32mp1): make stpmic2 usable for STM32MP1

Update STPMIC2 driver to use it on STM32MP1 especially
STM32MP_STPMIC1L.

Change-Id: I0db727a093a6a85dca7a74be280c0d1af0e54417
Signed-off-by: Pascal Paillet <p.paillet@foss.st.com>

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feat(st-pmic): add support for STPMIC1L and STPMIC2L

Add the support for STPMIC1L and STPMIC2L.
- The BUCK1 can support an high voltage range like BUCK2 depending
on the NVM content.
- Those PMIC su

feat(st-pmic): add support for STPMIC1L and STPMIC2L

Add the support for STPMIC1L and STPMIC2L.
- The BUCK1 can support an high voltage range like BUCK2 depending
on the NVM content.
- Those PMIC support GPO that are used to control external regulators.

Change-Id: I0ccd6aa0768873f8fc94fd514ddf70788ceea4bb
Signed-off-by: Pascal Paillet <p.paillet@foss.st.com>

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