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/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/phy/
H A Dphy-rockchip-usbdp.yaml1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
3 ---
4 $id: http://devicetree.org/schemas/phy/phy-rockchip-usbdp.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Frank Wang <frank.wang@rock-chips.com>
11 - Zhang Yubing <yubing.zhang@rock-chips.com>
16 - rockchip,rk3588-usbdp-phy
23 - description: phy ref clock.
24 - description: phy pcs immortal clock.
25 - description: phy peripheral clock.
[all …]
/OK3568_Linux_fs/kernel/drivers/phy/rockchip/
H A Dphy-rockchip-usbdp.c1 // SPDX-License-Identifier: GPL-2.0-or-later
10 #include <linux/clk-provider.h>
30 #include <linux/phy/phy-rockchip-usbdp.h>
57 /* u2phy-grf */
61 /* usb-grf */
65 /* usbdpphy-grf */
71 /* vo-grf */
95 struct phy_configure_opts_dp *dp);
97 struct phy_configure_opts_dp *dp);
111 struct typec_mux *mux; member
[all …]
H A Dphy-rockchip-typec.c1 // SPDX-License-Identifier: GPL-2.0-only
4 * Author: Chris Zhong <zyw@rock-chips.com>
5 * Kever Yang <kever.yang@rock-chips.com>
7 * The ROCKCHIP Type-C PHY has two PLL clocks. The first PLL clock
8 * is used for USB3, the second PLL clock is used for DP. This Type-C PHY has
9 * 3 working modes: USB3 only mode, DP only mode, and USB3+DP mode.
11 * PHY to switch mode between USB3 and USB3+DP, without disconnecting the USB
13 * In The DP only mode, only the DP PLL needs to be powered on, and the 4 lanes
14 * are all used for DP.
24 * 2. DP only mode:
[all …]
/OK3568_Linux_fs/u-boot/drivers/phy/
H A Dphy-rockchip-usbdp.c1 // SPDX-License-Identifier: GPL-2.0-or-later
14 #include <generic-phy.h>
24 #include <linux/usb/phy-rockchip-usbdp.h>
51 * struct reg_sequence - An individual write from a sequence of writes.
67 /* u2phy-grf */
71 /* usb-grf */
75 /* usbdpphy-grf */
98 struct phy_configure_opts_dp *dp);
100 struct phy_configure_opts_dp *dp);
113 // struct typec_mux *mux;
[all …]
/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/rockchip/
H A Drk3588-vehicle-s66-v10.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 #include "rk3588-vehicle-s66.dtsi"
9 #include "rk3588-rk806-dual.dtsi"
11 pcie20_avdd0v85: pcie20-avdd0v85 {
12 compatible = "regulator-fixed";
13 regulator-name = "pcie20_avdd0v85";
14 regulator-boot-on;
15 regulator-always-on;
16 regulator-min-microvolt = <850000>;
17 regulator-max-microvolt = <850000>;
[all …]
H A Drk3588-vehicle-evb-v21.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 #include "dt-bindings/usb/pd.h"
9 #include "rk3588-vehicle-v20.dtsi"
10 #include "rk3588-rk806-dual.dtsi"
12 pcie20_avdd0v85: pcie20-avdd0v85 {
13 compatible = "regulator-fixed";
14 regulator-name = "pcie20_avdd0v85";
15 regulator-boot-on;
16 regulator-always-on;
17 regulator-min-microvolt = <850000>;
[all …]
H A Drk3588-vehicle-evb-v20.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 #include "dt-bindings/usb/pd.h"
9 #include "rk3588-vehicle-v20.dtsi"
10 #include "rk3588-rk806-dual.dtsi"
12 pcie20_avdd0v85: pcie20-avdd0v85 {
13 compatible = "regulator-fixed";
14 regulator-name = "pcie20_avdd0v85";
15 regulator-boot-on;
16 regulator-always-on;
17 regulator-min-microvolt = <850000>;
[all …]
H A Drk3588-vehicle-maxim-serdes-display-s66.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/display/media-bus-format.h>
14 compatible = "simple-bus";
15 #address-cells = <1>;
16 #size-cells = <0>;
19 compatible = "pwm-backlight";
22 brightness-levels = <0 4 8 16 32 64 128 255>;
23 default-brightness-level = <6>;
27 compatible = "pwm-backlight";
30 brightness-levels = <0 4 8 16 32 64 128 255>;
[all …]
H A Drk3588-evb2-lp4.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 #include "rk3588-evb.dtsi"
9 #include "rk3588-rk806-dual.dtsi"
12 es7202_sound_micarray: es7202-sound-micarray {
14 compatible = "simple-audio-card";
15 simple-audio-card,format = "i2s";
16 simple-audio-card,name = "rockchip,sound-micarray";
17 simple-audio-card,mclk-fs = <256>;
18 simple-audio-card,dai-link@0 {
21 sound-dai = <&pdm0>;
[all …]
H A Drk3588-nvr-demo.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
8 #include "rk3588-nvr.dtsi"
9 #include "rk3588-rk806-single.dtsi"
12 i2s0_sound: i2s0-sound {
14 compatible = "simple-audio-card";
15 simple-audio-card,format = "i2s";
16 simple-audio-card,mclk-fs = <256>;
17 simple-audio-card,name = "rockchip,es8311";
18 simple-audio-card,dai-link@0 {
21 sound-dai = <&i2s0_8ch>;
[all …]
H A Drk3588-vehicle-evb.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 #include "dt-bindings/usb/pd.h"
9 #include "rk3588-vehicle.dtsi"
10 #include "rk3588-rk806-single.dtsi"
13 es8388_sound: es8388-sound {
15 compatible = "rockchip,multicodecs-card";
16 rockchip,card-name = "rockchip-es8388";
17 hp-det-gpio = <&gpio1 RK_PC4 GPIO_ACTIVE_LOW>;
18 io-channels = <&saradc 3>;
19 io-channel-names = "adc-detect";
[all …]
H A Drk3588-vehicle-maxim-serdes.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
6 #include <dt-bindings/display/media-bus-format.h>
14 compatible = "simple-bus";
15 #address-cells = <1>;
16 #size-cells = <0>;
19 compatible = "pwm-backlight";
22 brightness-levels = <0 4 8 16 32 64 128 255>;
23 default-brightness-level = <6>;
27 compatible = "pwm-backlight";
30 brightness-levels = <0 4 8 16 32 64 128 255>;
[all …]
H A Drk3588-vehicle-serdes-display-v21.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
9 compatible = "pwm-backlight";
10 brightness-levels = <
44 default-brightness-level = <200>;
48 compatible = "pwm-backlight";
49 brightness-levels = <
83 default-brightness-level = <200>;
87 compatible = "pwm-backlight";
88 brightness-levels = <
122 default-brightness-level = <200>;
[all …]
H A Drk3588-evb7-lp4.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 #include "dt-bindings/usb/pd.h"
9 #include "rk3588-evb.dtsi"
10 #include "rk3588-rk806-single.dtsi"
13 /* If hdmirx node is disabled, delete the reserved-memory node here. */
14 reserved-memory {
15 #address-cells = <2>;
16 #size-cells = <2>;
19 /* Reserve 128MB memory for hdmirx-controller@fdee0000 */
21 compatible = "shared-dma-pool";
[all …]
H A Drk3588-evb6-lp4.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 #include "dt-bindings/usb/pd.h"
9 #include "rk3588-evb.dtsi"
10 #include "rk3588-rk806-dual.dtsi"
13 pcie20_avdd0v85: pcie20-avdd0v85 {
14 compatible = "regulator-fixed";
15 regulator-name = "pcie20_avdd0v85";
16 regulator-boot-on;
17 regulator-always-on;
18 regulator-min-microvolt = <850000>;
[all …]
H A Drk3588-vehicle-s66.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 #include <dt-bindings/gpio/gpio.h>
8 #include <dt-bindings/pwm/pwm.h>
9 #include <dt-bindings/pinctrl/rockchip.h>
10 #include <dt-bindings/display/drm_mipi_dsi.h>
11 #include <dt-bindings/display/rockchip_vop.h>
12 #include <dt-bindings/sensor-dev.h>
15 compatible = "pwm-backlight";
16 brightness-levels = <
50 default-brightness-level = <200>;
[all …]
H A Drk3588-evb1-lp4.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 #include "dt-bindings/usb/pd.h"
9 #include "rk3588-evb.dtsi"
10 #include "rk3588-rk806-dual.dtsi"
13 /* If hdmirx node is disabled, delete the reserved-memory node here. */
14 reserved-memory {
15 #address-cells = <2>;
16 #size-cells = <2>;
19 /* Reserve 128MB memory for hdmirx-controller@fdee0000 */
21 compatible = "shared-dma-pool";
[all …]
H A Drk3588-toybrick-edp-x0.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
7 #include "dt-bindings/usb/pd.h"
9 #include "rk3588-toybrick.dtsi"
10 #include "rk3588-rk806-single.dtsi"
13 es8388_sound: es8388-sound {
15 compatible = "simple-audio-card";
16 simple-audio-card,format = "i2s";
17 simple-audio-card,mclk-fs = <256>;
18 simple-audio-card,name = "rockchip,es8388-codec";
19 simple-audio-card,dai-link@0 {
[all …]
H A Drk3588-vehicle-serdes-display-v20.dtsi1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
9 compatible = "lontium,lt7911d-fb-notifier";
10 reset-gpios = <&gpio0 RK_PD2 GPIO_ACTIVE_LOW>,
17 compatible = "pwm-backlight";
18 brightness-levels = <
52 default-brightness-level = <200>;
56 compatible = "pwm-backlight";
57 brightness-levels = <
91 default-brightness-level = <200>;
95 compatible = "pwm-backlight";
[all …]
/OK3568_Linux_fs/kernel/drivers/gpu/drm/i915/display/
H A Dintel_dp_link_training.c2 * Copyright © 2008-2015 Intel Corporation
58 int lane; in intel_dp_get_adjust_train() local
62 for (lane = 0; lane < intel_dp->lane_count; lane++) { in intel_dp_get_adjust_train()
63 v = max(v, drm_dp_get_adjust_request_voltage(link_status, lane)); in intel_dp_get_adjust_train()
64 p = max(p, drm_dp_get_adjust_request_pre_emphasis(link_status, lane)); in intel_dp_get_adjust_train()
67 preemph_max = intel_dp->preemph_max(intel_dp); in intel_dp_get_adjust_train()
68 drm_WARN_ON_ONCE(&i915->drm, in intel_dp_get_adjust_train()
77 voltage_max = intel_dp->voltage_max(intel_dp); in intel_dp_get_adjust_train()
78 drm_WARN_ON_ONCE(&i915->drm, in intel_dp_get_adjust_train()
85 for (lane = 0; lane < 4; lane++) in intel_dp_get_adjust_train()
[all …]
/OK3568_Linux_fs/u-boot/drivers/video/exynos/
H A Dexynos_dp.c6 * SPDX-License-Identifier: GPL-2.0+
22 #include <asm/arch/dp.h>
32 disp_info->h_total = disp_info->h_res + disp_info->h_sync_width + in exynos_dp_disp_info()
33 disp_info->h_back_porch + disp_info->h_front_porch; in exynos_dp_disp_info()
34 disp_info->v_total = disp_info->v_res + disp_info->v_sync_width + in exynos_dp_disp_info()
35 disp_info->v_back_porch + disp_info->v_front_porch; in exynos_dp_disp_info()
80 * into E-EDID in I2C device, 0x30. in exynos_dp_read_edid()
83 /* Read Extension Flag, Number of 128-byte EDID extension blocks */ in exynos_dp_read_edid()
88 printf("DP EDID data includes a single extension!\n"); in exynos_dp_read_edid()
97 printf("DP EDID Read failed!\n"); in exynos_dp_read_edid()
[all …]
/OK3568_Linux_fs/kernel/drivers/phy/qualcomm/
H A Dphy-qcom-qmp.c1 // SPDX-License-Identifier: GPL-2.0
7 #include <linux/clk-provider.h>
23 #include <dt-bindings/phy/phy.h>
25 #include "phy-qcom-qmp.h"
42 /* DP PHY soft reset */
44 /* mux to select DP PHY reset control, 0:HW control, 1: software reset */
48 /* mux to select USB3 PHY reset control, 0:HW control, 1: software reset */
53 #define DP_MODE BIT(1) /* enables DP mode */
83 * if yes, then offset gives index in the reg-layout
88 * for cases when second lane needs different values
[all …]
/OK3568_Linux_fs/kernel/drivers/gpu/drm/tegra/
H A Dsor.c1 // SPDX-License-Identifier: GPL-2.0-only
7 #include <linux/clk-provider.h>
28 #include "dp.h"
486 u32 value = readl(sor->regs + (offset << 2)); in tegra_sor_readl()
488 trace_sor_readl(sor->dev, offset, value); in tegra_sor_readl()
496 trace_sor_writel(sor->dev, offset, value); in tegra_sor_writel()
497 writel(value, sor->regs + (offset << 2)); in tegra_sor_writel()
504 clk_disable_unprepare(sor->clk); in tegra_sor_set_parent_clock()
506 err = clk_set_parent(sor->clk_out, parent); in tegra_sor_set_parent_clock()
510 err = clk_prepare_enable(sor->clk); in tegra_sor_set_parent_clock()
[all …]
/OK3568_Linux_fs/kernel/drivers/gpu/drm/amd/include/
H A Datombios.h2 * Copyright 2006-2007 Advanced Micro Devices, Inc.
107 #define ATOM_SCALER_DISABLE 0 //For Fudo, it's bypass and auto-cengter & no replication
108 #define ATOM_SCALER_CENTER 1 //For Fudo, it's bypass and auto-center & auto replication
110 #define ATOM_SCALER_MULTI_EX 3 //For Fudo only, it's multi-tap mode only used to drive TV or CV,…
222 UCHAR uaFirmWareSignature[4]; //Signature to distinguish between Atombios and non-atombios,
245 UCHAR uaFirmWareSignature[4]; //Signature to distinguish between Atombios and non-atombios,
427 …ONG ulPointerReturnFlag:1; // BYTE_3[7]=1 - Return the pointer to the right Data Block; BYTE_…
433 …ONG ulPointerReturnFlag:1; // BYTE_3[7]=1 - Return the pointer to the right Data Block; BYTE_…
440 …ULONG ulClock; //When returen, it's the re-calculated clock based on given Fb_div Post_Di…
538 …UCHAR ucInputFlag; //Input Flags. ucInputFlag[0] - Strobe(1)/Performance(0)…
[all …]
/OK3568_Linux_fs/kernel/drivers/gpu/drm/radeon/
H A Datombios.h2 * Copyright 2006-2007 Advanced Micro Devices, Inc.
214 UCHAR uaFirmWareSignature[4]; /*Signature to distinguish between Atombios and non-atombios,
397 …ONG ulPointerReturnFlag:1; // BYTE_3[7]=1 - Return the pointer to the right Data Block; BYTE_…
403 …ONG ulPointerReturnFlag:1; // BYTE_3[7]=1 - Return the pointer to the right Data Block; BYTE_…
410 …ULONG ulClock; //When returen, it's the re-calculated clock based on given Fb_div Post_Di…
504 …UCHAR ucInputFlag; //Input Flags. ucInputFlag[0] - Strobe(1)/Performance(0)…
536 #define ATOM_PLL_INPUT_FLAG_PLL_STROBE_MODE_EN 1 // 1-StrobeMode, 0-PerformanceMode
544 …bDiv; //Output:UPPER_WORD=FB_DIV_INTEGER, LOWER_WORD=FB_DIV_FRAC shl (16-FB_FRACTION_BITS)
549 … //Input : ATOM_PLL_INPUT_FLAG_PLL_STROBE_MODE_EN: 1-StrobeMode, 0-PerformanceMode
704 // =0: DP encoder
[all …]

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