1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Copyright (c) 2023 Rockchip Electronics Co., Ltd. 4 * 5 */ 6 7#include <dt-bindings/gpio/gpio.h> 8#include <dt-bindings/pwm/pwm.h> 9#include <dt-bindings/pinctrl/rockchip.h> 10#include <dt-bindings/display/drm_mipi_dsi.h> 11#include <dt-bindings/display/rockchip_vop.h> 12#include <dt-bindings/sensor-dev.h> 13/ { 14 backlight: backlight { 15 compatible = "pwm-backlight"; 16 brightness-levels = < 17 0 20 20 21 21 22 22 23 18 23 24 24 25 25 26 26 27 19 27 28 28 29 29 30 30 31 20 31 32 32 33 33 34 34 35 21 35 36 36 37 37 38 38 39 22 40 41 42 43 44 45 46 47 23 48 49 50 51 52 53 54 55 24 56 57 58 59 60 61 62 63 25 64 65 66 67 68 69 70 71 26 72 73 74 75 76 77 78 79 27 80 81 82 83 84 85 86 87 28 88 89 90 91 92 93 94 95 29 96 97 98 99 100 101 102 103 30 104 105 106 107 108 109 110 111 31 112 113 114 115 116 117 118 119 32 120 121 122 123 124 125 126 127 33 128 129 130 131 132 133 134 135 34 136 137 138 139 140 141 142 143 35 144 145 146 147 148 149 150 151 36 152 153 154 155 156 157 158 159 37 160 161 162 163 164 165 166 167 38 168 169 170 171 172 173 174 175 39 176 177 178 179 180 181 182 183 40 184 185 186 187 188 189 190 191 41 192 193 194 195 196 197 198 199 42 200 201 202 203 204 205 206 207 43 208 209 210 211 212 213 214 215 44 216 217 218 219 220 221 222 223 45 224 225 226 227 228 229 230 231 46 232 233 234 235 236 237 238 239 47 240 241 242 243 244 245 246 247 48 248 249 250 251 252 253 254 255 49 >; 50 default-brightness-level = <200>; 51 }; 52 53 test-power { 54 status = "okay"; 55 }; 56 57 vcc12v_dcin: vcc12v-dcin { 58 compatible = "regulator-fixed"; 59 regulator-name = "vcc12v_dcin"; 60 regulator-always-on; 61 regulator-boot-on; 62 regulator-min-microvolt = <12000000>; 63 regulator-max-microvolt = <12000000>; 64 }; 65 66 vcc5v0_sys: vcc5v0-sys { 67 compatible = "regulator-fixed"; 68 regulator-name = "vcc5v0_sys"; 69 regulator-always-on; 70 regulator-boot-on; 71 regulator-min-microvolt = <5000000>; 72 regulator-max-microvolt = <5000000>; 73 vin-supply = <&vcc12v_dcin>; 74 }; 75 76 vcc5v0_usbdcin: vcc5v0-usbdcin { 77 compatible = "regulator-fixed"; 78 regulator-name = "vcc5v0_usbdcin"; 79 regulator-always-on; 80 regulator-boot-on; 81 regulator-min-microvolt = <5000000>; 82 regulator-max-microvolt = <5000000>; 83 vin-supply = <&vcc12v_dcin>; 84 }; 85 86 vcc5v0_usb: vcc5v0-usb { 87 compatible = "regulator-fixed"; 88 regulator-name = "vcc5v0_usb"; 89 regulator-always-on; 90 regulator-boot-on; 91 regulator-min-microvolt = <5000000>; 92 regulator-max-microvolt = <5000000>; 93 vin-supply = <&vcc5v0_usbdcin>; 94 }; 95}; 96 97&av1d_mmu { 98 status = "okay"; 99}; 100 101&cpu_l0 { 102 cpu-supply = <&vdd_cpu_lit_s0>; 103 mem-supply = <&vdd_cpu_lit_s0>; 104}; 105 106&cpu_b0 { 107 cpu-supply = <&vdd_cpu_big0_s0>; 108 mem-supply = <&vdd_cpu_big0_s0>; 109}; 110 111&cpu_b2 { 112 cpu-supply = <&vdd_cpu_big1_s0>; 113 mem-supply = <&vdd_cpu_big1_s0>; 114}; 115 116&gpu { 117 mali-supply = <&vdd_gpu_s0>; 118 mem-supply = <&vdd_gpu_s0>; 119 status = "okay"; 120}; 121 122&i2s0_8ch { 123 status = "disabled"; 124}; 125 126&iep { 127 status = "okay"; 128}; 129 130&iep_mmu { 131 status = "okay"; 132}; 133 134&jpegd { 135 status = "okay"; 136}; 137 138&jpegd_mmu { 139 status = "okay"; 140}; 141 142&jpege_ccu { 143 status = "okay"; 144}; 145 146&jpege0 { 147 status = "okay"; 148}; 149 150&jpege0_mmu { 151 status = "okay"; 152}; 153 154&jpege1 { 155 status = "okay"; 156}; 157 158&jpege1_mmu { 159 status = "okay"; 160}; 161 162&jpege2 { 163 status = "okay"; 164}; 165 166&jpege2_mmu { 167 status = "okay"; 168}; 169 170&jpege3 { 171 status = "okay"; 172}; 173 174&jpege3_mmu { 175 status = "okay"; 176}; 177 178&mpp_srv { 179 status = "okay"; 180}; 181 182&rga3_core0 { 183 status = "okay"; 184}; 185 186&rga3_0_mmu { 187 status = "okay"; 188}; 189 190&rga3_core1 { 191 status = "okay"; 192}; 193 194&rga3_1_mmu { 195 status = "okay"; 196}; 197 198&rga2 { 199 status = "okay"; 200}; 201 202&rknpu { 203 rknpu-supply = <&vdd_npu_s0>; 204 mem-supply = <&vdd_npu_s0>; 205 status = "okay"; 206}; 207 208&rknpu_mmu { 209 status = "okay"; 210}; 211 212&rkvdec_ccu { 213 status = "okay"; 214}; 215 216&rkvdec0 { 217 status = "okay"; 218}; 219 220&rkvdec0_mmu { 221 status = "okay"; 222}; 223 224&rkvdec1 { 225 status = "okay"; 226}; 227 228&rkvdec1_mmu { 229 status = "okay"; 230}; 231 232&rkvenc_ccu { 233 status = "okay"; 234}; 235 236&rkvenc0 { 237 status = "okay"; 238}; 239 240&rkvenc0_mmu { 241 status = "okay"; 242}; 243 244&rkvenc1 { 245 status = "okay"; 246}; 247 248&rkvenc1_mmu { 249 status = "okay"; 250}; 251 252&rockchip_suspend { 253 status = "okay"; 254 rockchip,sleep-debug-en = <1>; 255}; 256 257&saradc { 258 status = "okay"; 259 vref-supply = <&vcc_1v8_s0>; 260}; 261 262&sdhci { 263 bus-width = <8>; 264 no-sdio; 265 no-sd; 266 non-removable; 267 max-frequency = <200000000>; 268 mmc-hs400-1_8v; 269 mmc-hs400-enhanced-strobe; 270 status = "okay"; 271}; 272 273&sdmmc { 274 max-frequency = <150000000>; 275 no-sdio; 276 no-mmc; 277 bus-width = <4>; 278 cap-mmc-highspeed; 279 cap-sd-highspeed; 280 disable-wp; 281 sd-uhs-sdr104; 282 vqmmc-supply = <&vccio_sd_s0>; 283 status = "disabled"; 284}; 285 286&tsadc { 287 status = "okay"; 288}; 289 290&u2phy0 { 291 status = "okay"; 292}; 293 294&u2phy1 { 295 status = "okay"; 296}; 297 298&u2phy2 { 299 status = "okay"; 300}; 301 302&u2phy3 { 303 status = "okay"; 304}; 305 306&u2phy0_otg { 307 status = "okay"; 308}; 309 310&u2phy1_otg { 311 rockchip,sel-pipe-phystatus; 312 status = "okay"; 313}; 314 315&u2phy2_host { 316 status = "okay"; 317}; 318 319&u2phy3_host { 320 status = "okay"; 321}; 322 323&usb_host0_ehci { 324 status = "okay"; 325}; 326 327&usb_host0_ohci { 328 status = "okay"; 329}; 330 331&usb_host1_ehci { 332 status = "okay"; 333}; 334 335&usb_host1_ohci { 336 status = "okay"; 337}; 338 339&usbdp_phy0 { 340 rockchip,dp-lane-mux = <2 3>; 341 status = "okay"; 342}; 343 344&usbdp_phy0_dp { 345 status = "disabled"; 346}; 347 348&usbdp_phy0_u3 { 349 status = "okay"; 350}; 351 352&usbdp_phy1 { 353 status = "okay"; 354}; 355 356&usbdp_phy1_dp { 357 status = "okay"; 358}; 359 360&usbdp_phy1_u3 { 361 status = "okay"; 362}; 363 364&usbdrd3_0 { 365 status = "okay"; 366}; 367 368&usbdrd_dwc3_0 { 369 dr_mode = "otg"; 370 extcon=<&u2phy0>; 371 status = "okay"; 372}; 373 374&usbhost3_0 { 375 status = "okay"; 376}; 377 378&usbhost_dwc3_0 { 379 status = "okay"; 380}; 381 382&usbdrd3_1 { 383 status = "okay"; 384}; 385 386&usbdrd_dwc3_1 { 387 dr_mode = "host"; 388 maximum-speed = "high-speed"; 389 phys = <&u2phy1_otg>; 390 phy-names = "usb2-phy"; 391 snps,dis_u2_susphy_quirk; 392 status = "okay"; 393}; 394 395&vdpu { 396 status = "okay"; 397}; 398 399&vdpu_mmu { 400 status = "okay"; 401}; 402 403&vepu { 404 status = "okay"; 405}; 406 407&vop { 408 status = "okay"; 409}; 410 411&vop_mmu { 412 status = "okay"; 413}; 414 415/* vp0 & vp1 splice for 8K output */ 416&vp0 { 417 rockchip,plane-mask = <(1 << ROCKCHIP_VOP2_CLUSTER0 | 1 << ROCKCHIP_VOP2_ESMART0)>; 418 rockchip,primary-plane = <ROCKCHIP_VOP2_ESMART0>; 419}; 420 421&vp1 { 422 rockchip,plane-mask = <(1 << ROCKCHIP_VOP2_CLUSTER1 | 1 << ROCKCHIP_VOP2_ESMART1)>; 423 rockchip,primary-plane = <ROCKCHIP_VOP2_ESMART1>; 424}; 425 426&vp2 { 427 rockchip,plane-mask = <(1 << ROCKCHIP_VOP2_CLUSTER2 | 1 << ROCKCHIP_VOP2_ESMART2)>; 428 rockchip,primary-plane = <ROCKCHIP_VOP2_ESMART2>; 429}; 430 431&vp3 { 432 rockchip,plane-mask = <(1 << ROCKCHIP_VOP2_CLUSTER3 | 1 << ROCKCHIP_VOP2_ESMART3)>; 433 rockchip,primary-plane = <ROCKCHIP_VOP2_ESMART3>; 434}; 435