1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Copyright (c) 2021 Rockchip Electronics Co., Ltd. 4 * 5 */ 6 7#include "dt-bindings/usb/pd.h" 8#include "rk3588m.dtsi" 9#include "rk3588-vehicle.dtsi" 10#include "rk3588-rk806-single.dtsi" 11 12/ { 13 es8388_sound: es8388-sound { 14 status = "disabled"; 15 compatible = "rockchip,multicodecs-card"; 16 rockchip,card-name = "rockchip-es8388"; 17 hp-det-gpio = <&gpio1 RK_PC4 GPIO_ACTIVE_LOW>; 18 io-channels = <&saradc 3>; 19 io-channel-names = "adc-detect"; 20 keyup-threshold-microvolt = <1800000>; 21 poll-interval = <100>; 22 spk-con-gpio = <&gpio4 RK_PA2 GPIO_ACTIVE_HIGH>; 23 hp-con-gpio = <&gpio4 RK_PA7 GPIO_ACTIVE_HIGH>; 24 rockchip,format = "i2s"; 25 rockchip,mclk-fs = <256>; 26 rockchip,cpu = <&i2s0_8ch>; 27 rockchip,codec = <&es8388>; 28 rockchip,audio-routing = 29 "Headphone", "LOUT1", 30 "Headphone", "ROUT1", 31 "Speaker", "LOUT2", 32 "Speaker", "ROUT2", 33 "Headphone", "Headphone Power", 34 "Headphone", "Headphone Power", 35 "Speaker", "Speaker Power", 36 "Speaker", "Speaker Power", 37 "LINPUT1", "Main Mic", 38 "LINPUT2", "Main Mic", 39 "RINPUT1", "Headset Mic", 40 "RINPUT2", "Headset Mic"; 41 pinctrl-names = "default"; 42 pinctrl-0 = <&hp_det>; 43 play-pause-key { 44 label = "playpause"; 45 linux,code = <KEY_PLAYPAUSE>; 46 press-threshold-microvolt = <2000>; 47 }; 48 }; 49 50 fan: pwm-fan { 51 compatible = "pwm-fan"; 52 #cooling-cells = <2>; 53 pwms = <&pwm3 0 50000 0>; 54 cooling-levels = <0 50 100 150 200 255>; 55 rockchip,temp-trips = < 56 50000 1 57 55000 2 58 60000 3 59 65000 4 60 70000 5 61 >; 62 }; 63 64 65 pcie20_avdd0v85: pcie20-avdd0v85 { 66 compatible = "regulator-fixed"; 67 regulator-name = "pcie20_avdd0v85"; 68 regulator-boot-on; 69 regulator-always-on; 70 regulator-min-microvolt = <850000>; 71 regulator-max-microvolt = <850000>; 72 vin-supply = <&vdd_0v85_s0>; 73 }; 74 75 pcie20_avdd1v8: pcie20-avdd1v8 { 76 compatible = "regulator-fixed"; 77 regulator-name = "pcie20_avdd1v8"; 78 regulator-boot-on; 79 regulator-always-on; 80 regulator-min-microvolt = <1800000>; 81 regulator-max-microvolt = <1800000>; 82 vin-supply = <&avcc_1v8_s0>; 83 }; 84 85 pcie30_avdd0v75: pcie30-avdd0v75 { 86 compatible = "regulator-fixed"; 87 regulator-name = "pcie30_avdd0v75"; 88 regulator-boot-on; 89 regulator-always-on; 90 regulator-min-microvolt = <750000>; 91 regulator-max-microvolt = <750000>; 92 vin-supply = <&avdd_0v75_s0>; 93 }; 94 95 pcie30_avdd1v8: pcie30-avdd1v8 { 96 compatible = "regulator-fixed"; 97 regulator-name = "pcie30_avdd1v8"; 98 regulator-boot-on; 99 regulator-always-on; 100 regulator-min-microvolt = <1800000>; 101 regulator-max-microvolt = <1800000>; 102 vin-supply = <&avcc_1v8_s0>; 103 }; 104 105 sdio_pwrseq: sdio-pwrseq { 106 compatible = "mmc-pwrseq-simple"; 107 clocks = <&hym8563>; 108 clock-names = "ext_clock"; 109 pinctrl-names = "default"; 110 pinctrl-0 = <&wifi_enable_h>; 111 /* 112 * On the module itself this is one of these (depending 113 * on the actual card populated): 114 * - SDIO_RESET_L_WL_REG_ON 115 * - PDN (power down when low) 116 */ 117 post-power-on-delay-ms = <200>; 118 reset-gpios = <&gpio2 RK_PC5 GPIO_ACTIVE_LOW>; 119 status = "disabled"; 120 }; 121 122 rk_headset: rk-headset { 123 status = "disabled"; 124 compatible = "rockchip_headset"; 125 headset_gpio = <&gpio1 RK_PD5 GPIO_ACTIVE_LOW>; 126 pinctrl-names = "default"; 127 pinctrl-0 = <&hp_det>; 128 io-channels = <&saradc 3>; 129 }; 130 131 132 vcc_1v1_nldo_s3: vcc-1v1-nldo-s3 { 133 compatible = "regulator-fixed"; 134 regulator-name = "vcc_1v1_nldo_s3"; 135 regulator-always-on; 136 regulator-boot-on; 137 regulator-min-microvolt = <1100000>; 138 regulator-max-microvolt = <1100000>; 139 vin-supply = <&vcc5v0_sys>; 140 }; 141 142 vcc3v3_lcd_n: vcc3v3-lcd0-n { 143 compatible = "regulator-fixed"; 144 regulator-name = "vcc3v3_lcd0_n"; 145 regulator-boot-on; 146 enable-active-high; 147 gpio = <&gpio2 RK_PC1 GPIO_ACTIVE_HIGH>; 148 vin-supply = <&vcc_1v8_s0>; 149 }; 150 151 vcc5v0_otg: vcc5v0-otg { 152 compatible = "regulator-fixed"; 153 regulator-name = "vcc5v0_otg"; 154 regulator-boot-on; 155 regulator-always-on; 156 regulator-min-microvolt = <5000000>; 157 regulator-max-microvolt = <5000000>; 158 enable-active-high; 159 gpio = <&gpio4 RK_PA0 GPIO_ACTIVE_HIGH>; 160 vin-supply = <&vcc5v0_usb>; 161 pinctrl-names = "default"; 162 pinctrl-0 = <&vcc5v0_otg_en>; 163 }; 164 165 vcc5v0_host: vcc5v0-host { 166 compatible = "regulator-fixed"; 167 regulator-name = "vcc5v0_host"; 168 regulator-boot-on; 169 regulator-always-on; 170 regulator-min-microvolt = <5000000>; 171 regulator-max-microvolt = <5000000>; 172 enable-active-high; 173 gpio = <&gpio4 RK_PA3 GPIO_ACTIVE_HIGH>; 174 vin-supply = <&vcc5v0_usb>; 175 pinctrl-names = "default"; 176 pinctrl-0 = <&vcc5v0_host_en>; 177 }; 178 179 wireless_bluetooth: wireless-bluetooth { 180 compatible = "bluetooth-platdata"; 181 clocks = <&hym8563>; 182 clock-names = "ext_clock"; 183 uart_rts_gpios = <&gpio4 RK_PC4 GPIO_ACTIVE_LOW>; 184 pinctrl-names = "default", "rts_gpio"; 185 pinctrl-0 = <&uart9m0_rtsn>, <&bt_reset_gpio>, <&bt_wake_gpio>, <&bt_irq_gpio>; 186 pinctrl-1 = <&uart9_gpios>; 187 BT,reset_gpio = <&gpio4 RK_PC2 GPIO_ACTIVE_HIGH>; 188 BT,wake_gpio = <&gpio4 RK_PC6 GPIO_ACTIVE_HIGH>; 189 BT,wake_host_irq = <&gpio2 RK_PB4 GPIO_ACTIVE_HIGH>; 190 status = "okay"; 191 }; 192 193 wireless_wlan: wireless-wlan { 194 compatible = "wlan-platdata"; 195 wifi_chip_type = "ap6398s"; 196 pinctrl-names = "default"; 197 pinctrl-0 = <&wifi_host_wake_irq>; 198 WIFI,host_wake_irq = <&gpio2 RK_PB6 GPIO_ACTIVE_HIGH>; 199 WIFI,poweren_gpio = <&gpio2 RK_PC5 GPIO_ACTIVE_HIGH>; 200 status = "okay"; 201 }; 202 203 dummy_codec: dummy-codec { 204 status = "okay"; 205 compatible = "rockchip,dummy-codec"; 206 #sound-dai-cells = <0>; 207 pinctrl-names = "default"; 208 pinctrl-0 = <&rk3308_reset>; 209 }; 210 211 car_rk3308_sound: car-rk3308-sound { 212 status = "okay"; 213 compatible = "simple-audio-card"; 214 simple-audio-card,name = "rockchip,car-rk3308-sound"; 215 simple-audio-card,format = "i2s"; 216 simple-audio-card,mclk-fs = <256>; 217 simple-audio-card,bitclock-master = <&codec_master>; 218 simple-audio-card,frame-master = <&codec_master>; 219 simple-audio-card,cpu { 220 sound-dai = <&i2s0_8ch>; 221 }; 222 codec_master: simple-audio-card,codec { 223 sound-dai = <&dummy_codec>; 224 }; 225 }; 226}; 227 228&backlight { 229 pwms = <&pwm1 0 25000 0>; 230 status = "okay"; 231}; 232 233&combphy0_ps { 234 status = "okay"; 235}; 236 237&combphy1_ps { 238 status = "okay"; 239}; 240 241&combphy2_psu { 242 status = "okay"; 243}; 244 245&gmac1 { 246 /* Use rgmii-rxid mode to disable rx delay inside Soc */ 247 phy-mode = "rgmii-rxid"; 248 clock_in_out = "output"; 249 250 snps,reset-gpio = <&gpio3 RK_PB7 GPIO_ACTIVE_LOW>; 251 snps,reset-active-low; 252 /* Reset time is 20ms, 100ms for rtl8211f */ 253 snps,reset-delays-us = <0 20000 100000>; 254 255 pinctrl-names = "default"; 256 pinctrl-0 = <&gmac1_miim 257 &gmac1_tx_bus2 258 &gmac1_rx_bus2 259 &gmac1_rgmii_clk 260 &gmac1_rgmii_bus>; 261 262 tx_delay = <0x43>; 263 /* rx_delay = <0x3f>; */ 264 265 phy-handle = <&rgmii_phy>; 266 status = "disabled"; 267}; 268 269&hdmi0 { 270 enable-gpios = <&gpio4 RK_PB1 GPIO_ACTIVE_HIGH>; 271 status = "okay"; 272}; 273 274&hdmi0_in_vp0 { 275 status = "okay"; 276}; 277 278&hdmi0_sound { 279 status = "okay"; 280}; 281 282&hdmi1 { 283 enable-gpios = <&gpio4 RK_PB2 GPIO_ACTIVE_HIGH>; 284 status = "okay"; 285}; 286 287&hdmi1_in_vp0 { 288 status = "okay"; 289}; 290 291&hdmi1_sound { 292 status = "okay"; 293}; 294 295 296&hdptxphy_hdmi0 { 297 status = "okay"; 298}; 299 300&hdptxphy_hdmi1 { 301 status = "okay"; 302}; 303 304&i2c0 { 305 status = "okay"; 306 pinctrl-names = "default"; 307 pinctrl-0 = <&i2c0m2_xfer>; 308 309 vdd_cpu_big0_s0: vdd_cpu_big0_mem_s0: rk8602@42 { 310 compatible = "rockchip,rk8602"; 311 reg = <0x42>; 312 vin-supply = <&vcc5v0_sys>; 313 regulator-compatible = "rk860x-reg"; 314 regulator-name = "vdd_cpu_big0_s0"; 315 regulator-min-microvolt = <550000>; 316 regulator-max-microvolt = <1050000>; 317 regulator-ramp-delay = <2300>; 318 rockchip,suspend-voltage-selector = <1>; 319 regulator-boot-on; 320 regulator-always-on; 321 regulator-state-mem { 322 regulator-off-in-suspend; 323 }; 324 }; 325 326 vdd_cpu_big1_s0: vdd_cpu_big1_mem_s0: rk8603@43 { 327 compatible = "rockchip,rk8603"; 328 reg = <0x43>; 329 vin-supply = <&vcc5v0_sys>; 330 regulator-compatible = "rk860x-reg"; 331 regulator-name = "vdd_cpu_big1_s0"; 332 regulator-min-microvolt = <550000>; 333 regulator-max-microvolt = <1050000>; 334 regulator-ramp-delay = <2300>; 335 rockchip,suspend-voltage-selector = <1>; 336 regulator-boot-on; 337 regulator-always-on; 338 regulator-state-mem { 339 regulator-off-in-suspend; 340 }; 341 }; 342}; 343 344&i2c1 { 345 status = "okay"; 346 pinctrl-names = "default"; 347 pinctrl-0 = <&i2c1m2_xfer>; 348 349 vdd_npu_s0: vdd_npu_mem_s0: rk8602@42 { 350 compatible = "rockchip,rk8602"; 351 reg = <0x42>; 352 vin-supply = <&vcc5v0_sys>; 353 regulator-compatible = "rk860x-reg"; 354 regulator-name = "vdd_npu_s0"; 355 regulator-min-microvolt = <550000>; 356 regulator-max-microvolt = <950000>; 357 regulator-ramp-delay = <2300>; 358 rockchip,suspend-voltage-selector = <1>; 359 regulator-boot-on; 360 regulator-always-on; 361 regulator-state-mem { 362 regulator-off-in-suspend; 363 }; 364 }; 365}; 366 367&i2c4 { 368 status = "okay"; 369 pinctrl-0 = <&i2c4m2_xfer>; 370 hym8563: hym8563@51 { 371 compatible = "haoyu,hym8563"; 372 reg = <0x51>; 373 #clock-cells = <0>; 374 clock-frequency = <32768>; 375 clock-output-names = "hym8563"; 376 pinctrl-names = "default"; 377 pinctrl-0 = <&hym8563_int>; 378 interrupt-parent = <&gpio0>; 379 interrupts = <RK_PB0 IRQ_TYPE_LEVEL_LOW>; 380 wakeup-source; 381 }; 382 383}; 384 385&i2c5 { 386 status = "okay"; 387 388}; 389 390&i2c6 { 391 status = "okay"; 392 393}; 394 395&i2c7 { 396 status = "okay"; 397 es8388: es8388@11 { 398 status = "okay"; 399 #sound-dai-cells = <0>; 400 compatible = "everest,es8388", "everest,es8323"; 401 reg = <0x11>; 402 clocks = <&mclkout_i2s0>; 403 clock-names = "mclk"; 404 assigned-clocks = <&mclkout_i2s0>; 405 assigned-clock-rates = <12288000>; 406 pinctrl-names = "default"; 407 pinctrl-0 = <&i2s0_mclk>; 408 }; 409}; 410 411&i2s0_8ch { 412 status = "okay"; 413 pinctrl-names = "default"; 414 pinctrl-0 = <&i2s0_lrck 415 &i2s0_sclk 416 &i2s0_sdi0 417 &i2s0_sdi1 418 &i2s0_sdo0 419 &i2s0_sdo1 420 &i2s0_sdo2 421 &i2s0_sdo3>; 422}; 423 424&i2s5_8ch { 425 status = "okay"; 426}; 427 428&i2s6_8ch { 429 status = "okay"; 430}; 431 432&i2s7_8ch { 433 status = "okay"; 434}; 435 436&mdio1 { 437 rgmii_phy: phy@1 { 438 compatible = "ethernet-phy-ieee802.3-c22"; 439 reg = <0x1>; 440 }; 441}; 442 443&pcie2x1l0 { 444 reset-gpios = <&gpio1 RK_PB4 GPIO_ACTIVE_HIGH>; 445 status = "disabled"; 446}; 447 448&pcie2x1l2 { 449 reset-gpios = <&gpio3 RK_PD1 GPIO_ACTIVE_HIGH>; 450 rockchip,skip-scan-in-resume; 451 pinctrl-names = "default"; 452 pinctrl-0 = <&wifi_enable_h>; 453 status = "okay"; 454}; 455 456&pcie30phy { 457 rockchip,pcie30-phymode = <PHY_MODE_PCIE_AGGREGATION>; 458 status = "disabled"; 459}; 460 461&pcie3x4 { 462 reset-gpios = <&gpio4 RK_PB3 GPIO_ACTIVE_HIGH>; 463 status = "disabled"; 464}; 465 466&pinctrl { 467 cam { 468 mipicsi0_pwr: mipicsi0-pwr { 469 rockchip,pins = 470 /* camera power en */ 471 <1 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>; 472 }; 473 mipicsi1_pwr: mipicsi1-pwr { 474 rockchip,pins = 475 /* camera power en */ 476 <1 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>; 477 }; 478 mipidcphy0_pwr: mipidcphy0-pwr { 479 rockchip,pins = 480 /* camera power en */ 481 <2 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>; 482 }; 483 }; 484 485 headphone { 486 hp_det: hp-det { 487 rockchip,pins = <1 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>; 488 }; 489 }; 490 491 hym8563 { 492 hym8563_int: hym8563-int { 493 rockchip,pins = <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_up>; 494 }; 495 }; 496 497 lcd { 498 lcd_rst_gpio: lcd-rst-gpio { 499 rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>; 500 }; 501 }; 502 503 sdio-pwrseq { 504 wifi_enable_h: wifi-enable-h { 505 rockchip,pins = <2 RK_PC5 RK_FUNC_GPIO &pcfg_pull_up>; 506 }; 507 }; 508 509 touch { 510 touch_gpio: touch-gpio { 511 rockchip,pins = 512 <3 RK_PC1 RK_FUNC_GPIO &pcfg_pull_down>, 513 <3 RK_PC0 RK_FUNC_GPIO &pcfg_pull_up>; 514 }; 515 }; 516 517 usb { 518 vcc5v0_otg_en: vcc5v0-otg-en { 519 rockchip,pins = <4 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>; 520 }; 521 522 vcc5v0_host_en: vcc5v0-host-en { 523 rockchip,pins = <4 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>; 524 }; 525 }; 526 527 528 wireless-bluetooth { 529 uart9_gpios: uart9-gpios { 530 rockchip,pins = <4 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>; 531 }; 532 533 bt_reset_gpio: bt-reset-gpio { 534 rockchip,pins = <4 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>; 535 }; 536 537 bt_wake_gpio: bt-wake-gpio { 538 rockchip,pins = <4 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>; 539 }; 540 541 bt_irq_gpio: bt-irq-gpio { 542 rockchip,pins = <2 RK_PB4 RK_FUNC_GPIO &pcfg_pull_none>; 543 }; 544 }; 545 546 wireless-wlan { 547 wifi_host_wake_irq: wifi-host-wake-irq { 548 rockchip,pins = <2 RK_PB6 RK_FUNC_GPIO &pcfg_pull_down>; 549 }; 550 }; 551 552 rk3308 { 553 rk3308_reset: rk3308-reset { 554 rockchip,pins = <2 RK_PC1 RK_FUNC_GPIO &pcfg_pull_up>; 555 }; 556 }; 557}; 558 559&pwm1 { 560 status = "okay"; 561}; 562 563&pwm3 { 564 pinctrl-0 = <&pwm3m1_pins>; 565 status = "okay"; 566}; 567 568&route_dsi0 { 569 status = "okay"; 570 connect = <&vp3_out_dsi0>; 571}; 572 573&route_dsi1 { 574 status = "disabled"; 575 connect = <&vp3_out_dsi1>; 576}; 577 578&route_hdmi0 { 579 status = "okay"; 580}; 581 582&route_hdmi1 { 583 status = "okay"; 584}; 585 586&sata0 { 587 status = "okay"; 588}; 589 590&sdio { 591 max-frequency = <150000000>; 592 no-sd; 593 no-mmc; 594 bus-width = <4>; 595 disable-wp; 596 cap-sd-highspeed; 597 cap-sdio-irq; 598 keep-power-in-suspend; 599 mmc-pwrseq = <&sdio_pwrseq>; 600 non-removable; 601 pinctrl-names = "default"; 602 pinctrl-0 = <&sdiom0_pins>; 603 sd-uhs-sdr104; 604 status = "disabled"; 605}; 606 607&sdmmc { 608 status = "disabled"; 609}; 610 611&uart9 { 612 status = "okay"; 613 pinctrl-names = "default"; 614 pinctrl-0 = <&uart9m0_xfer &uart9m0_ctsn>; 615}; 616 617&u2phy0_otg { 618 status = "okay"; 619}; 620 621&u2phy1_otg { 622 phy-supply = <&vcc5v0_otg>; 623}; 624 625&u2phy2_host { 626 phy-supply = <&vcc5v0_otg>; 627}; 628 629&u2phy3_host { 630 phy-supply = <&vcc5v0_host>; 631}; 632 633&usbdp_phy0 { 634 rockchip,dp-lane-mux = <2 3>; 635 status = "okay"; 636}; 637 638&usbdp_phy0_dp { 639 status = "okay"; 640}; 641 642&usbdp_phy0_u3 { 643 status = "okay"; 644}; 645 646&usbdp_phy1 { 647 rockchip,dp-lane-mux = <3 2 1 0>; 648 status = "okay"; 649}; 650 651&usbdp_phy1_dp { 652 status = "okay"; 653}; 654 655&usbdp_phy1_u3 { 656 maximum-speed = "high-speed"; 657 status = "okay"; 658}; 659 660&usbdrd_dwc3_0 { 661 dr_mode = "peripheral"; 662 maximum-speed = "high-speed"; 663 extcon = <&u2phy0>; 664 status = "okay"; 665}; 666 667&usbdrd_dwc3_1 { 668 dr_mode = "host"; 669 maximum-speed = "high-speed"; 670 snps,dis_u2_susphy_quirk; 671 status = "okay"; 672}; 673