1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Copyright (c) 2021 Rockchip Electronics Co., Ltd. 4 * 5 */ 6 7#include "rk3588.dtsi" 8#include "rk3588-evb.dtsi" 9#include "rk3588-rk806-dual.dtsi" 10 11/ { 12 es7202_sound_micarray: es7202-sound-micarray { 13 status = "okay"; 14 compatible = "simple-audio-card"; 15 simple-audio-card,format = "i2s"; 16 simple-audio-card,name = "rockchip,sound-micarray"; 17 simple-audio-card,mclk-fs = <256>; 18 simple-audio-card,dai-link@0 { 19 format = "pdm"; 20 cpu { 21 sound-dai = <&pdm0>; 22 }; 23 codec { 24 sound-dai = <&es7202>; 25 }; 26 }; 27 }; 28 29 es8388_sound: es8388-sound { 30 status = "okay"; 31 compatible = "rockchip,multicodecs-card"; 32 rockchip,card-name = "rockchip-es8388"; 33 hp-det-gpio = <&gpio1 RK_PA4 GPIO_ACTIVE_LOW>; 34 io-channels = <&saradc 3>; 35 io-channel-names = "adc-detect"; 36 keyup-threshold-microvolt = <1800000>; 37 poll-interval = <100>; 38 spk-con-gpio = <&gpio1 RK_PD3 GPIO_ACTIVE_HIGH>; 39 hp-con-gpio = <&gpio1 RK_PD2 GPIO_ACTIVE_HIGH>; 40 rockchip,format = "i2s"; 41 rockchip,mclk-fs = <256>; 42 rockchip,cpu = <&i2s0_8ch>; 43 rockchip,codec = <&es8388>; 44 rockchip,audio-routing = 45 "Headphone", "LOUT1", 46 "Headphone", "ROUT1", 47 "Speaker", "LOUT2", 48 "Speaker", "ROUT2", 49 "Headphone", "Headphone Power", 50 "Headphone", "Headphone Power", 51 "Speaker", "Speaker Power", 52 "Speaker", "Speaker Power", 53 "LINPUT1", "Main Mic", 54 "LINPUT2", "Main Mic", 55 "RINPUT1", "Headset Mic", 56 "RINPUT2", "Headset Mic"; 57 pinctrl-names = "default"; 58 pinctrl-0 = <&hp_det>; 59 play-pause-key { 60 label = "playpause"; 61 linux,code = <KEY_PLAYPAUSE>; 62 press-threshold-microvolt = <2000>; 63 }; 64 }; 65 66 fan: pwm-fan { 67 compatible = "pwm-fan"; 68 #cooling-cells = <2>; 69 pwms = <&pwm9 0 50000 0>; 70 cooling-levels = <0 50 100 150 200 255>; 71 rockchip,temp-trips = < 72 50000 1 73 55000 2 74 60000 3 75 65000 4 76 70000 5 77 >; 78 }; 79 80 pcie20_avdd0v85: pcie20-avdd0v85 { 81 compatible = "regulator-fixed"; 82 regulator-name = "pcie20_avdd0v85"; 83 regulator-boot-on; 84 regulator-always-on; 85 regulator-min-microvolt = <850000>; 86 regulator-max-microvolt = <850000>; 87 vin-supply = <&avdd_0v85_s0>; 88 }; 89 90 pcie20_avdd1v8: pcie20-avdd1v8 { 91 compatible = "regulator-fixed"; 92 regulator-name = "pcie20_avdd1v8"; 93 regulator-boot-on; 94 regulator-always-on; 95 regulator-min-microvolt = <1800000>; 96 regulator-max-microvolt = <1800000>; 97 vin-supply = <&avcc_1v8_s0>; 98 }; 99 100 pcie30_avdd0v75: pcie30-avdd0v75 { 101 compatible = "regulator-fixed"; 102 regulator-name = "pcie30_avdd0v75"; 103 regulator-boot-on; 104 regulator-always-on; 105 regulator-min-microvolt = <750000>; 106 regulator-max-microvolt = <750000>; 107 vin-supply = <&avdd_0v75_s0>; 108 }; 109 110 pcie30_avdd1v8: pcie30-avdd1v8 { 111 compatible = "regulator-fixed"; 112 regulator-name = "pcie30_avdd1v8"; 113 regulator-boot-on; 114 regulator-always-on; 115 regulator-min-microvolt = <1800000>; 116 regulator-max-microvolt = <1800000>; 117 vin-supply = <&avcc_1v8_s0>; 118 }; 119 120 sdio_pwrseq: sdio-pwrseq { 121 compatible = "mmc-pwrseq-simple"; 122 clocks = <&hym8563>; 123 clock-names = "ext_clock"; 124 pinctrl-names = "default"; 125 pinctrl-0 = <&wifi_enable_h>; 126 /* 127 * On the module itself this is one of these (depending 128 * on the actual card populated): 129 * - SDIO_RESET_L_WL_REG_ON 130 * - PDN (power down when low) 131 */ 132 post-power-on-delay-ms = <200>; 133 reset-gpios = <&gpio2 RK_PB6 GPIO_ACTIVE_LOW>; 134 }; 135 136 vcc3v3_lcd_n: vcc3v3-lcd0-n { 137 compatible = "regulator-fixed"; 138 regulator-name = "vcc3v3_lcd0_n"; 139 regulator-boot-on; 140 enable-active-high; 141 gpio = <&gpio1 RK_PC4 GPIO_ACTIVE_HIGH>; 142 vin-supply = <&vcc_1v8_s0>; 143 }; 144 145 vcc3v3_pcie30: vcc3v3-pcie30 { 146 compatible = "regulator-fixed"; 147 regulator-name = "vcc3v3_pcie30"; 148 regulator-min-microvolt = <3300000>; 149 regulator-max-microvolt = <3300000>; 150 enable-active-high; 151 gpios = <&gpio3 RK_PC4 GPIO_ACTIVE_HIGH>; 152 startup-delay-us = <5000>; 153 vin-supply = <&vcc12v_dcin>; 154 }; 155 156 vcc5v0_host: vcc5v0-host { 157 compatible = "regulator-fixed"; 158 regulator-name = "vcc5v0_host"; 159 regulator-boot-on; 160 regulator-always-on; 161 regulator-min-microvolt = <5000000>; 162 regulator-max-microvolt = <5000000>; 163 enable-active-high; 164 gpio = <&gpio4 RK_PA1 GPIO_ACTIVE_HIGH>; 165 vin-supply = <&vcc5v0_usb>; 166 pinctrl-names = "default"; 167 pinctrl-0 = <&vcc5v0_host_en>; 168 }; 169 170 wireless_bluetooth: wireless-bluetooth { 171 compatible = "bluetooth-platdata"; 172 clocks = <&hym8563>; 173 clock-names = "ext_clock"; 174 uart_rts_gpios = <&gpio4 RK_PC4 GPIO_ACTIVE_LOW>; 175 pinctrl-names = "default", "rts_gpio"; 176 pinctrl-0 = <&uart9m0_rtsn>, <&bt_gpio>; 177 pinctrl-1 = <&uart9_gpios>; 178 BT,reset_gpio = <&gpio2 RK_PC1 GPIO_ACTIVE_HIGH>; 179 BT,wake_gpio = <&gpio4 RK_PC6 GPIO_ACTIVE_HIGH>; 180 BT,wake_host_irq = <&gpio4 RK_PC2 GPIO_ACTIVE_HIGH>; 181 status = "okay"; 182 }; 183 184 wireless_wlan: wireless-wlan { 185 compatible = "wlan-platdata"; 186 wifi_chip_type = "ap6398s"; 187 pinctrl-names = "default"; 188 pinctrl-0 = <&wifi_host_wake_irq>; 189 WIFI,host_wake_irq = <&gpio2 RK_PB4 GPIO_ACTIVE_HIGH>; 190 WIFI,poweren_gpio = <&gpio2 RK_PB6 GPIO_ACTIVE_HIGH>; 191 status = "okay"; 192 }; 193}; 194 195&backlight { 196 pwms = <&pwm3 0 25000 0>; 197 status = "okay"; 198}; 199 200&combphy0_ps { 201 status = "okay"; 202}; 203 204&combphy1_ps { 205 status = "okay"; 206}; 207 208&combphy2_psu { 209 status = "okay"; 210}; 211 212&dp0 { 213 pinctrl-0 = <&dp0m2_pins>; 214 pinctrl-names = "default"; 215 status = "okay"; 216}; 217 218&dp0_in_vp2 { 219 status = "okay"; 220}; 221 222&dp0_sound { 223 status = "okay"; 224}; 225 226&dp1 { 227 pinctrl-0 = <&dp1m2_pins>; 228 pinctrl-names = "default"; 229 status = "okay"; 230}; 231 232&dp1_in_vp2 { 233 status = "okay"; 234}; 235 236/* 237 * mipi_dcphy1 needs to be enabled 238 * when dsi1 is enabled 239 */ 240&dsi1 { 241 status = "okay"; 242}; 243 244&dsi1_in_vp2 { 245 status = "disabled"; 246}; 247 248&dsi1_in_vp3 { 249 status = "okay"; 250}; 251 252&dsi1_panel { 253 power-supply = <&vcc3v3_lcd_n>; 254 255 reset-gpios = <&gpio4 RK_PA0 GPIO_ACTIVE_LOW>; 256 pinctrl-names = "default"; 257 pinctrl-0 = <&lcd_rst_gpio>; 258}; 259 260&gmac1 { 261 /* Use rgmii-rxid mode to disable rx delay inside Soc */ 262 phy-mode = "rgmii-rxid"; 263 clock_in_out = "output"; 264 265 snps,reset-gpio = <&gpio3 RK_PC6 GPIO_ACTIVE_LOW>; 266 snps,reset-active-low; 267 /* Reset time is 20ms, 100ms for rtl8211f */ 268 snps,reset-delays-us = <0 20000 100000>; 269 270 pinctrl-names = "default"; 271 pinctrl-0 = <&gmac1_miim 272 &gmac1_tx_bus2 273 &gmac1_rx_bus2 274 &gmac1_rgmii_clk 275 &gmac1_rgmii_bus>; 276 277 tx_delay = <0x45>; 278 /* rx_delay = <0x3f>; */ 279 280 phy-handle = <&rgmii_phy>; 281 status = "okay"; 282}; 283 284&hdmi0 { 285 enable-gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_HIGH>; 286 status = "okay"; 287}; 288 289&hdmi0_in_vp0 { 290 status = "okay"; 291}; 292 293&hdmi0_sound { 294 status = "okay"; 295}; 296 297&hdptxphy_hdmi0 { 298 status = "okay"; 299}; 300 301&i2c2 { 302 status = "okay"; 303 304 hym8563: hym8563@51 { 305 compatible = "haoyu,hym8563"; 306 reg = <0x51>; 307 #clock-cells = <0>; 308 clock-frequency = <32768>; 309 clock-output-names = "hym8563"; 310 pinctrl-names = "default"; 311 pinctrl-0 = <&hym8563_int>; 312 interrupt-parent = <&gpio0>; 313 interrupts = <RK_PC4 IRQ_TYPE_LEVEL_LOW>; 314 wakeup-source; 315 }; 316}; 317 318&i2c6 { 319 status = "okay"; 320 gt1x: gt1x@14 { 321 compatible = "goodix,gt1x"; 322 reg = <0x14>; 323 pinctrl-names = "default"; 324 pinctrl-0 = <&touch_gpio>; 325 goodix,rst-gpio = <&gpio0 RK_PD2 GPIO_ACTIVE_HIGH>; 326 goodix,irq-gpio = <&gpio0 RK_PD3 IRQ_TYPE_LEVEL_LOW>; 327 power-supply = <&vcc3v3_lcd_n>; 328 }; 329}; 330 331&i2c7 { 332 status = "okay"; 333 334 es8388: es8388@11 { 335 status = "okay"; 336 #sound-dai-cells = <0>; 337 compatible = "everest,es8388", "everest,es8323"; 338 reg = <0x11>; 339 clocks = <&mclkout_i2s0>; 340 clock-names = "mclk"; 341 assigned-clocks = <&mclkout_i2s0>; 342 assigned-clock-rates = <12288000>; 343 pinctrl-names = "default"; 344 pinctrl-0 = <&i2s0_mclk>; 345 }; 346 347 es7202: es7202@32 { 348 status = "okay"; 349 #sound-dai-cells = <0>; 350 compatible = "ES7202_PDM_ADC_1"; 351 power-supply = <&vcc_1v8_s0>; /* only 1v8 or 3v3, default is 3v3 */ 352 reg = <0x32>; 353 }; 354}; 355 356&i2s2_2ch { 357 pinctrl-0 = <&i2s2m0_sclk &i2s2m0_lrck &i2s2m0_sdi &i2s2m0_sdo>; 358 status = "disabled"; 359}; 360 361&i2s5_8ch { 362 status = "okay"; 363}; 364 365&mdio1 { 366 rgmii_phy: phy@1 { 367 compatible = "ethernet-phy-ieee802.3-c22"; 368 reg = <0x1>; 369 }; 370}; 371 372&mipi_dcphy1 { 373 status = "okay"; 374}; 375 376&pcie2x1l0 { 377 reset-gpios = <&gpio4 RK_PA5 GPIO_ACTIVE_HIGH>; 378 status = "okay"; 379}; 380 381&pcie30phy { 382 status = "okay"; 383}; 384 385&pcie3x4 { 386 reset-gpios = <&gpio4 RK_PB6 GPIO_ACTIVE_HIGH>; 387 vpcie3v3-supply = <&vcc3v3_pcie30>; 388 pinctrl-names = "default"; 389 pinctrl-0 = <&pcie30x4_clkreqn_m1>; 390 status = "okay"; 391}; 392 393&pdm0 { 394 status = "okay"; 395 pinctrl-names = "default"; 396 pinctrl-0 = <&pdm0m0_clk 397 &pdm0m0_sdi0>; 398}; 399 400&pinctrl { 401 headphone { 402 hp_det: hp-det { 403 rockchip,pins = <1 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; 404 }; 405 }; 406 407 hym8563 { 408 hym8563_int: hym8563-int { 409 rockchip,pins = <0 RK_PC4 RK_FUNC_GPIO &pcfg_pull_up>; 410 }; 411 }; 412 413 lcd { 414 lcd_rst_gpio: lcd-rst-gpio { 415 rockchip,pins = <4 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>; 416 }; 417 }; 418 419 pcie30x4 { 420 pcie30x4_clkreqn_m1: pcie30x4-clkreqn-m1 { 421 rockchip,pins = <4 RK_PB4 RK_FUNC_GPIO &pcfg_pull_down>; 422 }; 423 }; 424 425 sdio-pwrseq { 426 wifi_enable_h: wifi-enable-h { 427 rockchip,pins = <2 RK_PB6 RK_FUNC_GPIO &pcfg_pull_none>; 428 }; 429 }; 430 431 touch { 432 touch_gpio: touch-gpio { 433 rockchip,pins = 434 <0 RK_PD2 RK_FUNC_GPIO &pcfg_pull_up>, 435 <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up>; 436 }; 437 }; 438 439 usb { 440 vcc5v0_host_en: vcc5v0-host-en { 441 rockchip,pins = <4 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>; 442 }; 443 }; 444 445 wireless-bluetooth { 446 uart9_gpios: uart9-gpios { 447 rockchip,pins = <4 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>; 448 }; 449 450 bt_gpio: bt-gpio { 451 rockchip,pins = 452 <2 RK_PC1 RK_FUNC_GPIO &pcfg_pull_none>, 453 <4 RK_PC6 RK_FUNC_GPIO &pcfg_pull_up>, 454 <4 RK_PC2 RK_FUNC_GPIO &pcfg_pull_down>; 455 }; 456 }; 457 458 wireless-wlan { 459 wifi_host_wake_irq: wifi-host-wake-irq { 460 rockchip,pins = <2 RK_PB4 RK_FUNC_GPIO &pcfg_pull_down>; 461 }; 462 }; 463}; 464 465&pwm3 { 466 status = "okay"; 467 pinctrl-0 = <&pwm3m1_pins>; 468}; 469 470&pwm9 { 471 pinctrl-0 = <&pwm9m2_pins>; 472 status = "okay"; 473}; 474 475&route_dsi1 { 476 status = "okay"; 477 connect = <&vp3_out_dsi1>; 478}; 479 480&sata0 { 481 status = "okay"; 482}; 483 484&sdio { 485 max-frequency = <150000000>; 486 no-sd; 487 no-mmc; 488 bus-width = <4>; 489 disable-wp; 490 cap-sd-highspeed; 491 cap-sdio-irq; 492 keep-power-in-suspend; 493 mmc-pwrseq = <&sdio_pwrseq>; 494 non-removable; 495 pinctrl-names = "default"; 496 pinctrl-0 = <&sdiom0_pins>; 497 sd-uhs-sdr104; 498 status = "okay"; 499}; 500 501&sdmmc { 502 status = "okay"; 503 vmmc-supply = <&vcc_3v3_sd_s0>; 504}; 505 506&spdif_tx2 { 507 status = "okay"; 508}; 509 510&u2phy0_otg { 511 phy-supply = <&vcc5v0_host>; 512}; 513 514&u2phy1_otg { 515 phy-supply = <&vcc5v0_host>; 516}; 517 518&u2phy2_host { 519 phy-supply = <&vcc5v0_host>; 520}; 521 522&u2phy3_host { 523 phy-supply = <&vcc5v0_host>; 524}; 525 526&usbdp_phy0 { 527 rockchip,dp-lane-mux = <2 3>; 528}; 529 530&usbdp_phy1 { 531 rockchip,dp-lane-mux = <2 3>; 532}; 533 534&usbdrd_dwc3_0 { 535 dr_mode = "otg"; 536 extcon = <&u2phy0>; 537 status = "okay"; 538}; 539 540&uart9 { 541 status = "okay"; 542 pinctrl-names = "default"; 543 pinctrl-0 = <&uart9m0_xfer &uart9m0_ctsn>; 544}; 545 546&vcc3v3_lcd_n { 547 gpio = <&gpio1 RK_PC4 GPIO_ACTIVE_HIGH>; 548 enable-active-high; 549}; 550