1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Copyright (c) 2023 Rockchip Electronics Co., Ltd. 4 * 5 */ 6 7#include "dt-bindings/usb/pd.h" 8#include "rk3588m.dtsi" 9#include "rk3588-vehicle-v20.dtsi" 10#include "rk3588-rk806-dual.dtsi" 11/ { 12 pcie20_avdd0v85: pcie20-avdd0v85 { 13 compatible = "regulator-fixed"; 14 regulator-name = "pcie20_avdd0v85"; 15 regulator-boot-on; 16 regulator-always-on; 17 regulator-min-microvolt = <850000>; 18 regulator-max-microvolt = <850000>; 19 vin-supply = <&vdd_0v85_s0>; 20 }; 21 22 pcie20_avdd1v8: pcie20-avdd1v8 { 23 compatible = "regulator-fixed"; 24 regulator-name = "pcie20_avdd1v8"; 25 regulator-boot-on; 26 regulator-always-on; 27 regulator-min-microvolt = <1800000>; 28 regulator-max-microvolt = <1800000>; 29 vin-supply = <&avcc_1v8_s0>; 30 }; 31 32 pcie30_avdd0v75: pcie30-avdd0v75 { 33 compatible = "regulator-fixed"; 34 regulator-name = "pcie30_avdd0v75"; 35 regulator-boot-on; 36 regulator-always-on; 37 regulator-min-microvolt = <750000>; 38 regulator-max-microvolt = <750000>; 39 vin-supply = <&avdd_0v75_s0>; 40 }; 41 42 pcie30_avdd1v8: pcie30-avdd1v8 { 43 compatible = "regulator-fixed"; 44 regulator-name = "pcie30_avdd1v8"; 45 regulator-boot-on; 46 regulator-always-on; 47 regulator-min-microvolt = <1800000>; 48 regulator-max-microvolt = <1800000>; 49 vin-supply = <&avcc_1v8_s0>; 50 }; 51 52 sdio_pwrseq: sdio-pwrseq { 53 compatible = "mmc-pwrseq-simple"; 54 clocks = <&hym8563>; 55 clock-names = "ext_clock"; 56 pinctrl-names = "default"; 57 pinctrl-0 = <&wifi_enable_h>; 58 /* 59 * On the module itself this is one of these (depending 60 * on the actual card populated): 61 * - SDIO_RESET_L_WL_REG_ON 62 * - PDN (power down when low) 63 */ 64 post-power-on-delay-ms = <10>; 65 reset-gpios = <&gpio1 RK_PB3 GPIO_ACTIVE_LOW>; 66 status = "okay"; 67 }; 68 69 fan: pwm-fan { 70 compatible = "pwm-fan"; 71 #cooling-cells = <2>; 72 pwms = <&pwm8 0 50000 0>; 73 cooling-levels = <0 50 100 150 200 255>; 74 rockchip,temp-trips = < 75 50000 1 76 55000 2 77 60000 3 78 65000 4 79 70000 5 80 >; 81 }; 82 83 vcc5v0_host: vcc5v0-host { 84 compatible = "regulator-fixed"; 85 regulator-name = "vcc5v0_host"; 86 regulator-boot-on; 87 regulator-always-on; 88 regulator-min-microvolt = <5000000>; 89 regulator-max-microvolt = <5000000>; 90 enable-active-high; 91 gpio = <&gpio4 RK_PA3 GPIO_ACTIVE_HIGH>; 92 vin-supply = <&vcc5v0_usb>; 93 pinctrl-names = "default"; 94 pinctrl-0 = <&vcc5v0_host_en>; 95 }; 96 97 wireless_bluetooth: wireless-bluetooth { 98 compatible = "bluetooth-platdata"; 99 clocks = <&hym8563>; 100 clock-names = "ext_clock"; 101 uart_rts_gpios = <&gpio4 RK_PA0 GPIO_ACTIVE_LOW>; 102 pinctrl-names = "default", "rts_gpio"; 103 pinctrl-0 = <&uart9m1_rtsn>, <&bt_reset_gpio>, <&bt_wake_gpio>, <&bt_irq_gpio>; 104 pinctrl-1 = <&uart9_gpios>; 105 BT,reset_gpio = <&gpio1 RK_PB5 GPIO_ACTIVE_HIGH>; 106 BT,wake_gpio = <&gpio0 RK_PC7 GPIO_ACTIVE_HIGH>; 107 BT,wake_host_irq = <&gpio0 RK_PC6 GPIO_ACTIVE_HIGH>; 108 status = "okay"; 109 }; 110 111 wireless_wlan: wireless-wlan { 112 compatible = "wlan-platdata"; 113 wifi_chip_type = "ap6398s"; 114 pinctrl-names = "default"; 115 pinctrl-0 = <&wifi_host_wake_irq>; 116 WIFI,host_wake_irq = <&gpio0 RK_PB7 GPIO_ACTIVE_HIGH>; 117 WIFI,poweren_gpio = <&gpio1 RK_PB3 GPIO_ACTIVE_HIGH>; 118 status = "okay"; 119 }; 120 121 dummy_codec: dummy-codec { 122 status = "okay"; 123 compatible = "rockchip,dummy-codec"; 124 #sound-dai-cells = <0>; 125 pinctrl-names = "default"; 126 pinctrl-0 = <&rk3308_reset>; 127 }; 128 129 car_rk3308_sound: car-rk3308-sound { 130 status = "okay"; 131 compatible = "simple-audio-card"; 132 simple-audio-card,name = "rockchip,car-rk3308-sound"; 133 simple-audio-card,format = "i2s"; 134 simple-audio-card,mclk-fs = <256>; 135 simple-audio-card,bitclock-master = <&codec_master>; 136 simple-audio-card,frame-master = <&codec_master>; 137 simple-audio-card,cpu { 138 sound-dai = <&i2s0_8ch>; 139 }; 140 codec_master: simple-audio-card,codec { 141 sound-dai = <&dummy_codec>; 142 }; 143 }; 144}; 145 146&combphy0_ps { 147 status = "okay"; 148}; 149 150&combphy1_ps { 151 status = "okay"; 152}; 153 154&combphy2_psu { 155 status = "okay"; 156}; 157 158&gmac0 { 159 /* Use rgmii-rxid mode to disable rx delay inside Soc */ 160 phy-mode = "rgmii-rxid"; 161 clock_in_out = "output"; 162 snps,reset-gpio = <&gpio2 RK_PC5 GPIO_ACTIVE_LOW>; 163 snps,reset-active-low; 164 /* Reset time is 20ms, 100ms for rtl8211f */ 165 snps,reset-delays-us = <0 20000 100000>; 166 pinctrl-names = "default"; 167 pinctrl-0 = <&gmac0_miim 168 &gmac0_tx_bus2 169 &gmac0_rx_bus2 170 &gmac0_rgmii_clk 171 &gmac0_rgmii_bus 172 &phydisb>; 173 tx_delay = <0x43>; 174 //rx_delay = <0x3f>; 175 phy-handle = <&rgmii_phy>; 176 status = "okay"; 177}; 178 179&i2c4 { 180 status = "okay"; 181 pinctrl-0 = <&i2c4m2_xfer>; 182 hym8563: hym8563@51 { 183 compatible = "haoyu,hym8563"; 184 reg = <0x51>; 185 #clock-cells = <0>; 186 clock-frequency = <32768>; 187 clock-output-names = "hym8563"; 188 pinctrl-names = "default"; 189 pinctrl-0 = <&hym8563_int>; 190 interrupt-parent = <&gpio0>; 191 interrupts = <RK_PC3 IRQ_TYPE_LEVEL_LOW>; 192 wakeup-source; 193 }; 194 195}; 196 197&i2s0_8ch { 198 status = "okay"; 199 pinctrl-names = "default"; 200 pinctrl-0 = <&i2s0_lrck 201 &i2s0_sclk 202 &i2s0_sdi0 203 &i2s0_sdi1 204 &i2s0_sdo0 205 &i2s0_sdo1 206 &i2s0_sdo2 207 &i2s0_sdo3>; 208}; 209 210&mdio0 { 211 rgmii_phy: phy@1 { 212 compatible = "ethernet-phy-ieee802.3-c22"; 213 reg = <0x1>; 214 }; 215}; 216 217&pcie2x1l0 { 218 reset-gpios = <&gpio1 RK_PB4 GPIO_ACTIVE_HIGH>; 219 rockchip,skip-scan-in-resume; 220 pinctrl-names = "default"; 221 pinctrl-0 = <&wifi_enable_h>; 222 status = "disabled"; 223}; 224 225&pcie2x1l2 { 226 reset-gpios = <&gpio1 RK_PB4 GPIO_ACTIVE_HIGH>; 227 status = "disabled"; 228}; 229 230&pinctrl { 231 gmac0 { 232 phydisb: phydisb { 233 rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_output_high>; 234 }; 235 }; 236 237 hym8563 { 238 hym8563_int: hym8563-int { 239 rockchip,pins = <0 RK_PC3 RK_FUNC_GPIO &pcfg_pull_up>; 240 }; 241 }; 242 243 sdio-pwrseq { 244 wifi_enable_h: wifi-enable-h { 245 rockchip,pins = <1 RK_PB3 RK_FUNC_GPIO &pcfg_pull_up>; 246 }; 247 }; 248 249 usb { 250 vcc5v0_host_en: vcc5v0-host-en { 251 rockchip,pins = <4 RK_PA3 RK_FUNC_GPIO &pcfg_pull_none>; 252 }; 253 }; 254 255 256 wireless-bluetooth { 257 uart9_gpios: uart9-gpios { 258 rockchip,pins = <4 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>; 259 }; 260 261 bt_reset_gpio: bt-reset-gpio { 262 rockchip,pins = <1 RK_PB5 RK_FUNC_GPIO &pcfg_pull_none>; 263 }; 264 265 bt_wake_gpio: bt-wake-gpio { 266 rockchip,pins = <0 RK_PC7 RK_FUNC_GPIO &pcfg_pull_none>; 267 }; 268 269 bt_irq_gpio: bt-irq-gpio { 270 rockchip,pins = <0 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>; 271 }; 272 }; 273 274 wireless-wlan { 275 wifi_host_wake_irq: wifi-host-wake-irq { 276 rockchip,pins = <0 RK_PB7 RK_FUNC_GPIO &pcfg_pull_down>; 277 }; 278 }; 279 280 rk3308 { 281 rk3308_reset: rk3308-reset { 282 rockchip,pins = <4 RK_PC6 RK_FUNC_GPIO &pcfg_pull_up>; 283 }; 284 }; 285}; 286 287&pwm0 { 288 pinctrl-0 = <&pwm0m2_pins>; 289 status = "okay"; 290}; 291 292&pwm1 { 293 pinctrl-0 = <&pwm1m2_pins>; 294 status = "okay"; 295}; 296 297&pwm8 { 298 pinctrl-0 = <&pwm8m1_pins>; 299 status = "okay"; 300}; 301 302&sata0 { 303 status = "okay"; 304}; 305 306&sdio { 307 max-frequency = <150000000>; 308 no-sd; 309 no-mmc; 310 bus-width = <4>; 311 disable-wp; 312 cap-sd-highspeed; 313 cap-sdio-irq; 314 keep-power-in-suspend; 315 mmc-pwrseq = <&sdio_pwrseq>; 316 non-removable; 317 pinctrl-names = "default"; 318 pinctrl-0 = <&sdiom1_pins>; 319 status = "okay"; 320}; 321 322&sdmmc { 323 status = "disabled"; 324}; 325 326&uart9 { 327 status = "okay"; 328 pinctrl-names = "default"; 329 pinctrl-0 = <&uart9m1_xfer &uart9m1_ctsn>; 330}; 331 332&u2phy1_otg { 333 phy-supply = <&vcc5v0_host>; 334}; 335 336&u2phy2_host { 337 phy-supply = <&vcc5v0_host>; 338}; 339 340&u2phy3_host { 341 phy-supply = <&vcc5v0_host>; 342}; 343 344&usbdp_phy0 { 345 rockchip,dp-lane-mux = <2 3>; 346 status = "okay"; 347}; 348 349&usbdp_phy0_dp { 350 status = "okay"; 351}; 352 353&usbdp_phy0_u3 { 354 status = "okay"; 355}; 356 357&usbdp_phy1 { 358 rockchip,dp-lane-mux = <3 2 1 0>; 359 status = "okay"; 360}; 361 362&usbdp_phy1_dp { 363 status = "okay"; 364}; 365 366&usbdp_phy1_u3 { 367 maximum-speed = "high-speed"; 368 status = "okay"; 369}; 370 371&usbdrd_dwc3_0 { 372 dr_mode = "peripheral"; 373 maximum-speed = "high-speed"; 374 extcon = <&u2phy0>; 375 status = "okay"; 376}; 377 378&usbdrd_dwc3_1 { 379 dr_mode = "host"; 380 maximum-speed = "high-speed"; 381 snps,dis_u2_susphy_quirk; 382 status = "okay"; 383}; 384