Home
last modified time | relevance | path

Searched refs:pclk_div (Results 1 – 21 of 21) sorted by relevance

/rk3399_rockchip-uboot/drivers/clk/rockchip/
H A Dclk_rk3036.c106 u32 pclk_div; in rkclk_init() local
127 pclk_div = APLL_HZ / CORE_PERI_HZ - 1; in rkclk_init()
128 assert((pclk_div + 1) * CORE_PERI_HZ <= APLL_HZ && pclk_div < 0xf); in rkclk_init()
138 pclk_div << CORE_PERI_DIV_SHIFT); in rkclk_init()
147 pclk_div = BUS_ACLK_HZ / BUS_PCLK_HZ - 1; in rkclk_init()
148 assert((pclk_div + 1) * BUS_PCLK_HZ <= BUS_ACLK_HZ && pclk_div <= 0x7); in rkclk_init()
160 pclk_div << BUS_PCLK_DIV_SHIFT | in rkclk_init()
174 pclk_div = ilog2(PERI_ACLK_HZ / PERI_PCLK_HZ); in rkclk_init()
175 assert((1 << pclk_div) * PERI_PCLK_HZ <= in rkclk_init()
176 PERI_ACLK_HZ && pclk_div < 0x8); in rkclk_init()
[all …]
H A Dclk_rk3066.c389 u32 aclk_div, hclk_div, pclk_div, h2p_div; in rkclk_init() local
424 pclk_div = ilog2(CPU_ACLK_HZ / CPU_PCLK_HZ); in rkclk_init()
425 assert((1 << pclk_div) * CPU_PCLK_HZ <= CPU_ACLK_HZ && pclk_div < 0x4); in rkclk_init()
427 assert((1 << h2p_div) * CPU_H2P_HZ <= CPU_HCLK_HZ && pclk_div < 0x3); in rkclk_init()
434 pclk_div << CPU_PCLK_DIV_SHIFT | in rkclk_init()
448 pclk_div = ilog2(PERI_ACLK_HZ / PERI_PCLK_HZ); in rkclk_init()
449 assert((1 << pclk_div) * PERI_PCLK_HZ <= in rkclk_init()
450 PERI_ACLK_HZ && (pclk_div < 0x4)); in rkclk_init()
457 pclk_div << PERI_PCLK_DIV_SHIFT | in rkclk_init()
H A Dclk_rk3188.c419 u32 aclk_div, hclk_div, pclk_div, h2p_div; in rkclk_init() local
454 pclk_div = ilog2(CPU_ACLK_HZ / CPU_PCLK_HZ); in rkclk_init()
455 assert((1 << pclk_div) * CPU_PCLK_HZ <= CPU_ACLK_HZ && pclk_div < 0x4); in rkclk_init()
457 assert((1 << h2p_div) * CPU_H2P_HZ <= CPU_HCLK_HZ && pclk_div < 0x3); in rkclk_init()
464 pclk_div << CPU_PCLK_DIV_SHIFT | in rkclk_init()
478 pclk_div = ilog2(PERI_ACLK_HZ / PERI_PCLK_HZ); in rkclk_init()
479 assert((1 << pclk_div) * PERI_PCLK_HZ <= in rkclk_init()
480 PERI_ACLK_HZ && (pclk_div < 0x4)); in rkclk_init()
487 pclk_div << PERI_PCLK_DIV_SHIFT | in rkclk_init()
H A Dclk_rk3399.c1402 u32 pclk_div; in rkclk_init() local
1429 pclk_div = PERIHP_ACLK_HZ / PERIHP_PCLK_HZ - 1; in rkclk_init()
1430 assert((pclk_div + 1) * PERIHP_PCLK_HZ <= in rkclk_init()
1431 PERIHP_ACLK_HZ && (pclk_div <= 0x7)); in rkclk_init()
1436 pclk_div << PCLK_PERIHP_DIV_CON_SHIFT | in rkclk_init()
1448 pclk_div = PERILP0_ACLK_HZ / PERILP0_PCLK_HZ - 1; in rkclk_init()
1449 assert((pclk_div + 1) * PERILP0_PCLK_HZ <= in rkclk_init()
1450 PERILP0_ACLK_HZ && (pclk_div <= 0x7)); in rkclk_init()
1455 pclk_div << PCLK_PERILP0_DIV_CON_SHIFT | in rkclk_init()
1465 pclk_div = PERILP1_HCLK_HZ / PERILP1_PCLK_HZ - 1; in rkclk_init()
[all …]
H A Dclk_rk3288.c591 u32 pclk_div; in rkclk_init() local
619 pclk_div = PD_BUS_ACLK_HZ / PD_BUS_PCLK_HZ - 1; in rkclk_init()
620 assert((pclk_div + 1) * PD_BUS_PCLK_HZ <= in rkclk_init()
621 PD_BUS_ACLK_HZ && pclk_div <= 0x7); in rkclk_init()
626 pclk_div << PD_BUS_PCLK_DIV_SHIFT | in rkclk_init()
642 pclk_div = ilog2(PERI_ACLK_HZ / PERI_PCLK_HZ); in rkclk_init()
643 assert((1 << pclk_div) * PERI_PCLK_HZ <= in rkclk_init()
644 PERI_ACLK_HZ && (pclk_div <= 0x3)); in rkclk_init()
650 pclk_div << PERI_PCLK_DIV_SHIFT | in rkclk_init()
H A Dclk_rk3128.c54 .pclk_div = _pclk_div, \
121 rate->pclk_div << CORE_DBG_DIV_SHIFT); in rk3128_armclk_set_clk()
126 rate->pclk_div << CORE_DBG_DIV_SHIFT); in rk3128_armclk_set_clk()
H A Dclk_rk3568.c27 .pclk_div = _pclk_div, \
589 rate->pclk_div << GICCLK_CORE_DIV_SHIFT | in rk3568_armclk_set_clk()
590 rate->pclk_div << ATCLK_CORE_DIV_SHIFT); in rk3568_armclk_set_clk()
594 rate->pclk_div << PCLK_CORE_PRE_DIV_SHIFT | in rk3568_armclk_set_clk()
595 rate->pclk_div << PERIPHCLK_CORE_PRE_DIV_SHIFT); in rk3568_armclk_set_clk()
602 rate->pclk_div << GICCLK_CORE_DIV_SHIFT | in rk3568_armclk_set_clk()
603 rate->pclk_div << ATCLK_CORE_DIV_SHIFT); in rk3568_armclk_set_clk()
607 rate->pclk_div << PCLK_CORE_PRE_DIV_SHIFT | in rk3568_armclk_set_clk()
608 rate->pclk_div << PERIPHCLK_CORE_PRE_DIV_SHIFT); in rk3568_armclk_set_clk()
H A Dclk_rk322x.c55 .pclk_div = _pclk_div, \
122 rate->pclk_div << CORE_PERI_DIV_SHIFT); in rk322x_armclk_set_clk()
127 rate->pclk_div << CORE_PERI_DIV_SHIFT); in rk322x_armclk_set_clk()
H A Dclk_rk3308.c41 .pclk_div = _pclk_div, \
164 rate->pclk_div << CORE_DBG_DIV_SHIFT | in rk3308_armclk_set_clk()
172 rate->pclk_div << CORE_DBG_DIV_SHIFT | in rk3308_armclk_set_clk()
H A Dclk_rk3328.c78 .pclk_div = _pclk_div, \
148 rate->pclk_div << CORE_DBG_DIV_SHIFT); in rk3328_armclk_set_clk()
153 rate->pclk_div << CORE_DBG_DIV_SHIFT); in rk3328_armclk_set_clk()
H A Dclk_rk3506.c79 .pclk_div = _pclk_dbg, \
228 rate->pclk_div << PCLK_CORE_DIV_SHIFT); in rk3506_armclk_set_rate()
264 rate->pclk_div << PCLK_CORE_DIV_SHIFT); in rk3506_armclk_set_rate()
H A Dclk_rk3368.c94 .pclk_div = _pclk_div, \
912 rate->pclk_div << CORE_DBG_DIV_SHIFT); in rk3368_armclk_set_clk()
921 rate->pclk_div << CORE_DBG_DIV_SHIFT); in rk3368_armclk_set_clk()
H A Dclk_rk1808.c27 .pclk_div = _pclk_div, \
887 rate->pclk_div << CORE_DBG_DIV_SHIFT | in rk1808_armclk_set_clk()
895 rate->pclk_div << CORE_DBG_DIV_SHIFT | in rk1808_armclk_set_clk()
H A Dclk_rk3562.c65 .pclk_div = _pclk_dbg, \
176 rate->pclk_div << PCLK_DBG_PRE_DIV_SHIFT); in rk3562_armclk_set_rate()
185 rate->pclk_div << PCLK_DBG_PRE_DIV_SHIFT); in rk3562_armclk_set_rate()
191 rate->pclk_div << PCLK_DBG_PRE_DIV_SHIFT); in rk3562_armclk_set_rate()
H A Dclk_rk3528.c86 .pclk_div = (_pclk_dbg), \
217 rate->pclk_div << RK3528_DIV_PCLK_DBG_SHIFT); in rk3528_armclk_set_clk()
223 rate->pclk_div << RK3528_DIV_PCLK_DBG_SHIFT); in rk3528_armclk_set_clk()
H A Dclk_px30.c48 .pclk_div = _pclk_div, \
1272 rate->pclk_div << CORE_DBG_DIV_SHIFT | in px30_armclk_set_clk()
1280 rate->pclk_div << CORE_DBG_DIV_SHIFT | in px30_armclk_set_clk()
H A Dclk_rv1126.c27 .pclk_div = _pclk_div, \
581 rate->pclk_div << CORE_DBG_DIV_SHIFT | in rv1126_armclk_set_clk()
586 rate->pclk_div << CORE_DBG_DIV_SHIFT | in rv1126_armclk_set_clk()
/rk3399_rockchip-uboot/arch/arm/cpu/arm920t/ep93xx/
H A Dspeed.c76 const uint8_t pclk_div = in get_PCLK() local
78 const ulong pclk_rate = get_HCLK() / pclk_div; in get_PCLK()
/rk3399_rockchip-uboot/arch/arm/include/asm/arch-rockchip/
H A Dclock.h133 unsigned int pclk_div; member
H A Dcru_rv1126.h152 unsigned int pclk_div; member
H A Dcru_px30.h128 unsigned int pclk_div; member