| #
4ca69a29 |
| 26-Jul-2024 |
David Wu <david.wu@rock-chips.com> |
net: gmac_rockchip: Add support for RK3576
Signed-off-by: David Wu <david.wu@rock-chips.com>
Change-Id: I762fbc304807ad3e59fac39da37591762578ec1d
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| #
56f7d184 |
| 01-Aug-2022 |
Joseph Chen <chenjh@rock-chips.com> |
rockchip: Add rk3562 support
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I4cb19c26f45540aec565bd9bb94da520133893fa
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| #
c6f7c1a3 |
| 18-Aug-2022 |
Joseph Chen <chenjh@rock-chips.com> |
rockchip: Add rk3528 support
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
Change-Id: I0683071e9bdde1cb5aa4c3df40750f33a3faa85b
|
| #
7d793375 |
| 02-Mar-2022 |
Elaine Zhang <zhangqing@rock-chips.com> |
clk: rockchip: rv1106: support rockchip image tiny
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Change-Id: I59bc654ea6ebd3a9c7e847b99433c713b850ed6e
|
| #
86b248b4 |
| 05-Dec-2021 |
Damon Ding <damon.ding@rock-chips.com> |
rockchip: rk3588: add the vop related grf syscon
Signed-off-by: Damon Ding <damon.ding@rock-chips.com>
Change-Id: I2fc73052602898dcdcf9ebda7c7f7d476d3f7c62
|
| #
e1cfe1c9 |
| 22-Jun-2021 |
Joseph Chen <chenjh@rock-chips.com> |
rockchip: Add rk3588 core architecture
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I21b73a0f53c517ac0437c0ed5d32fcc6aa873ee0
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| #
a962a5fd |
| 19-May-2021 |
Elaine Zhang <zhangqing@rock-chips.com> |
rockchip: clk: pll: add pll_rk3588 type for RK3588 Soc
Change-Id: I8b38afb9f51847543da4df6305996dc5845d7876
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
|
| #
60410d28 |
| 15-Apr-2021 |
Elaine Zhang <zhangqing@rock-chips.com> |
rockchip: rk3568: add set_armclk_rate
Support ARM high frequency for fast boot.
Change-Id: If22946894c456853815af2c72996f63cfa350ec5
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
|
| #
2f0a72b1 |
| 20-Jul-2018 |
Elaine Zhang <zhangqing@rock-chips.com> |
rockchip: clk: pll: add common pll setting funcs
Change-Id: I99887338a4f84aead905938eee066b460c4c1b9f
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
|
| #
3d555d75 |
| 10-Oct-2017 |
Elaine Zhang <zhangqing@rock-chips.com> |
rockchip: clk: add device_bind_driver_to_node for reset driver
all rockchip socs add device_bind_driver_to_node,
to bound device rockchip reset to clock-controller.
Change-Id: I03c2a798d211fb4181d5
rockchip: clk: add device_bind_driver_to_node for reset driver
all rockchip socs add device_bind_driver_to_node,
to bound device rockchip reset to clock-controller.
Change-Id: I03c2a798d211fb4181d5fc0fd6db8609c6db04d2
Signed-off-by: Elaine Zhang <zhangqing@rock-chips.com>
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
show more ...
|
| #
116397d6 |
| 25-Oct-2017 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: sysreset: merge into one common driver
Use a common driver for all Rockchip SOC instead of one for each SoC.
Use driver_data for reg offset.
Change-Id: Ie4a246e53052db47aab9cb3b0105d44a48
rockchip: sysreset: merge into one common driver
Use a common driver for all Rockchip SOC instead of one for each SoC.
Use driver_data for reg offset.
Change-Id: Ie4a246e53052db47aab9cb3b0105d44a484db484
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
show more ...
|
| #
be82169b |
| 25-Sep-2017 |
Wu Liang feng <wulf@rock-chips.com> |
rockchip: rv1108: syscon: add support for usbgrf
usbgrf is a independent module like grf which contain
usb phy control registers.
Change-Id: I5676cab33bcdd66b4033c9514b82cac26b6ce3e5
Signed-off-by:
rockchip: rv1108: syscon: add support for usbgrf
usbgrf is a independent module like grf which contain
usb phy control registers.
Change-Id: I5676cab33bcdd66b4033c9514b82cac26b6ce3e5
Signed-off-by: Wu Liang feng <wulf@rock-chips.com>
show more ...
|
| #
d43ef73b |
| 11-Jul-2017 |
Tom Rini <trini@konsulko.com> |
Merge branch 'master' of git://git.denx.de/u-boot-rockchip
|
| #
168eef7a |
| 23-Jun-2017 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: rk322x: add basic soc support
Enable soc support for SPL and U-boot skeleton.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma
rockchip: rk322x: add basic soc support
Enable soc support for SPL and U-boot skeleton.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Philipp Tomsich <philipp.tomsich@theobroma-systems.com>
show more ...
|
| #
f9515756 |
| 17-Mar-2017 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-rockchip
This includes support for rk3188 from Heiko Stübner and and rk3328 from
Kever Yang. Also included is SPL support for rk3399 and a fix for
rk3288 to get it bo
Merge git://git.denx.de/u-boot-rockchip
This includes support for rk3188 from Heiko Stübner and and rk3328 from
Kever Yang. Also included is SPL support for rk3399 and a fix for
rk3288 to get it booting again (spl_early_init()).
show more ...
|
| #
2adb9812 |
| 13-Feb-2017 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: arm64: rk3399: syscon addition for rk3399
rk3399 has different syscon registers which may used in spl,
add to support rk3399 spl.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Rev
rockchip: arm64: rk3399: syscon addition for rk3399
rk3399 has different syscon registers which may used in spl,
add to support rk3399 spl.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Added rockchip tag:
Signed-off-by: Simon Glass <sjg@chromium.org>
show more ...
|
| #
5ae2fd97 |
| 13-Feb-2017 |
Kever Yang <kever.yang@rock-chips.com> |
rockchip: clk: rk3399: update driver for spl
Add ddr clock setting, add rockchip_get_pmucru API,
and enable of-platdata support.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: S
rockchip: clk: rk3399: update driver for spl
Add ddr clock setting, add rockchip_get_pmucru API,
and enable of-platdata support.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Reviewed-by: Simon Glass <sjg@chromium.org>
Added rockchip tag and fix pmuclk_init() build warning:
Signed-off-by: Simon Glass <sjg@chromium.org>
show more ...
|
| #
201c9d88 |
| 22-Sep-2016 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-rockchip
|
| #
c55e30eb |
| 16-Aug-2016 |
Kever Yang <kever.yang@rock-chips.com> |
rk3399: syscon: add support for pmugrf
pmugrf is a module like grf which contain some of the iomux registers
and other registers.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Sim
rk3399: syscon: add support for pmugrf
pmugrf is a module like grf which contain some of the iomux registers
and other registers.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Acked-by: Simon Glass <sjg@chromium.org>
show more ...
|
| #
a617c5d3 |
| 17-Jul-2016 |
Simon Glass <sjg@chromium.org> |
rockchip: Add a way to obtain the main clock device
On Rockchip SoCs we typically have a main clock device that uses the Soc
clock driver. There is also a fixed clock for the oscillator. Add a funct
rockchip: Add a way to obtain the main clock device
On Rockchip SoCs we typically have a main clock device that uses the Soc
clock driver. There is also a fixed clock for the oscillator. Add a function
to obtain the core clock.
Signed-off-by: Simon Glass <sjg@chromium.org>
show more ...
|
| #
b339b5db |
| 15-Jul-2016 |
Heiko Stübner <heiko@sntech.de> |
cosmetic: rockchip: rk3288: rename rkclk_configure_cpu
The function is very specific to the rk3288 in its arguments
referencing the rk3288 cru and grf and every other rockchip soc
has differing cru
cosmetic: rockchip: rk3288: rename rkclk_configure_cpu
The function is very specific to the rk3288 in its arguments
referencing the rk3288 cru and grf and every other rockchip soc
has differing cru and grf registers. So make that function naming
explicit.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Acked-by: Simon Glass <sjg@chromium.org>
show more ...
|
| #
09849f4a |
| 20-Jun-2016 |
Tom Rini <trini@konsulko.com> |
Merge git://git.denx.de/u-boot-dm
|
| #
135aa950 |
| 17-Jun-2016 |
Stephen Warren <swarren@nvidia.com> |
clk: convert API to match reset/mailbox style
The following changes are made to the clock API:
* The concept of "clocks" and "peripheral clocks" are unified; each clock
provider now implements a s
clk: convert API to match reset/mailbox style
The following changes are made to the clock API:
* The concept of "clocks" and "peripheral clocks" are unified; each clock
provider now implements a single set of clocks. This provides a simpler
conceptual interface to clients, and better aligns with device tree
clock bindings.
* Clocks are now identified with a single "struct clk", rather than
requiring clients to store the clock provider device and clock identity
values separately. For simple clock consumers, this isolates clients
from internal details of the clock API.
* clk.h is split so it only contains the client/consumer API, whereas
clk-uclass.h contains the provider API. This aligns with the recently
added reset and mailbox APIs.
* clk_ops .of_xlate(), .request(), and .free() are added so providers
can customize these operations if needed. This also aligns with the
recently added reset and mailbox APIs.
* clk_disable() is added.
* All users of the current clock APIs are updated.
* Sandbox clock tests are updated to exercise clock lookup via DT, and
clock enable/disable.
* rkclk_get_clk() is removed and replaced with standard APIs.
Buildman shows no clock-related errors for any board for which buildman
can download a toolchain.
test/py passes for sandbox (which invokes the dm clk test amongst
others).
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Simon Glass <sjg@chromium.org>
show more ...
|
| #
dae594f2 |
| 22-Jan-2016 |
Simon Glass <sjg@chromium.org> |
rockchip: spl: Support full-speed CPU in SPL
Add a feature which speeds up the CPU to full speed in SPL to minimise
boot time. This is only supported for certain boards (at present only
jerry).
Sig
rockchip: spl: Support full-speed CPU in SPL
Add a feature which speeds up the CPU to full speed in SPL to minimise
boot time. This is only supported for certain boards (at present only
jerry).
Signed-off-by: Simon Glass <sjg@chromium.org>
show more ...
|
| #
64b7faa7 |
| 22-Jan-2016 |
Simon Glass <sjg@chromium.org> |
rockchip: clock: Add a function to find a clock by ID
The current approach of using uclass_get_device() is error-prone. Another
clock (for example a fixed-clock) may cause it to break. Add a functio
rockchip: clock: Add a function to find a clock by ID
The current approach of using uclass_get_device() is error-prone. Another
clock (for example a fixed-clock) may cause it to break. Add a function that
does a proper search.
Signed-off-by: Simon Glass <sjg@chromium.org>
show more ...
|