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Searched refs:clk_id (Results 1 – 25 of 34) sorted by relevance

12

/rk3399_rockchip-uboot/drivers/clk/rockchip/
H A Dclk_rv1103b.c62 static ulong rv1103b_peri_get_clk(struct rv1103b_clk_priv *priv, ulong clk_id) in rv1103b_peri_get_clk() argument
67 switch (clk_id) { in rv1103b_peri_get_clk()
114 ulong clk_id, ulong rate) in rv1103b_peri_set_clk() argument
119 switch (clk_id) { in rv1103b_peri_set_clk()
168 return rv1103b_peri_get_clk(priv, clk_id); in rv1103b_peri_set_clk()
171 static ulong rv1103b_i2c_get_clk(struct rv1103b_clk_priv *priv, ulong clk_id) in rv1103b_i2c_get_clk() argument
177 switch (clk_id) { in rv1103b_i2c_get_clk()
203 static ulong rv1103b_crypto_get_clk(struct rv1103b_clk_priv *priv, ulong clk_id) in rv1103b_crypto_get_clk() argument
208 switch (clk_id) { in rv1103b_crypto_get_clk()
239 ulong clk_id, ulong rate) in rv1103b_crypto_set_clk() argument
[all …]
H A Dclk_rk3506.c270 static ulong rk3506_pll_div_get_rate(struct rk3506_clk_priv *priv, ulong clk_id) in rk3506_pll_div_get_rate() argument
276 switch (clk_id) { in rk3506_pll_div_get_rate()
304 static ulong rk3506_pll_div_set_rate(struct rk3506_clk_priv *priv, ulong clk_id, in rk3506_pll_div_set_rate() argument
310 switch (clk_id) { in rk3506_pll_div_set_rate()
339 return rk3506_pll_div_get_rate(priv, clk_id); in rk3506_pll_div_set_rate()
342 static ulong rk3506_bus_get_rate(struct rk3506_clk_priv *priv, ulong clk_id) in rk3506_bus_get_rate() argument
348 switch (clk_id) { in rk3506_bus_get_rate()
380 static ulong rk3506_bus_set_rate(struct rk3506_clk_priv *priv, ulong clk_id, in rk3506_bus_set_rate() argument
398 switch (clk_id) { in rk3506_bus_set_rate()
421 return rk3506_bus_get_rate(priv, clk_id); in rk3506_bus_set_rate()
[all …]
H A Dclk_rk3562.c202 static ulong rk3562_bus_get_rate(struct rk3562_clk_priv *priv, ulong clk_id) in rk3562_bus_get_rate() argument
208 switch (clk_id) { in rk3562_bus_get_rate()
236 static ulong rk3562_bus_set_rate(struct rk3562_clk_priv *priv, ulong clk_id, in rk3562_bus_set_rate() argument
250 switch (clk_id) { in rk3562_bus_set_rate()
273 return rk3562_bus_get_rate(priv, clk_id); in rk3562_bus_set_rate()
276 static ulong rk3562_peri_get_rate(struct rk3562_clk_priv *priv, ulong clk_id) in rk3562_peri_get_rate() argument
282 switch (clk_id) { in rk3562_peri_get_rate()
310 static ulong rk3562_peri_set_rate(struct rk3562_clk_priv *priv, ulong clk_id, in rk3562_peri_set_rate() argument
324 switch (clk_id) { in rk3562_peri_set_rate()
347 return rk3562_peri_get_rate(priv, clk_id); in rk3562_peri_set_rate()
[all …]
H A Dclk_rv1126b.c75 static ulong rv1126b_peri_get_clk(struct rv1126b_clk_priv *priv, ulong clk_id) in rv1126b_peri_get_clk() argument
80 switch (clk_id) { in rv1126b_peri_get_clk()
138 ulong clk_id, ulong rate) in rv1126b_peri_set_clk() argument
143 switch (clk_id) { in rv1126b_peri_set_clk()
202 return rv1126b_peri_get_clk(priv, clk_id); in rv1126b_peri_set_clk()
205 static ulong rv1126b_i2c_get_clk(struct rv1126b_clk_priv *priv, ulong clk_id) in rv1126b_i2c_get_clk() argument
211 switch (clk_id) { in rv1126b_i2c_get_clk()
242 static ulong rv1126b_i2c_set_clk(struct rv1126b_clk_priv *priv, ulong clk_id, in rv1126b_i2c_set_clk() argument
248 switch (clk_id) { in rv1126b_i2c_set_clk()
275 return rv1126b_i2c_get_clk(priv, clk_id); in rv1126b_i2c_set_clk()
[all …]
H A Dclk_rk1808.c95 static ulong rk1808_i2c_get_clk(struct rk1808_clk_priv *priv, ulong clk_id) in rk1808_i2c_get_clk() argument
100 switch (clk_id) { in rk1808_i2c_get_clk()
134 ulong clk_id, uint hz) in rk1808_i2c_set_clk() argument
142 switch (clk_id) { in rk1808_i2c_set_clk()
184 return rk1808_i2c_get_clk(priv, clk_id); in rk1808_i2c_set_clk()
188 static ulong rk1808_mmc_get_clk(struct rk1808_clk_priv *priv, uint clk_id) in rk1808_mmc_get_clk() argument
193 switch (clk_id) { in rk1808_mmc_get_clk()
222 ulong clk_id, ulong set_rate) in rk1808_mmc_set_clk() argument
228 switch (clk_id) { in rk1808_mmc_set_clk()
265 return rk1808_mmc_get_clk(priv, clk_id); in rk1808_mmc_set_clk()
[all …]
H A Dclk_rv1106.c76 static ulong rv1106_peri_get_clk(struct rv1106_clk_priv *priv, ulong clk_id) in rv1106_peri_get_clk() argument
81 switch (clk_id) { in rv1106_peri_get_clk()
164 ulong clk_id, ulong rate) in rv1106_peri_set_clk() argument
169 switch (clk_id) { in rv1106_peri_set_clk()
256 return rv1106_peri_get_clk(priv, clk_id); in rv1106_peri_set_clk()
259 static ulong rv1106_i2c_get_clk(struct rv1106_clk_priv *priv, ulong clk_id) in rv1106_i2c_get_clk() argument
265 switch (clk_id) { in rv1106_i2c_get_clk()
311 static ulong rv1106_crypto_get_clk(struct rv1106_clk_priv *priv, ulong clk_id) in rv1106_crypto_get_clk() argument
316 switch (clk_id) { in rv1106_crypto_get_clk()
345 ulong clk_id, ulong rate) in rv1106_crypto_set_clk() argument
[all …]
H A Dclk_rk3576.c169 static ulong rk3576_bus_get_clk(struct rk3576_clk_priv *priv, ulong clk_id) in rk3576_bus_get_clk() argument
174 switch (clk_id) { in rk3576_bus_get_clk()
218 ulong clk_id, ulong rate) in rk3576_bus_set_clk() argument
223 switch (clk_id) { in rk3576_bus_set_clk()
272 return rk3576_bus_get_clk(priv, clk_id); in rk3576_bus_set_clk()
275 static ulong rk3576_top_get_clk(struct rk3576_clk_priv *priv, ulong clk_id) in rk3576_top_get_clk() argument
280 switch (clk_id) { in rk3576_top_get_clk()
335 ulong clk_id, ulong rate) in rk3576_top_set_clk() argument
340 switch (clk_id) { in rk3576_top_set_clk()
401 return rk3576_top_get_clk(priv, clk_id); in rk3576_top_set_clk()
[all …]
H A Dclk_px30.c297 static ulong px30_i2c_get_clk(struct px30_clk_priv *priv, ulong clk_id) in px30_i2c_get_clk() argument
302 switch (clk_id) { in px30_i2c_get_clk()
327 static ulong px30_i2c_set_clk(struct px30_clk_priv *priv, ulong clk_id, uint hz) in px30_i2c_set_clk() argument
335 switch (clk_id) { in px30_i2c_set_clk()
369 return px30_i2c_get_clk(priv, clk_id); in px30_i2c_set_clk()
426 static ulong px30_i2s_get_clk(struct px30_clk_priv *priv, ulong clk_id) in px30_i2s_get_clk() argument
433 switch (clk_id) { in px30_i2s_get_clk()
453 static ulong px30_i2s_set_clk(struct px30_clk_priv *priv, ulong clk_id, uint hz) in px30_i2s_set_clk() argument
464 switch (clk_id) { in px30_i2s_set_clk()
483 return px30_i2s_get_clk(priv, clk_id); in px30_i2s_set_clk()
[all …]
H A Dclk_rk3588.c151 static ulong rk3588_center_get_clk(struct rk3588_clk_priv *priv, ulong clk_id) in rk3588_center_get_clk() argument
156 switch (clk_id) { in rk3588_center_get_clk()
217 ulong clk_id, ulong rate) in rk3588_center_set_clk() argument
222 switch (clk_id) { in rk3588_center_set_clk()
280 return rk3588_center_get_clk(priv, clk_id); in rk3588_center_set_clk()
283 static ulong rk3588_top_get_clk(struct rk3588_clk_priv *priv, ulong clk_id) in rk3588_top_get_clk() argument
288 switch (clk_id) { in rk3588_top_get_clk()
329 ulong clk_id, ulong rate) in rk3588_top_set_clk() argument
334 switch (clk_id) { in rk3588_top_set_clk()
377 return rk3588_top_get_clk(priv, clk_id); in rk3588_top_set_clk()
[all …]
H A Dclk_rk3568.c245 ulong clk_id) in rk3568_i2c_get_pmuclk() argument
250 switch (clk_id) { in rk3568_i2c_get_pmuclk()
263 ulong clk_id, ulong rate) in rk3568_i2c_set_pmuclk() argument
271 switch (clk_id) { in rk3568_i2c_set_pmuclk()
280 return rk3568_i2c_get_pmuclk(priv, clk_id); in rk3568_i2c_set_pmuclk()
284 ulong clk_id) in rk3568_pwm_get_pmuclk() argument
289 switch (clk_id) { in rk3568_pwm_get_pmuclk()
307 ulong clk_id, ulong rate) in rk3568_pwm_set_pmuclk() argument
312 switch (clk_id) { in rk3568_pwm_set_pmuclk()
333 return rk3568_pwm_get_pmuclk(priv, clk_id); in rk3568_pwm_set_pmuclk()
[all …]
H A Dclk_rk3528.c237 ulong clk_id) in rk3528_ppll_matrix_get_rate() argument
243 switch (clk_id) { in rk3528_ppll_matrix_get_rate()
279 ulong clk_id, ulong rate) in rk3528_ppll_matrix_set_rate() argument
285 switch (clk_id) { in rk3528_ppll_matrix_set_rate()
320 return rk3528_ppll_matrix_get_rate(priv, clk_id); in rk3528_ppll_matrix_set_rate()
324 ulong clk_id) in rk3528_cgpll_matrix_get_rate() argument
333 switch (clk_id) { in rk3528_cgpll_matrix_get_rate()
432 ulong clk_id, ulong rate) in rk3528_cgpll_matrix_set_rate() argument
441 switch (clk_id) { in rk3528_cgpll_matrix_set_rate()
545 return rk3528_cgpll_matrix_get_rate(priv, clk_id); in rk3528_cgpll_matrix_set_rate()
[all …]
H A Dclk_rk3328.c167 static ulong rk3328_i2c_get_clk(struct rk3328_clk_priv *priv, ulong clk_id) in rk3328_i2c_get_clk() argument
172 switch (clk_id) { in rk3328_i2c_get_clk()
198 ulong clk_id, uint hz) in rk3328_i2c_set_clk() argument
206 switch (clk_id) { in rk3328_i2c_set_clk()
316 static ulong rk3328_mmc_get_clk(struct rk3328_clk_priv *priv, uint clk_id) in rk3328_mmc_get_clk() argument
321 switch (clk_id) { in rk3328_mmc_get_clk()
345 ulong clk_id, ulong set_rate) in rk3328_mmc_set_clk() argument
351 switch (clk_id) { in rk3328_mmc_set_clk()
381 return rk3328_mmc_get_clk(priv, clk_id); in rk3328_mmc_set_clk()
492 static ulong rk3328_vop_get_clk(struct rk3328_clk_priv *priv, ulong clk_id) in rk3328_vop_get_clk() argument
[all …]
H A Dclk_rk3368.c293 static ulong rk3368_mmc_get_clk(struct rk3368_cru *cru, uint clk_id) in rk3368_mmc_get_clk() argument
298 switch (clk_id) { in rk3368_mmc_get_clk()
389 ulong clk_id = clk->id; in rk3368_mmc_set_clk() local
395 switch (clk_id) { in rk3368_mmc_set_clk()
413 return rk3368_mmc_get_clk(cru, clk_id); in rk3368_mmc_set_clk()
514 static ulong rk3368_spi_get_clk(struct rk3368_cru *cru, ulong clk_id) in rk3368_spi_get_clk() argument
519 switch (clk_id) { in rk3368_spi_get_clk()
521 spiclk = &spi_clkregs[clk_id - SCLK_SPI0]; in rk3368_spi_get_clk()
525 pr_err("%s: SPI clk-id %ld not supported\n", __func__, clk_id); in rk3368_spi_get_clk()
536 static ulong rk3368_spi_set_clk(struct rk3368_cru *cru, ulong clk_id, uint hz) in rk3368_spi_set_clk() argument
[all …]
H A Dclk_rk3399.c584 static ulong rk3399_i2c_get_clk(struct rk3399_cru *cru, ulong clk_id) in rk3399_i2c_get_clk() argument
588 switch (clk_id) { in rk3399_i2c_get_clk()
621 static ulong rk3399_i2c_set_clk(struct rk3399_cru *cru, ulong clk_id, uint hz) in rk3399_i2c_set_clk() argument
629 switch (clk_id) { in rk3399_i2c_set_clk()
659 return rk3399_i2c_get_clk(cru, clk_id); in rk3399_i2c_set_clk()
698 static ulong rk3399_spi_get_clk(struct rk3399_cru *cru, ulong clk_id) in rk3399_spi_get_clk() argument
703 switch (clk_id) { in rk3399_spi_get_clk()
705 spiclk = &spi_clkregs[clk_id - SCLK_SPI0]; in rk3399_spi_get_clk()
709 pr_err("%s: SPI clk-id %ld not supported\n", __func__, clk_id); in rk3399_spi_get_clk()
720 static ulong rk3399_spi_set_clk(struct rk3399_cru *cru, ulong clk_id, uint hz) in rk3399_spi_set_clk() argument
[all …]
H A Dclk_rk3308.c615 static ulong rk3308_bus_get_clk(struct rk3308_clk_priv *priv, ulong clk_id) in rk3308_bus_get_clk() argument
620 switch (clk_id) { in rk3308_bus_get_clk()
641 static ulong rk3308_bus_set_clk(struct rk3308_clk_priv *priv, ulong clk_id, in rk3308_bus_set_clk() argument
654 switch (clk_id) { in rk3308_bus_set_clk()
676 return rk3308_bus_get_clk(priv, clk_id); in rk3308_bus_set_clk()
679 static ulong rk3308_peri_get_clk(struct rk3308_clk_priv *priv, ulong clk_id) in rk3308_peri_get_clk() argument
684 switch (clk_id) { in rk3308_peri_get_clk()
704 static ulong rk3308_peri_set_clk(struct rk3308_clk_priv *priv, ulong clk_id, in rk3308_peri_set_clk() argument
717 switch (clk_id) { in rk3308_peri_set_clk()
739 return rk3308_peri_get_clk(priv, clk_id); in rk3308_peri_set_clk()
[all …]
H A Dclk_rk322x.c270 static ulong rk322x_bus_get_clk(struct rk322x_clk_priv *priv, ulong clk_id) in rk322x_bus_get_clk() argument
275 switch (clk_id) { in rk322x_bus_get_clk()
304 ulong clk_id, ulong hz) in rk322x_bus_set_clk() argument
313 switch (clk_id) { in rk322x_bus_set_clk()
345 return rk322x_bus_get_clk(priv, clk_id); in rk322x_bus_set_clk()
348 static ulong rk322x_peri_get_clk(struct rk322x_clk_priv *priv, ulong clk_id) in rk322x_peri_get_clk() argument
353 switch (clk_id) { in rk322x_peri_get_clk()
377 ulong clk_id, ulong hz) in rk322x_peri_set_clk() argument
386 switch (clk_id) { in rk322x_peri_set_clk()
418 return rk322x_peri_get_clk(priv, clk_id); in rk322x_peri_set_clk()
[all …]
H A Dclk_rv1126.c214 ulong clk_id) in rv1126_i2c_get_pmuclk() argument
219 switch (clk_id) { in rv1126_i2c_get_pmuclk()
236 ulong clk_id, ulong rate) in rv1126_i2c_set_pmuclk() argument
244 switch (clk_id) { in rv1126_i2c_set_pmuclk()
257 return rv1126_i2c_get_pmuclk(priv, clk_id); in rv1126_i2c_set_pmuclk()
261 ulong clk_id) in rv1126_pwm_get_pmuclk() argument
266 switch (clk_id) { in rv1126_pwm_get_pmuclk()
289 ulong clk_id, ulong rate) in rv1126_pwm_set_pmuclk() argument
294 switch (clk_id) { in rv1126_pwm_set_pmuclk()
335 return rv1126_pwm_get_pmuclk(priv, clk_id); in rv1126_pwm_set_pmuclk()
[all …]
H A Dclk_rk3036.c62 static int rkclk_set_pll(struct rk3036_cru *cru, enum rk_clk_id clk_id, in rkclk_set_pll() argument
65 int pll_id = rk_pll_id(clk_id); in rkclk_set_pll()
202 enum rk_clk_id clk_id) in rkclk_pll_get_rate() argument
206 int pll_id = rk_pll_id(clk_id); in rkclk_pll_get_rate()
220 shift = clk_shift[clk_id]; in rkclk_pll_get_rate()
221 mask = clk_mask[clk_id]; in rkclk_pll_get_rate()
425 static ulong rk3036_peri_get_clk(struct rk3036_clk_priv *priv, ulong clk_id, in rk3036_peri_get_clk() argument
431 switch (clk_id) { in rk3036_peri_get_clk()
451 ulong clk_id, uint clk_general_rate, in rk3036_peri_set_clk() argument
457 switch (clk_id) { in rk3036_peri_set_clk()
[all …]
H A Dclk_rv1108.c44 static inline int rv1108_pll_id(enum rk_clk_id clk_id) in rv1108_pll_id() argument
48 switch (clk_id) { in rv1108_pll_id()
51 id = clk_id - 1; in rv1108_pll_id()
57 printf("invalid pll id:%d\n", clk_id); in rv1108_pll_id()
65 static int rkclk_set_pll(struct rv1108_cru *cru, enum rk_clk_id clk_id, in rkclk_set_pll() argument
68 int pll_id = rv1108_pll_id(clk_id); in rkclk_set_pll()
118 enum rk_clk_id clk_id) in rkclk_pll_get_rate() argument
122 int pll_id = rv1108_pll_id(clk_id); in rkclk_pll_get_rate()
413 static ulong rv1108_i2c_get_clk(struct rv1108_cru *cru, ulong clk_id) in rv1108_i2c_get_clk() argument
417 switch (clk_id) { in rv1108_i2c_get_clk()
[all …]
H A Dclk_rk3128.c223 static ulong rk3128_peri_get_clk(struct rk3128_clk_priv *priv, ulong clk_id) in rk3128_peri_get_clk() argument
228 switch (clk_id) { in rk3128_peri_get_clk()
259 ulong clk_id, uint hz) in rk3128_peri_set_clk() argument
264 switch (clk_id) { in rk3128_peri_set_clk()
301 return rk3128_peri_get_clk(priv, clk_id); in rk3128_peri_set_clk()
304 static ulong rk3128_bus_get_clk(struct rk3128_clk_priv *priv, ulong clk_id) in rk3128_bus_get_clk() argument
309 switch (clk_id) { in rk3128_bus_get_clk()
334 ulong clk_id, uint hz) in rk3128_bus_set_clk() argument
339 switch (clk_id) { in rk3128_bus_set_clk()
371 return rk3128_bus_get_clk(priv, clk_id); in rk3128_bus_set_clk()
[all …]
H A Dclk_rk3066.c107 static int rkclk_set_pll(struct rk3066_cru *cru, enum rk_clk_id clk_id, in rkclk_set_pll() argument
110 int pll_id = rk_pll_id(clk_id); in rkclk_set_pll()
248 enum rk_clk_id clk_id) in rkclk_pll_get_rate() argument
252 int pll_id = rk_pll_id(clk_id); in rkclk_pll_get_rate()
261 shift = clk_shift[clk_id]; in rkclk_pll_get_rate()
/rk3399_rockchip-uboot/arch/arm/include/asm/arch-rockchip/
H A Dclock.h159 void __iomem *base, ulong clk_id,
162 void __iomem *base, ulong clk_id);
168 static inline int rk_pll_id(enum rk_clk_id clk_id) in rk_pll_id() argument
170 return clk_id - 1; in rk_pll_id()
/rk3399_rockchip-uboot/common/
H A Dnondm.c13 typedef int (*clk_set_rate_t)(int clk_id, unsigned long rate);
/rk3399_rockchip-uboot/arch/arm/include/asm/arch-tegra/
H A Dclock.h353 enum periph_id clk_id_to_periph_id(int clk_id);
420 int clock_external_output(int clk_id);
/rk3399_rockchip-uboot/arch/arm/mach-tegra/
H A Dclock.c816 int clock_external_output(int clk_id) in clock_external_output() argument
820 if (clk_id >= 1 && clk_id <= 3) { in clock_external_output()
822 1 << (2 + (clk_id - 1) * 8)); in clock_external_output()
824 printf("%s: Unknown output clock id %d\n", __func__, clk_id); in clock_external_output()

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