Searched refs:ATMEL_BASE_CS1 (Results 1 – 24 of 24) sorted by relevance
49 #define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1
50 #define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1
64 #define PHYS_SDRAM ATMEL_BASE_CS1 /* 0x20000000 */
78 #define PHYS_SDRAM_1 ATMEL_BASE_CS1 /* on DDRSDRC1 */
62 #define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1
34 #define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1
65 #define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1
70 #define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1
68 #define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1
112 #define ATMEL_BASE_CS1 0x20000000 /* SDRAM */ macro
113 #define ATMEL_BASE_CS1 0x20000000 /* SDRAM */ macro
127 #define ATMEL_BASE_CS1 0x20000000 /* SDRAM */ macro
132 #define ATMEL_BASE_CS1 0x20000000 macro
128 #define ATMEL_BASE_CS1 0x20000000 /* SDRAM */ macro
131 #define ATMEL_BASE_CS1 0x20000000 macro
183 #define ATMEL_BASE_CS1 0x40000000 macro
169 #define ATMEL_BASE_CS1 0x60000000 macro
140 #define ATMEL_BASE_CS1 0x60000000 macro
257 sdramc_initialize(ATMEL_BASE_CS1, &setting); in mem_init()
290 ddr2_init(ATMEL_BASE_DDRSDRC, ATMEL_BASE_CS1, &ddr2); in mem_init()
300 ddr2_init(ATMEL_BASE_DDRSDRC, ATMEL_BASE_CS1, &ddr2); in mem_init()
99 ddr2_init(ATMEL_BASE_DDRSDRC1, ATMEL_BASE_CS1, &ddr2); in mem_init()
176 sdramc_initialize(ATMEL_BASE_CS1, &setting); in sdramc_configure()
217 writel(0, ATMEL_BASE_CS1); in fpga_hw_init()