1*4882a593Smuzhiyun /* 2*4882a593Smuzhiyun * Configuration settings for the mini-box PICOSAM9G45 board. 3*4882a593Smuzhiyun * (C) Copyright 2015 Inter Act B.V. 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Based on: 6*4882a593Smuzhiyun * U-Boot file: include/configs/at91sam9m10g45ek.h 7*4882a593Smuzhiyun * (C) Copyright 2007-2008 8*4882a593Smuzhiyun * Stelian Pop <stelian@popies.net> 9*4882a593Smuzhiyun * Lead Tech Design <www.leadtechdesign.com> 10*4882a593Smuzhiyun * 11*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ 12*4882a593Smuzhiyun */ 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun #ifndef __CONFIG_H 15*4882a593Smuzhiyun #define __CONFIG_H 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun #include <asm/hardware.h> 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun #define CONFIG_SYS_TEXT_BASE 0x23f00000 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun #define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */ 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun /* ARM asynchronous clock */ 24*4882a593Smuzhiyun #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 25*4882a593Smuzhiyun #define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* from 12 MHz crystal */ 26*4882a593Smuzhiyun 27*4882a593Smuzhiyun #define CONFIG_PICOSAM 28*4882a593Smuzhiyun 29*4882a593Smuzhiyun #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */ 30*4882a593Smuzhiyun #define CONFIG_SETUP_MEMORY_TAGS 31*4882a593Smuzhiyun #define CONFIG_INITRD_TAG 32*4882a593Smuzhiyun #define CONFIG_SKIP_LOWLEVEL_INIT 33*4882a593Smuzhiyun 34*4882a593Smuzhiyun /* general purpose I/O */ 35*4882a593Smuzhiyun #define CONFIG_ATMEL_LEGACY /* required until (g)pio is fixed */ 36*4882a593Smuzhiyun #define CONFIG_AT91_GPIO 37*4882a593Smuzhiyun #define CONFIG_AT91_GPIO_PULLUP 1 /* keep pullups on peripheral pins */ 38*4882a593Smuzhiyun 39*4882a593Smuzhiyun /* serial console */ 40*4882a593Smuzhiyun #define CONFIG_ATMEL_USART 41*4882a593Smuzhiyun #define CONFIG_USART_BASE ATMEL_BASE_DBGU 42*4882a593Smuzhiyun #define CONFIG_USART_ID ATMEL_ID_SYS 43*4882a593Smuzhiyun 44*4882a593Smuzhiyun /* LCD */ 45*4882a593Smuzhiyun #define LCD_BPP LCD_COLOR8 46*4882a593Smuzhiyun #define CONFIG_LCD_LOGO 47*4882a593Smuzhiyun #undef LCD_TEST_PATTERN 48*4882a593Smuzhiyun #define CONFIG_LCD_INFO 49*4882a593Smuzhiyun #define CONFIG_LCD_INFO_BELOW_LOGO 50*4882a593Smuzhiyun #define CONFIG_ATMEL_LCD 51*4882a593Smuzhiyun #define CONFIG_ATMEL_LCD_RGB565 52*4882a593Smuzhiyun /* board specific(not enough SRAM) */ 53*4882a593Smuzhiyun #define CONFIG_AT91SAM9G45_LCD_BASE 0x23E00000 54*4882a593Smuzhiyun 55*4882a593Smuzhiyun /* LED */ 56*4882a593Smuzhiyun #define CONFIG_AT91_LED 57*4882a593Smuzhiyun #define CONFIG_GREEN_LED AT91_PIN_PD31 /* this is the user1 led */ 58*4882a593Smuzhiyun 59*4882a593Smuzhiyun 60*4882a593Smuzhiyun /* 61*4882a593Smuzhiyun * BOOTP options 62*4882a593Smuzhiyun */ 63*4882a593Smuzhiyun #define CONFIG_BOOTP_BOOTFILESIZE 64*4882a593Smuzhiyun #define CONFIG_BOOTP_BOOTPATH 65*4882a593Smuzhiyun #define CONFIG_BOOTP_GATEWAY 66*4882a593Smuzhiyun #define CONFIG_BOOTP_HOSTNAME 67*4882a593Smuzhiyun 68*4882a593Smuzhiyun /* Enable the watchdog */ 69*4882a593Smuzhiyun #define CONFIG_AT91SAM9_WATCHDOG 70*4882a593Smuzhiyun #define CONFIG_HW_WATCHDOG 71*4882a593Smuzhiyun 72*4882a593Smuzhiyun /* 73*4882a593Smuzhiyun * Command line configuration. 74*4882a593Smuzhiyun */ 75*4882a593Smuzhiyun 76*4882a593Smuzhiyun /* SDRAM */ 77*4882a593Smuzhiyun #define CONFIG_NR_DRAM_BANKS 2 78*4882a593Smuzhiyun #define PHYS_SDRAM_1 ATMEL_BASE_CS1 /* on DDRSDRC1 */ 79*4882a593Smuzhiyun #define PHYS_SDRAM_1_SIZE 0x08000000 /* 128 MB */ 80*4882a593Smuzhiyun #define PHYS_SDRAM_2 ATMEL_BASE_CS6 /* on DDRSDRC0 */ 81*4882a593Smuzhiyun #define PHYS_SDRAM_2_SIZE 0x08000000 /* 128 MB */ 82*4882a593Smuzhiyun #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1 83*4882a593Smuzhiyun 84*4882a593Smuzhiyun #define CONFIG_SYS_INIT_SP_ADDR \ 85*4882a593Smuzhiyun (CONFIG_SYS_SDRAM_BASE + 4 * 1024 - GENERATED_GBL_DATA_SIZE) 86*4882a593Smuzhiyun 87*4882a593Smuzhiyun /* MMC */ 88*4882a593Smuzhiyun 89*4882a593Smuzhiyun #ifdef CONFIG_CMD_MMC 90*4882a593Smuzhiyun #define CONFIG_GENERIC_ATMEL_MCI 91*4882a593Smuzhiyun #endif 92*4882a593Smuzhiyun 93*4882a593Smuzhiyun /* Ethernet */ 94*4882a593Smuzhiyun #define CONFIG_MACB 95*4882a593Smuzhiyun #define CONFIG_RMII 96*4882a593Smuzhiyun #define CONFIG_NET_RETRY_COUNT 20 97*4882a593Smuzhiyun #define CONFIG_RESET_PHY_R 98*4882a593Smuzhiyun #define CONFIG_AT91_WANTS_COMMON_PHY 99*4882a593Smuzhiyun 100*4882a593Smuzhiyun #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */ 101*4882a593Smuzhiyun 102*4882a593Smuzhiyun #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE 103*4882a593Smuzhiyun #define CONFIG_SYS_MEMTEST_END 0x23e00000 104*4882a593Smuzhiyun 105*4882a593Smuzhiyun #ifdef CONFIG_SYS_USE_MMC 106*4882a593Smuzhiyun /* bootstrap + u-boot + env + linux in mmc */ 107*4882a593Smuzhiyun #define CONFIG_ENV_SIZE 0x4000 108*4882a593Smuzhiyun 109*4882a593Smuzhiyun #define CONFIG_BOOTCOMMAND "fatload mmc 0:1 0x21000000 dtb; " \ 110*4882a593Smuzhiyun "fatload mmc 0:1 0x22000000 zImage; " \ 111*4882a593Smuzhiyun "bootz 0x22000000 - 0x21000000" 112*4882a593Smuzhiyun #endif 113*4882a593Smuzhiyun 114*4882a593Smuzhiyun #define CONFIG_SYS_LONGHELP 115*4882a593Smuzhiyun #define CONFIG_CMDLINE_EDITING 116*4882a593Smuzhiyun #define CONFIG_AUTO_COMPLETE 117*4882a593Smuzhiyun 118*4882a593Smuzhiyun /* 119*4882a593Smuzhiyun * Size of malloc() pool 120*4882a593Smuzhiyun */ 121*4882a593Smuzhiyun #define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128*1024, 0x1000) 122*4882a593Smuzhiyun 123*4882a593Smuzhiyun /* Defines for SPL */ 124*4882a593Smuzhiyun #define CONFIG_SPL_FRAMEWORK 125*4882a593Smuzhiyun #define CONFIG_SPL_TEXT_BASE 0x300000 126*4882a593Smuzhiyun #define CONFIG_SPL_MAX_SIZE 0x010000 127*4882a593Smuzhiyun #define CONFIG_SPL_STACK 0x310000 128*4882a593Smuzhiyun 129*4882a593Smuzhiyun #define CONFIG_SYS_MONITOR_LEN 0x80000 130*4882a593Smuzhiyun 131*4882a593Smuzhiyun #ifdef CONFIG_SYS_USE_MMC 132*4882a593Smuzhiyun 133*4882a593Smuzhiyun #define CONFIG_SPL_BSS_START_ADDR 0x20000000 134*4882a593Smuzhiyun #define CONFIG_SPL_BSS_MAX_SIZE 0x00080000 135*4882a593Smuzhiyun #define CONFIG_SYS_SPL_MALLOC_START 0x20080000 136*4882a593Smuzhiyun #define CONFIG_SYS_SPL_MALLOC_SIZE 0x00080000 137*4882a593Smuzhiyun 138*4882a593Smuzhiyun #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1 139*4882a593Smuzhiyun #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME "u-boot.img" 140*4882a593Smuzhiyun 141*4882a593Smuzhiyun #define CONFIG_SPL_ATMEL_SIZE 142*4882a593Smuzhiyun #define CONFIG_SYS_MASTER_CLOCK 132096000 143*4882a593Smuzhiyun #define CONFIG_SYS_AT91_PLLA 0x20c73f03 144*4882a593Smuzhiyun #define CONFIG_SYS_MCKR 0x1301 145*4882a593Smuzhiyun #define CONFIG_SYS_MCKR_CSS 0x1302 146*4882a593Smuzhiyun 147*4882a593Smuzhiyun #endif 148*4882a593Smuzhiyun #endif 149