| /OK3568_Linux_fs/kernel/drivers/auxdisplay/ |
| H A D | Kconfig | 341 -1..-17 : connected to the same pin through an inverter (eg: transistor).
356 -1..-17 : connected to the same pin through an inverter (eg: transistor).
371 -1..-17 : connected to the same pin through an inverter (eg: transistor).
386 -1..-17 : connected to the same pin through an inverter (eg: transistor).
401 -1..-17 : connected to the same pin through an inverter (eg: transistor).
416 -1..-17 : connected to the same pin through an inverter (eg: transistor).
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| /OK3568_Linux_fs/u-boot/drivers/mmc/ |
| H A D | s5p_sdhci.c | 55 * Inverter delay means10ns delay if SDCLK 50MHz setting in s5p_sdhci_set_control_reg()
58 * 00 = Delay3 (inverter delay) in s5p_sdhci_set_control_reg()
59 * 10 = Delay4 (inverter delay + 2ns) in s5p_sdhci_set_control_reg()
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| /OK3568_Linux_fs/kernel/drivers/clk/rockchip/ |
| H A D | Kconfig | 156 bool "Rockchip Clk Inverter"
159 Say y here to enable clk Inverter.
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| H A D | Makefile | 16 clk-rockchip-$(CONFIG_ROCKCHIP_CLK_INV) += clk-inverter.o
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| H A D | clk-rk3188.c | 341 INVERTER(0, "pclk_cif0", "pclkin_cif0",
370 INVERTER(SCLK_HSADC, "sclk_hsadc", "sclk_hsadc_out",
600 INVERTER(0, "pclk_cif1", "pclkin_cif1",
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| H A D | clk-rk3288.c | 661 INVERTER(SCLK_HSADC, "sclk_hsadc", "sclk_hsadc_out",
840 INVERTER(PCLK_VIP, "pclk_vip", "pclk_vip_in", RK3288_CLKSEL_CON(29), 4, IFLAGS),
842 INVERTER(0, "pclk_isp", "pclk_isp_in", RK3288_CLKSEL_CON(29), 3, IFLAGS),
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| H A D | clk-rk3368.c | 482 INVERTER(PCLK_ISP, "pclk_isp", "pclk_isp_in",
487 INVERTER(PCLK_VIP, "pclk_vip", "pclk_vip_in",
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| /OK3568_Linux_fs/kernel/drivers/clk/meson/ |
| H A D | clk-phase.c | 130 * This drive a bit clock inverter for which the
131 * opposite value of the inverter bit needs to be manually
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| /OK3568_Linux_fs/kernel/drivers/irqchip/ |
| H A D | irq-uniphier-aidet.c | 22 #define UNIPHIER_AIDET_DETCONF 0x04 /* inverter register base */
62 /* enable inverter for active low triggers */ in uniphier_aidet_irq_set_type()
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| H A D | qcom-pdc.c | 150 * active low interrupts to be handled at GIC, PDC has an inverter that inverts
152 * For the inverter to work, the polarity bit in the IRQ_CONFIG register has to
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| /OK3568_Linux_fs/kernel/include/sound/ |
| H A D | wm0010.h | 16 /* Set if there is an inverter between the GPIO controlling
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| /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/interrupt-controller/ |
| H A D | socionext,uniphier-aidet.yaml | 12 rising edge interrupts. The AIDET provides logic inverter to support low
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| H A D | mediatek,sysirq.txt | 3 MediaTek SOCs sysirq support controllable irq inverter for each GIC SPI
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| /OK3568_Linux_fs/u-boot/board/samsung/universal_c210/ |
| H A D | universal.c | 366 * you should set it HIGH since it removes the inverter in exynos_init()
374 * Default reset state is High and there's no inverter in exynos_init()
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| /OK3568_Linux_fs/kernel/drivers/net/phy/ |
| H A D | bcm7xxx.c | 161 * internal inverter may not allow the first MDIO transaction to pass in bcm7xxx_28nm_config_init()
398 * where the internal inverter may not allow the first MDIO transaction in bcm7xxx_28nm_ephy_config_init()
653 * internal inverter may not allow the first MDIO transaction to pass in bcm7xxx_28nm_probe()
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| H A D | bcm-cygnus.c | 139 * internal inverter may not allow the first MDIO transaction to pass in bcm_omega_config_init()
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| /OK3568_Linux_fs/kernel/sound/soc/codecs/ |
| H A D | es8311.h | 30 #define ES8311_CLK_MANAGER_REG06 0x06 /* bclk inverter and divider */
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| /OK3568_Linux_fs/kernel/drivers/rtc/ |
| H A D | rtc-ds1302.c | 114 * there's an inverter in place, this needs SPI_CS_HIGH! in ds1302_probe()
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| H A D | rtc-ds1305.c | 562 * there's an inverter in place, this needs SPI_CS_HIGH! in ds1305_probe()
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| /OK3568_Linux_fs/kernel/drivers/media/rc/ |
| H A D | st_rc.c | 46 #define IRB_RX_POLARITY_INV 0x68 /* polarity inverter */
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| /OK3568_Linux_fs/kernel/arch/arm/boot/dts/ |
| H A D | exynos5422-odroidxu3-common.dtsi | 25 * as a 16ms debouce filter and signal inverter with
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| /OK3568_Linux_fs/kernel/arch/x86/platform/olpc/ |
| H A D | olpc-xo1-sci.c | 110 * front-end inverter to ensure that that's the edge we're always in detect_lid_state()
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| /OK3568_Linux_fs/kernel/drivers/mtd/nand/raw/ingenic/ |
| H A D | ingenic_nand_drv.c | 384 * inverter on this board, it should be active-high. Let's fix that in ingenic_nand_init_chip()
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| /OK3568_Linux_fs/kernel/drivers/pwm/ |
| H A D | pwm-samsung.c | 74 * @inverter_mask: inverter status for all channels - one bit per channel
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| /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/media/ |
| H A D | video-interfaces.txt | 587 inverter here ?... */
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