1 /*
2 * Copyright (C) 2010 Samsung Electronics
3 * Minkyu Kang <mk7.kang@samsung.com>
4 * Kyungmin Park <kyungmin.park@samsung.com>
5 *
6 * SPDX-License-Identifier: GPL-2.0+
7 */
8
9 #include <common.h>
10 #include <spi.h>
11 #include <lcd.h>
12 #include <asm/io.h>
13 #include <asm/gpio.h>
14 #include <asm/arch/adc.h>
15 #include <asm/arch/pinmux.h>
16 #include <asm/arch/watchdog.h>
17 #include <ld9040.h>
18 #include <power/pmic.h>
19 #include <usb.h>
20 #include <usb/dwc2_udc.h>
21 #include <asm/arch/cpu.h>
22 #include <power/max8998_pmic.h>
23 #include <libtizen.h>
24 #include <samsung/misc.h>
25 #include <usb_mass_storage.h>
26 #include <asm/mach-types.h>
27
28 DECLARE_GLOBAL_DATA_PTR;
29
30 unsigned int board_rev;
31 static int init_pmic_lcd(void);
32
get_board_rev(void)33 u32 get_board_rev(void)
34 {
35 return board_rev;
36 }
37
exynos_power_init(void)38 int exynos_power_init(void)
39 {
40 return init_pmic_lcd();
41 }
42
get_hwrev(void)43 static int get_hwrev(void)
44 {
45 return board_rev & 0xFF;
46 }
47
get_adc_value(int channel)48 static unsigned short get_adc_value(int channel)
49 {
50 struct s5p_adc *adc = (struct s5p_adc *)samsung_get_base_adc();
51 unsigned short ret = 0;
52 unsigned int reg;
53 unsigned int loop = 0;
54
55 writel(channel & 0xF, &adc->adcmux);
56 writel((1 << 14) | (49 << 6), &adc->adccon);
57 writel(1000 & 0xffff, &adc->adcdly);
58 writel(readl(&adc->adccon) | (1 << 16), &adc->adccon); /* 12 bit */
59 udelay(10);
60 writel(readl(&adc->adccon) | (1 << 0), &adc->adccon); /* Enable */
61 udelay(10);
62
63 do {
64 udelay(1);
65 reg = readl(&adc->adccon);
66 } while (!(reg & (1 << 15)) && (loop++ < 1000));
67
68 ret = readl(&adc->adcdat0) & 0xFFF;
69
70 return ret;
71 }
72
adc_power_control(int on)73 static int adc_power_control(int on)
74 {
75 struct udevice *dev;
76 int ret;
77 u8 reg;
78
79 ret = pmic_get("max8998-pmic", &dev);
80 if (ret) {
81 puts("Failed to get MAX8998!\n");
82 return ret;
83 }
84
85 reg = pmic_reg_read(dev, MAX8998_REG_ONOFF1);
86 if (on)
87 reg |= MAX8998_LDO4;
88 else
89 reg &= ~MAX8998_LDO4;
90
91 ret = pmic_reg_write(dev, MAX8998_REG_ONOFF1, reg);
92 if (ret) {
93 puts("MAX8998 LDO setting error\n");
94 return -EINVAL;
95 }
96
97 return 0;
98 }
99
get_hw_revision(void)100 static unsigned int get_hw_revision(void)
101 {
102 int hwrev, mode0, mode1;
103
104 adc_power_control(1);
105
106 mode0 = get_adc_value(1); /* HWREV_MODE0 */
107 mode1 = get_adc_value(2); /* HWREV_MODE1 */
108
109 /*
110 * XXX Always set the default hwrev as the latest board
111 * ADC = (voltage) / 3.3 * 4096
112 */
113 hwrev = 3;
114
115 #define IS_RANGE(x, min, max) ((x) > (min) && (x) < (max))
116 if (IS_RANGE(mode0, 80, 200) && IS_RANGE(mode1, 80, 200))
117 hwrev = 0x0; /* 0.01V 0.01V */
118 if (IS_RANGE(mode0, 750, 1000) && IS_RANGE(mode1, 80, 200))
119 hwrev = 0x1; /* 610mV 0.01V */
120 if (IS_RANGE(mode0, 1300, 1700) && IS_RANGE(mode1, 80, 200))
121 hwrev = 0x2; /* 1.16V 0.01V */
122 if (IS_RANGE(mode0, 2000, 2400) && IS_RANGE(mode1, 80, 200))
123 hwrev = 0x3; /* 1.79V 0.01V */
124 #undef IS_RANGE
125
126 debug("mode0: %d, mode1: %d, hwrev 0x%x\n", mode0, mode1, hwrev);
127
128 adc_power_control(0);
129
130 return hwrev;
131 }
132
check_hw_revision(void)133 static void check_hw_revision(void)
134 {
135 int hwrev;
136
137 hwrev = get_hw_revision();
138
139 board_rev |= hwrev;
140 }
141
142 #ifdef CONFIG_USB_GADGET
s5pc210_phy_control(int on)143 static int s5pc210_phy_control(int on)
144 {
145 struct udevice *dev;
146 int ret;
147 u8 reg;
148
149 ret = pmic_get("max8998-pmic", &dev);
150 if (ret) {
151 puts("Failed to get MAX8998!\n");
152 return ret;
153 }
154
155 if (on) {
156 reg = pmic_reg_read(dev, MAX8998_REG_BUCK_ACTIVE_DISCHARGE3);
157 reg |= MAX8998_SAFEOUT1;
158 ret |= pmic_reg_write(dev,
159 MAX8998_REG_BUCK_ACTIVE_DISCHARGE3, reg);
160
161 reg = pmic_reg_read(dev, MAX8998_REG_ONOFF1);
162 reg |= MAX8998_LDO3;
163 ret |= pmic_reg_write(dev, MAX8998_REG_ONOFF1, reg);
164
165 reg = pmic_reg_read(dev, MAX8998_REG_ONOFF2);
166 reg |= MAX8998_LDO8;
167 ret |= pmic_reg_write(dev, MAX8998_REG_ONOFF2, reg);
168
169 } else {
170 reg = pmic_reg_read(dev, MAX8998_REG_ONOFF2);
171 reg &= ~MAX8998_LDO8;
172 ret |= pmic_reg_write(dev, MAX8998_REG_ONOFF2, reg);
173
174 reg = pmic_reg_read(dev, MAX8998_REG_ONOFF1);
175 reg &= ~MAX8998_LDO3;
176 ret |= pmic_reg_write(dev, MAX8998_REG_ONOFF1, reg);
177
178 reg = pmic_reg_read(dev, MAX8998_REG_BUCK_ACTIVE_DISCHARGE3);
179 reg &= ~MAX8998_SAFEOUT1;
180 ret |= pmic_reg_write(dev,
181 MAX8998_REG_BUCK_ACTIVE_DISCHARGE3, reg);
182 }
183
184 if (ret) {
185 puts("MAX8998 LDO setting error!\n");
186 return -EINVAL;
187 }
188
189 return 0;
190 }
191
192 struct dwc2_plat_otg_data s5pc210_otg_data = {
193 .phy_control = s5pc210_phy_control,
194 .regs_phy = EXYNOS4_USBPHY_BASE,
195 .regs_otg = EXYNOS4_USBOTG_BASE,
196 .usb_phy_ctrl = EXYNOS4_USBPHY_CONTROL,
197 .usb_flags = PHY0_SLEEP,
198 };
199 #endif
200
board_usb_init(int index,enum usb_init_type init)201 int board_usb_init(int index, enum usb_init_type init)
202 {
203 debug("USB_udc_probe\n");
204 return dwc2_udc_probe(&s5pc210_otg_data);
205 }
206
exynos_early_init_f(void)207 int exynos_early_init_f(void)
208 {
209 wdt_stop();
210
211 return 0;
212 }
213
init_pmic_lcd(void)214 static int init_pmic_lcd(void)
215 {
216 struct udevice *dev;
217 unsigned char val;
218 int ret = 0;
219
220 ret = pmic_get("max8998-pmic", &dev);
221 if (ret) {
222 puts("Failed to get MAX8998 for init_pmic_lcd()!\n");
223 return ret;
224 }
225
226 /* LDO7 1.8V */
227 val = 0x02; /* (1800 - 1600) / 100; */
228 ret |= pmic_reg_write(dev, MAX8998_REG_LDO7, val);
229
230 /* LDO17 3.0V */
231 val = 0xe; /* (3000 - 1600) / 100; */
232 ret |= pmic_reg_write(dev, MAX8998_REG_LDO17, val);
233
234 /* Disable unneeded regulators */
235 /*
236 * ONOFF1
237 * Buck1 ON, Buck2 OFF, Buck3 ON, Buck4 ON
238 * LDO2 ON, LDO3 OFF, LDO4 OFF, LDO5 ON
239 */
240 val = 0xB9;
241 ret |= pmic_reg_write(dev, MAX8998_REG_ONOFF1, val);
242
243 /* ONOFF2
244 * LDO6 OFF, LDO7 ON, LDO8 OFF, LDO9 ON,
245 * LDO10 OFF, LDO11 OFF, LDO12 OFF, LDO13 OFF
246 */
247 val = 0x50;
248 ret |= pmic_reg_write(dev, MAX8998_REG_ONOFF2, val);
249
250 /* ONOFF3
251 * LDO14 OFF, LDO15 OFF, LGO16 OFF, LDO17 OFF
252 * EPWRHOLD OFF, EBATTMON OFF, ELBCNFG2 OFF, ELBCNFG1 OFF
253 */
254 val = 0x00;
255 ret |= pmic_reg_write(dev, MAX8998_REG_ONOFF3, val);
256
257 if (ret) {
258 puts("LCD pmic initialisation error!\n");
259 return -EINVAL;
260 }
261
262 return 0;
263 }
264
exynos_cfg_lcd_gpio(void)265 void exynos_cfg_lcd_gpio(void)
266 {
267 unsigned int i, f3_end = 4;
268
269 for (i = 0; i < 8; i++) {
270 /* set GPF0,1,2[0:7] for RGB Interface and Data lines (32bit) */
271 gpio_cfg_pin(EXYNOS4_GPIO_F00 + i, S5P_GPIO_FUNC(2));
272 gpio_cfg_pin(EXYNOS4_GPIO_F10 + i, S5P_GPIO_FUNC(2));
273 gpio_cfg_pin(EXYNOS4_GPIO_F20 + i, S5P_GPIO_FUNC(2));
274 /* pull-up/down disable */
275 gpio_set_pull(EXYNOS4_GPIO_F00 + i, S5P_GPIO_PULL_NONE);
276 gpio_set_pull(EXYNOS4_GPIO_F10 + i, S5P_GPIO_PULL_NONE);
277 gpio_set_pull(EXYNOS4_GPIO_F20 + i, S5P_GPIO_PULL_NONE);
278
279 /* drive strength to max (24bit) */
280 gpio_set_drv(EXYNOS4_GPIO_F00 + i, S5P_GPIO_DRV_4X);
281 gpio_set_rate(EXYNOS4_GPIO_F00 + i, S5P_GPIO_DRV_SLOW);
282 gpio_set_drv(EXYNOS4_GPIO_F10 + i, S5P_GPIO_DRV_4X);
283 gpio_set_rate(EXYNOS4_GPIO_F10 + i, S5P_GPIO_DRV_SLOW);
284 gpio_set_drv(EXYNOS4_GPIO_F20 + i, S5P_GPIO_DRV_4X);
285 gpio_set_rate(EXYNOS4_GPIO_F00 + i, S5P_GPIO_DRV_SLOW);
286 }
287
288 for (i = EXYNOS4_GPIO_F30; i < (EXYNOS4_GPIO_F30 + f3_end); i++) {
289 /* set GPF3[0:3] for RGB Interface and Data lines (32bit) */
290 gpio_cfg_pin(i, S5P_GPIO_FUNC(2));
291 /* pull-up/down disable */
292 gpio_set_pull(i, S5P_GPIO_PULL_NONE);
293 /* drive strength to max (24bit) */
294 gpio_set_drv(i, S5P_GPIO_DRV_4X);
295 gpio_set_rate(i, S5P_GPIO_DRV_SLOW);
296 }
297
298 /* gpio pad configuration for LCD reset. */
299 gpio_request(EXYNOS4_GPIO_Y45, "lcd_reset");
300 gpio_cfg_pin(EXYNOS4_GPIO_Y45, S5P_GPIO_OUTPUT);
301 }
302
mipi_power(void)303 int mipi_power(void)
304 {
305 return 0;
306 }
307
exynos_reset_lcd(void)308 void exynos_reset_lcd(void)
309 {
310 gpio_set_value(EXYNOS4_GPIO_Y45, 1);
311 udelay(10000);
312 gpio_set_value(EXYNOS4_GPIO_Y45, 0);
313 udelay(10000);
314 gpio_set_value(EXYNOS4_GPIO_Y45, 1);
315 udelay(100);
316 }
317
exynos_lcd_power_on(void)318 void exynos_lcd_power_on(void)
319 {
320 struct udevice *dev;
321 int ret;
322 u8 reg;
323
324 ret = pmic_get("max8998-pmic", &dev);
325 if (ret) {
326 puts("Failed to get MAX8998!\n");
327 return;
328 }
329
330 reg = pmic_reg_read(dev, MAX8998_REG_ONOFF3);
331 reg |= MAX8998_LDO17;
332 ret = pmic_reg_write(dev, MAX8998_REG_ONOFF3, reg);
333 if (ret) {
334 puts("MAX8998 LDO setting error\n");
335 return;
336 }
337
338 reg = pmic_reg_read(dev, MAX8998_REG_ONOFF2);
339 reg |= MAX8998_LDO7;
340 ret = pmic_reg_write(dev, MAX8998_REG_ONOFF2, reg);
341 if (ret) {
342 puts("MAX8998 LDO setting error\n");
343 return;
344 }
345 }
346
exynos_cfg_ldo(void)347 void exynos_cfg_ldo(void)
348 {
349 ld9040_cfg_ldo();
350 }
351
exynos_enable_ldo(unsigned int onoff)352 void exynos_enable_ldo(unsigned int onoff)
353 {
354 ld9040_enable_ldo(onoff);
355 }
356
exynos_init(void)357 int exynos_init(void)
358 {
359 gd->bd->bi_arch_number = MACH_TYPE_UNIVERSAL_C210;
360
361 switch (get_hwrev()) {
362 case 0:
363 /*
364 * Set the low to enable LDO_EN
365 * But when you use the test board for eMMC booting
366 * you should set it HIGH since it removes the inverter
367 */
368 /* MASSMEMORY_EN: XMDMDATA_6: GPE3[6] */
369 gpio_request(EXYNOS4_GPIO_E36, "ldo_en");
370 gpio_direction_output(EXYNOS4_GPIO_E36, 0);
371 break;
372 default:
373 /*
374 * Default reset state is High and there's no inverter
375 * But set it as HIGH to ensure
376 */
377 /* MASSMEMORY_EN: XMDMADDR_3: GPE1[3] */
378 gpio_request(EXYNOS4_GPIO_E13, "massmemory_en");
379 gpio_direction_output(EXYNOS4_GPIO_E13, 1);
380 break;
381 }
382
383 check_hw_revision();
384 printf("HW Revision:\t0x%x\n", board_rev);
385
386 return 0;
387 }
388
389 #ifdef CONFIG_LCD
exynos_lcd_misc_init(vidinfo_t * vid)390 void exynos_lcd_misc_init(vidinfo_t *vid)
391 {
392 #ifdef CONFIG_TIZEN
393 get_tizen_logo_info(vid);
394 #endif
395
396 /* for LD9040. */
397 vid->pclk_name = 1; /* MPLL */
398 vid->sclk_div = 1;
399
400 env_set("lcdinfo", "lcd=ld9040");
401 }
402 #endif
403