| 606b7430 | 14-Sep-2022 |
Wing Li <wingers@google.com> |
feat(psci): add support for OS-initiated mode
This patch adds a `psci_validate_state_coordination` function that is called by `psci_cpu_suspend_start` in OS-initiated mode.
This function validates
feat(psci): add support for OS-initiated mode
This patch adds a `psci_validate_state_coordination` function that is called by `psci_cpu_suspend_start` in OS-initiated mode.
This function validates the request per sections 4.2.3.2, 5.4.5, and 6.3 of the PSCI spec (DEN0022D.b): - The requested power states are consistent with the system's state - The calling core is the last running core at the requested power level
This function differs from `psci_do_state_coordination` in that: - The `psci_req_local_pwr_states` map is not modified if the request were to be denied - The `state_info` argument is never modified since it contains the power states requested by the calling OS
This is conditionally compiled into the build depending on the value of the `PSCI_OS_INIT_MODE` build option.
Change-Id: I667041c842d2856e9d128c98db4d5ae4e4552df3 Signed-off-by: Wing Li <wingers@google.com>
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| aea4ccf8 | 09-Dec-2022 |
Harrison Mutai <harrison.mutai@arm.com> |
fix(cpus): workaround for Cortex-A510 erratum 2684597
Cortex-A510 erratum 2684597 is a Cat B erratum that applies to revisions r0p0, r0p1, r0p2, r0p3, r1p0, r1p1 and r1p2. It is fixed in r1p3. The w
fix(cpus): workaround for Cortex-A510 erratum 2684597
Cortex-A510 erratum 2684597 is a Cat B erratum that applies to revisions r0p0, r0p1, r0p2, r0p3, r1p0, r1p1 and r1p2. It is fixed in r1p3. The workaround is to execute a TSB CSYNC and DSB before executing WFI for power down.
SDEN can be found here: https://developer.arm.com/documentation/SDEN1873361/latest https://developer.arm.com/documentation/SDEN1873351/latest
Change-Id: Ic0b24b600bc013eb59c797401fbdc9bda8058d6d Signed-off-by: Harrison Mutai <harrison.mutai@arm.com>
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