1# 2# Copyright (c) 2013-2023, Arm Limited and Contributors. All rights reserved. 3# 4# SPDX-License-Identifier: BSD-3-Clause 5# 6 7include common/fdt_wrappers.mk 8 9# Use the GICv3 driver on the FVP by default 10FVP_USE_GIC_DRIVER := FVP_GICV3 11 12# Default cluster count for FVP 13FVP_CLUSTER_COUNT := 2 14 15# Default number of CPUs per cluster on FVP 16FVP_MAX_CPUS_PER_CLUSTER := 4 17 18# Default number of threads per CPU on FVP 19FVP_MAX_PE_PER_CPU := 1 20 21# Disable redistributor frame of inactive/fused CPU cores by marking it as read 22# only; enable redistributor frames of all CPU cores by default. 23FVP_GICR_REGION_PROTECTION := 0 24 25FVP_DT_PREFIX := fvp-base-gicv3-psci 26 27# This is a very trickly TEMPORARY fix. Enabling ALL features exceeds BL31's 28# progbits limit. We need a way to build all useful configurations while waiting 29# on the fvp to increase its SRAM size. The problem is twofild: 30# 1. the cleanup that introduced these enables cleaned up tf-a a little too 31# well and things that previously (incorrectly) were enabled, no longer are. 32# A bunch of CI configs build subtly incorrectly and this combo makes it 33# necessary to forcefully and unconditionally enable them here. 34# 2. the progbits limit is exceeded only when the tsp is involved. However, 35# there are tsp CI configs that run on very high architecture revisions so 36# disabling everything isn't an option. 37# The fix is to enable everything, as before. When the tsp is included, though, 38# we need to slim the size down. In that case, disable all optional features, 39# that will not be present in CI when the tsp is. 40# TODO: make all of this unconditional (or only base the condition on 41# ARM_ARCH_* when the makefile supports it). 42ifneq (${SPD}, tspd) 43 ENABLE_FEAT_AMU := 2 44 ENABLE_FEAT_AMUv1p1 := 2 45 ENABLE_FEAT_HCX := 2 46 ENABLE_MPAM_FOR_LOWER_ELS := 2 47 ENABLE_FEAT_RNG := 2 48 ENABLE_FEAT_TWED := 2 49ifeq (${ARCH},aarch64) 50ifeq (${SPM_MM}, 0) 51ifeq (${ENABLE_RME}, 0) 52ifeq (${CTX_INCLUDE_FPREGS}, 0) 53 ENABLE_SME_FOR_NS := 2 54endif 55endif 56endif 57endif 58endif 59 60# enable unconditionally for all builds 61ifeq (${ARCH}, aarch64) 62ifeq (${ENABLE_RME},0) 63 ENABLE_BRBE_FOR_NS := 2 64endif 65endif 66ENABLE_TRBE_FOR_NS := 2 67ENABLE_SYS_REG_TRACE_FOR_NS := 2 68ENABLE_FEAT_CSV2_2 := 2 69ENABLE_FEAT_PAN := 2 70ENABLE_FEAT_VHE := 2 71CTX_INCLUDE_NEVE_REGS := 2 72ENABLE_FEAT_SEL2 := 2 73ENABLE_TRF_FOR_NS := 2 74ENABLE_FEAT_ECV := 2 75ENABLE_FEAT_FGT := 2 76ENABLE_FEAT_TCR2 := 2 77 78# The FVP platform depends on this macro to build with correct GIC driver. 79$(eval $(call add_define,FVP_USE_GIC_DRIVER)) 80 81# Pass FVP_CLUSTER_COUNT to the build system. 82$(eval $(call add_define,FVP_CLUSTER_COUNT)) 83 84# Pass FVP_MAX_CPUS_PER_CLUSTER to the build system. 85$(eval $(call add_define,FVP_MAX_CPUS_PER_CLUSTER)) 86 87# Pass FVP_MAX_PE_PER_CPU to the build system. 88$(eval $(call add_define,FVP_MAX_PE_PER_CPU)) 89 90# Pass FVP_GICR_REGION_PROTECTION to the build system. 91$(eval $(call add_define,FVP_GICR_REGION_PROTECTION)) 92 93# Sanity check the cluster count and if FVP_CLUSTER_COUNT <= 2, 94# choose the CCI driver , else the CCN driver 95ifeq ($(FVP_CLUSTER_COUNT), 0) 96$(error "Incorrect cluster count specified for FVP port") 97else ifeq ($(FVP_CLUSTER_COUNT),$(filter $(FVP_CLUSTER_COUNT),1 2)) 98FVP_INTERCONNECT_DRIVER := FVP_CCI 99else 100FVP_INTERCONNECT_DRIVER := FVP_CCN 101endif 102 103$(eval $(call add_define,FVP_INTERCONNECT_DRIVER)) 104 105# Choose the GIC sources depending upon the how the FVP will be invoked 106ifeq (${FVP_USE_GIC_DRIVER}, FVP_GICV3) 107 108# The GIC model (GIC-600 or GIC-500) will be detected at runtime 109GICV3_SUPPORT_GIC600 := 1 110GICV3_OVERRIDE_DISTIF_PWR_OPS := 1 111 112# Include GICv3 driver files 113include drivers/arm/gic/v3/gicv3.mk 114 115FVP_GIC_SOURCES := ${GICV3_SOURCES} \ 116 plat/common/plat_gicv3.c \ 117 plat/arm/common/arm_gicv3.c 118 119 ifeq ($(filter 1,${RESET_TO_BL2} \ 120 ${RESET_TO_BL31} ${RESET_TO_SP_MIN}),) 121 FVP_GIC_SOURCES += plat/arm/board/fvp/fvp_gicv3.c 122 endif 123 124else ifeq (${FVP_USE_GIC_DRIVER}, FVP_GICV2) 125 126# No GICv4 extension 127GIC_ENABLE_V4_EXTN := 0 128$(eval $(call add_define,GIC_ENABLE_V4_EXTN)) 129 130# Include GICv2 driver files 131include drivers/arm/gic/v2/gicv2.mk 132 133FVP_GIC_SOURCES := ${GICV2_SOURCES} \ 134 plat/common/plat_gicv2.c \ 135 plat/arm/common/arm_gicv2.c 136 137FVP_DT_PREFIX := fvp-base-gicv2-psci 138else 139$(error "Incorrect GIC driver chosen on FVP port") 140endif 141 142ifeq (${FVP_INTERCONNECT_DRIVER}, FVP_CCI) 143FVP_INTERCONNECT_SOURCES := drivers/arm/cci/cci.c 144else ifeq (${FVP_INTERCONNECT_DRIVER}, FVP_CCN) 145FVP_INTERCONNECT_SOURCES := drivers/arm/ccn/ccn.c \ 146 plat/arm/common/arm_ccn.c 147else 148$(error "Incorrect CCN driver chosen on FVP port") 149endif 150 151FVP_SECURITY_SOURCES := drivers/arm/tzc/tzc400.c \ 152 plat/arm/board/fvp/fvp_security.c \ 153 plat/arm/common/arm_tzc400.c 154 155 156PLAT_INCLUDES := -Iplat/arm/board/fvp/include \ 157 -Iinclude/lib/psa 158 159 160PLAT_BL_COMMON_SOURCES := plat/arm/board/fvp/fvp_common.c 161 162FVP_CPU_LIBS := lib/cpus/${ARCH}/aem_generic.S 163 164ifeq (${ARCH}, aarch64) 165 166# select a different set of CPU files, depending on whether we compile for 167# hardware assisted coherency cores or not 168ifeq (${HW_ASSISTED_COHERENCY}, 0) 169# Cores used without DSU 170 FVP_CPU_LIBS += lib/cpus/aarch64/cortex_a35.S \ 171 lib/cpus/aarch64/cortex_a53.S \ 172 lib/cpus/aarch64/cortex_a57.S \ 173 lib/cpus/aarch64/cortex_a72.S \ 174 lib/cpus/aarch64/cortex_a73.S 175else 176# Cores used with DSU only 177 ifeq (${CTX_INCLUDE_AARCH32_REGS}, 0) 178 # AArch64-only cores 179 FVP_CPU_LIBS += lib/cpus/aarch64/cortex_a76.S \ 180 lib/cpus/aarch64/cortex_a76ae.S \ 181 lib/cpus/aarch64/cortex_a77.S \ 182 lib/cpus/aarch64/cortex_a78.S \ 183 lib/cpus/aarch64/neoverse_n_common.S \ 184 lib/cpus/aarch64/neoverse_n1.S \ 185 lib/cpus/aarch64/neoverse_n2.S \ 186 lib/cpus/aarch64/neoverse_e1.S \ 187 lib/cpus/aarch64/neoverse_v1.S \ 188 lib/cpus/aarch64/neoverse_v2.S \ 189 lib/cpus/aarch64/cortex_a78_ae.S \ 190 lib/cpus/aarch64/cortex_a510.S \ 191 lib/cpus/aarch64/cortex_a710.S \ 192 lib/cpus/aarch64/cortex_a715.S \ 193 lib/cpus/aarch64/cortex_x3.S \ 194 lib/cpus/aarch64/cortex_a65.S \ 195 lib/cpus/aarch64/cortex_a65ae.S \ 196 lib/cpus/aarch64/cortex_a78c.S \ 197 lib/cpus/aarch64/cortex_hayes.S \ 198 lib/cpus/aarch64/cortex_hunter.S \ 199 lib/cpus/aarch64/cortex_hunter_elp_arm.S \ 200 lib/cpus/aarch64/cortex_x2.S \ 201 lib/cpus/aarch64/neoverse_poseidon.S 202 endif 203 # AArch64/AArch32 cores 204 FVP_CPU_LIBS += lib/cpus/aarch64/cortex_a55.S \ 205 lib/cpus/aarch64/cortex_a75.S 206endif 207 208else 209FVP_CPU_LIBS += lib/cpus/aarch32/cortex_a32.S \ 210 lib/cpus/aarch32/cortex_a57.S 211endif 212 213BL1_SOURCES += drivers/arm/smmu/smmu_v3.c \ 214 drivers/arm/sp805/sp805.c \ 215 drivers/delay_timer/delay_timer.c \ 216 drivers/io/io_semihosting.c \ 217 lib/semihosting/semihosting.c \ 218 lib/semihosting/${ARCH}/semihosting_call.S \ 219 plat/arm/board/fvp/${ARCH}/fvp_helpers.S \ 220 plat/arm/board/fvp/fvp_bl1_setup.c \ 221 plat/arm/board/fvp/fvp_err.c \ 222 plat/arm/board/fvp/fvp_io_storage.c \ 223 ${FVP_CPU_LIBS} \ 224 ${FVP_INTERCONNECT_SOURCES} 225 226ifeq (${USE_SP804_TIMER},1) 227BL1_SOURCES += drivers/arm/sp804/sp804_delay_timer.c 228else 229BL1_SOURCES += drivers/delay_timer/generic_delay_timer.c 230endif 231 232 233BL2_SOURCES += drivers/arm/sp805/sp805.c \ 234 drivers/io/io_semihosting.c \ 235 lib/utils/mem_region.c \ 236 lib/semihosting/semihosting.c \ 237 lib/semihosting/${ARCH}/semihosting_call.S \ 238 plat/arm/board/fvp/fvp_bl2_setup.c \ 239 plat/arm/board/fvp/fvp_err.c \ 240 plat/arm/board/fvp/fvp_io_storage.c \ 241 plat/arm/common/arm_nor_psci_mem_protect.c \ 242 ${FVP_SECURITY_SOURCES} 243 244 245ifeq (${COT_DESC_IN_DTB},1) 246BL2_SOURCES += plat/arm/common/fconf/fconf_nv_cntr_getter.c 247endif 248 249ifeq (${ENABLE_RME},1) 250BL2_SOURCES += plat/arm/board/fvp/aarch64/fvp_helpers.S 251 252BL31_SOURCES += plat/arm/board/fvp/fvp_plat_attest_token.c \ 253 plat/arm/board/fvp/fvp_realm_attest_key.c 254 255# FVP platform does not support RSS, but it can leverage RSS APIs to 256# provide hardcoded token/key on request. 257BL31_SOURCES += lib/psa/delegated_attestation.c 258 259endif 260 261ifeq (${ENABLE_FEAT_RNG_TRAP},1) 262BL31_SOURCES += plat/arm/board/fvp/fvp_sync_traps.c 263endif 264 265ifeq (${RESET_TO_BL2},1) 266BL2_SOURCES += plat/arm/board/fvp/${ARCH}/fvp_helpers.S \ 267 plat/arm/board/fvp/fvp_bl2_el3_setup.c \ 268 ${FVP_CPU_LIBS} \ 269 ${FVP_INTERCONNECT_SOURCES} 270endif 271 272ifeq (${USE_SP804_TIMER},1) 273BL2_SOURCES += drivers/arm/sp804/sp804_delay_timer.c 274endif 275 276BL2U_SOURCES += plat/arm/board/fvp/fvp_bl2u_setup.c \ 277 ${FVP_SECURITY_SOURCES} 278 279ifeq (${USE_SP804_TIMER},1) 280BL2U_SOURCES += drivers/arm/sp804/sp804_delay_timer.c 281endif 282 283BL31_SOURCES += drivers/arm/fvp/fvp_pwrc.c \ 284 drivers/arm/smmu/smmu_v3.c \ 285 drivers/delay_timer/delay_timer.c \ 286 drivers/cfi/v2m/v2m_flash.c \ 287 lib/utils/mem_region.c \ 288 plat/arm/board/fvp/fvp_bl31_setup.c \ 289 plat/arm/board/fvp/fvp_console.c \ 290 plat/arm/board/fvp/fvp_pm.c \ 291 plat/arm/board/fvp/fvp_topology.c \ 292 plat/arm/board/fvp/aarch64/fvp_helpers.S \ 293 plat/arm/common/arm_nor_psci_mem_protect.c \ 294 ${FVP_CPU_LIBS} \ 295 ${FVP_GIC_SOURCES} \ 296 ${FVP_INTERCONNECT_SOURCES} \ 297 ${FVP_SECURITY_SOURCES} 298 299# Support for fconf in BL31 300# Added separately from the above list for better readability 301ifeq ($(filter 1,${RESET_TO_BL2} ${RESET_TO_BL31}),) 302BL31_SOURCES += lib/fconf/fconf.c \ 303 lib/fconf/fconf_dyn_cfg_getter.c \ 304 plat/arm/board/fvp/fconf/fconf_hw_config_getter.c 305 306BL31_SOURCES += ${FDT_WRAPPERS_SOURCES} 307 308ifeq (${SEC_INT_DESC_IN_FCONF},1) 309BL31_SOURCES += plat/arm/common/fconf/fconf_sec_intr_config.c 310endif 311 312endif 313 314ifeq (${USE_SP804_TIMER},1) 315BL31_SOURCES += drivers/arm/sp804/sp804_delay_timer.c 316else 317BL31_SOURCES += drivers/delay_timer/generic_delay_timer.c 318endif 319 320# Add the FDT_SOURCES and options for Dynamic Config (only for Unix env) 321ifdef UNIX_MK 322FVP_HW_CONFIG_DTS := fdts/${FVP_DT_PREFIX}.dts 323FDT_SOURCES += $(addprefix plat/arm/board/fvp/fdts/, \ 324 ${PLAT}_fw_config.dts \ 325 ${PLAT}_tb_fw_config.dts \ 326 ${PLAT}_soc_fw_config.dts \ 327 ${PLAT}_nt_fw_config.dts \ 328 ) 329 330FVP_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_fw_config.dtb 331FVP_TB_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_tb_fw_config.dtb 332FVP_SOC_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_soc_fw_config.dtb 333FVP_NT_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_nt_fw_config.dtb 334 335ifeq (${SPD},tspd) 336FDT_SOURCES += plat/arm/board/fvp/fdts/${PLAT}_tsp_fw_config.dts 337FVP_TOS_FW_CONFIG := ${BUILD_PLAT}/fdts/${PLAT}_tsp_fw_config.dtb 338 339# Add the TOS_FW_CONFIG to FIP and specify the same to certtool 340$(eval $(call TOOL_ADD_PAYLOAD,${FVP_TOS_FW_CONFIG},--tos-fw-config,${FVP_TOS_FW_CONFIG})) 341endif 342 343ifeq (${SPD},spmd) 344 345ifeq ($(ARM_SPMC_MANIFEST_DTS),) 346ARM_SPMC_MANIFEST_DTS := plat/arm/board/fvp/fdts/${PLAT}_spmc_manifest.dts 347endif 348 349FDT_SOURCES += ${ARM_SPMC_MANIFEST_DTS} 350FVP_TOS_FW_CONFIG := ${BUILD_PLAT}/fdts/$(notdir $(basename ${ARM_SPMC_MANIFEST_DTS})).dtb 351 352# Add the TOS_FW_CONFIG to FIP and specify the same to certtool 353$(eval $(call TOOL_ADD_PAYLOAD,${FVP_TOS_FW_CONFIG},--tos-fw-config,${FVP_TOS_FW_CONFIG})) 354endif 355 356# Add the FW_CONFIG to FIP and specify the same to certtool 357$(eval $(call TOOL_ADD_PAYLOAD,${FVP_FW_CONFIG},--fw-config,${FVP_FW_CONFIG})) 358# Add the TB_FW_CONFIG to FIP and specify the same to certtool 359$(eval $(call TOOL_ADD_PAYLOAD,${FVP_TB_FW_CONFIG},--tb-fw-config,${FVP_TB_FW_CONFIG})) 360# Add the SOC_FW_CONFIG to FIP and specify the same to certtool 361$(eval $(call TOOL_ADD_PAYLOAD,${FVP_SOC_FW_CONFIG},--soc-fw-config,${FVP_SOC_FW_CONFIG})) 362# Add the NT_FW_CONFIG to FIP and specify the same to certtool 363$(eval $(call TOOL_ADD_PAYLOAD,${FVP_NT_FW_CONFIG},--nt-fw-config,${FVP_NT_FW_CONFIG})) 364 365FDT_SOURCES += ${FVP_HW_CONFIG_DTS} 366$(eval FVP_HW_CONFIG := ${BUILD_PLAT}/$(patsubst %.dts,%.dtb,$(FVP_HW_CONFIG_DTS))) 367 368# Add the HW_CONFIG to FIP and specify the same to certtool 369$(eval $(call TOOL_ADD_PAYLOAD,${FVP_HW_CONFIG},--hw-config,${FVP_HW_CONFIG})) 370endif 371 372# Enable dynamic mitigation support by default 373DYNAMIC_WORKAROUND_CVE_2018_3639 := 1 374 375ifneq (${ENABLE_FEAT_AMU},0) 376BL31_SOURCES += lib/cpus/aarch64/cpuamu.c \ 377 lib/cpus/aarch64/cpuamu_helpers.S 378 379ifeq (${HW_ASSISTED_COHERENCY}, 1) 380BL31_SOURCES += lib/cpus/aarch64/cortex_a75_pubsub.c \ 381 lib/cpus/aarch64/neoverse_n1_pubsub.c 382endif 383endif 384 385ifeq (${RAS_EXTENSION},1) 386BL31_SOURCES += plat/arm/board/fvp/aarch64/fvp_ras.c 387endif 388 389ifneq (${ENABLE_STACK_PROTECTOR},0) 390PLAT_BL_COMMON_SOURCES += plat/arm/board/fvp/fvp_stack_protector.c 391endif 392 393ifeq (${ARCH},aarch32) 394 NEED_BL32 := yes 395endif 396 397# Enable the dynamic translation tables library. 398ifeq ($(filter 1,${RESET_TO_BL2} ${ARM_XLAT_TABLES_LIB_V1}),) 399 ifeq (${ARCH},aarch32) 400 BL32_CPPFLAGS += -DPLAT_XLAT_TABLES_DYNAMIC 401 else # AArch64 402 BL31_CPPFLAGS += -DPLAT_XLAT_TABLES_DYNAMIC 403 endif 404endif 405 406ifeq (${ALLOW_RO_XLAT_TABLES}, 1) 407 ifeq (${ARCH},aarch32) 408 BL32_CPPFLAGS += -DPLAT_RO_XLAT_TABLES 409 else # AArch64 410 BL31_CPPFLAGS += -DPLAT_RO_XLAT_TABLES 411 ifeq (${SPD},tspd) 412 BL32_CPPFLAGS += -DPLAT_RO_XLAT_TABLES 413 endif 414 endif 415endif 416 417ifeq (${USE_DEBUGFS},1) 418 BL31_CPPFLAGS += -DPLAT_XLAT_TABLES_DYNAMIC 419endif 420 421# Add support for platform supplied linker script for BL31 build 422$(eval $(call add_define,PLAT_EXTRA_LD_SCRIPT)) 423 424ifneq (${RESET_TO_BL2}, 0) 425 override BL1_SOURCES = 426endif 427 428# RSS is not supported on FVP right now. Thus, we use the mocked version 429# of the provided PSA APIs. They return with success and hard-coded token/key. 430PLAT_RSS_NOT_SUPPORTED := 1 431 432# Include Measured Boot makefile before any Crypto library makefile. 433# Crypto library makefile may need default definitions of Measured Boot build 434# flags present in Measured Boot makefile. 435ifeq (${MEASURED_BOOT},1) 436 RSS_MEASURED_BOOT_MK := drivers/measured_boot/rss/rss_measured_boot.mk 437 $(info Including ${RSS_MEASURED_BOOT_MK}) 438 include ${RSS_MEASURED_BOOT_MK} 439 440 ifneq (${MBOOT_RSS_HASH_ALG}, sha256) 441 $(eval $(call add_define,TF_MBEDTLS_MBOOT_USE_SHA512)) 442 endif 443 444 BL1_SOURCES += ${MEASURED_BOOT_SOURCES} 445 BL2_SOURCES += ${MEASURED_BOOT_SOURCES} 446endif 447 448include plat/arm/board/common/board_common.mk 449include plat/arm/common/arm_common.mk 450 451ifeq (${MEASURED_BOOT},1) 452BL1_SOURCES += plat/arm/board/fvp/fvp_common_measured_boot.c \ 453 plat/arm/board/fvp/fvp_bl1_measured_boot.c \ 454 lib/psa/measured_boot.c 455 456BL2_SOURCES += plat/arm/board/fvp/fvp_common_measured_boot.c \ 457 plat/arm/board/fvp/fvp_bl2_measured_boot.c \ 458 lib/psa/measured_boot.c 459 460# Even though RSS is not supported on FVP (see above), we support overriding 461# PLAT_RSS_NOT_SUPPORTED from the command line, just for the purpose of building 462# the code to detect any build regressions. The resulting firmware will not be 463# functional. 464ifneq (${PLAT_RSS_NOT_SUPPORTED},1) 465 $(warning "RSS is not supported on FVP. The firmware will not be functional.") 466 include drivers/arm/rss/rss_comms.mk 467 BL1_SOURCES += ${RSS_COMMS_SOURCES} 468 BL2_SOURCES += ${RSS_COMMS_SOURCES} 469 BL31_SOURCES += ${RSS_COMMS_SOURCES} 470 471 BL1_CFLAGS += -DPLAT_RSS_COMMS_PAYLOAD_MAX_SIZE=0 472 BL2_CFLAGS += -DPLAT_RSS_COMMS_PAYLOAD_MAX_SIZE=0 473 BL31_CFLAGS += -DPLAT_RSS_COMMS_PAYLOAD_MAX_SIZE=0 474endif 475 476endif 477 478ifeq (${DRTM_SUPPORT}, 1) 479BL31_SOURCES += plat/arm/board/fvp/fvp_drtm_addr.c \ 480 plat/arm/board/fvp/fvp_drtm_dma_prot.c \ 481 plat/arm/board/fvp/fvp_drtm_err.c \ 482 plat/arm/board/fvp/fvp_drtm_measurement.c \ 483 plat/arm/board/fvp/fvp_drtm_stub.c \ 484 plat/arm/common/arm_dyn_cfg.c \ 485 plat/arm/board/fvp/fvp_err.c 486endif 487 488ifeq (${TRUSTED_BOARD_BOOT}, 1) 489BL1_SOURCES += plat/arm/board/fvp/fvp_trusted_boot.c 490BL2_SOURCES += plat/arm/board/fvp/fvp_trusted_boot.c 491 492# FVP being a development platform, enable capability to disable Authentication 493# dynamically if TRUSTED_BOARD_BOOT is set. 494DYN_DISABLE_AUTH := 1 495endif 496 497ifeq (${SPMC_AT_EL3}, 1) 498PLAT_BL_COMMON_SOURCES += plat/arm/board/fvp/fvp_el3_spmc.c 499endif 500 501PSCI_OS_INIT_MODE := 1 502