1# 2# Copyright (c) 2013-2019, ARM Limited and Contributors. All rights reserved. 3# 4# SPDX-License-Identifier: BSD-3-Clause 5# 6 7# Use the GICv2 driver on QEMU by default 8QEMU_USE_GIC_DRIVER := QEMU_GICV2 9 10ifeq (${ARM_ARCH_MAJOR},7) 11# ARMv7 Qemu support in trusted firmware expects the Cortex-A15 model. 12# Qemu Cortex-A15 model does not implement the virtualization extension. 13# For this reason, we cannot set ARM_CORTEX_A15=yes and must define all 14# the ARMv7 build directives. 15MARCH32_DIRECTIVE := -mcpu=cortex-a15 16$(eval $(call add_define,ARMV7_SUPPORTS_LARGE_PAGE_ADDRESSING)) 17$(eval $(call add_define,ARMV7_SUPPORTS_GENERIC_TIMER)) 18$(eval $(call add_define,ARMV7_SUPPORTS_VFP)) 19# Qemu expects a BL32 boot stage. 20NEED_BL32 := yes 21endif # ARMv7 22 23ifeq (${SPD},opteed) 24add-lib-optee := yes 25endif 26ifeq ($(AARCH32_SP),optee) 27add-lib-optee := yes 28endif 29 30include lib/libfdt/libfdt.mk 31 32ifeq ($(NEED_BL32),yes) 33$(eval $(call add_define,QEMU_LOAD_BL32)) 34endif 35 36PLAT_QEMU_PATH := plat/qemu/qemu 37PLAT_QEMU_COMMON_PATH := plat/qemu/common 38PLAT_INCLUDES := -Iinclude/plat/arm/common/ \ 39 -I${PLAT_QEMU_COMMON_PATH}/include \ 40 -I${PLAT_QEMU_PATH}/include \ 41 -Iinclude/common/tbbr 42 43ifeq (${ARM_ARCH_MAJOR},8) 44PLAT_INCLUDES += -Iinclude/plat/arm/common/${ARCH} 45endif 46 47PLAT_BL_COMMON_SOURCES := ${PLAT_QEMU_COMMON_PATH}/qemu_common.c \ 48 ${PLAT_QEMU_COMMON_PATH}/qemu_console.c \ 49 drivers/arm/pl011/${ARCH}/pl011_console.S 50 51include lib/xlat_tables_v2/xlat_tables.mk 52PLAT_BL_COMMON_SOURCES += ${XLAT_TABLES_LIB_SRCS} 53 54ifneq (${TRUSTED_BOARD_BOOT},0) 55 56 include drivers/auth/mbedtls/mbedtls_crypto.mk 57 include drivers/auth/mbedtls/mbedtls_x509.mk 58 59 AUTH_SOURCES := drivers/auth/auth_mod.c \ 60 drivers/auth/crypto_mod.c \ 61 drivers/auth/img_parser_mod.c \ 62 drivers/auth/tbbr/tbbr_cot.c 63 64 BL1_SOURCES += ${AUTH_SOURCES} \ 65 bl1/tbbr/tbbr_img_desc.c \ 66 plat/common/tbbr/plat_tbbr.c \ 67 ${PLAT_QEMU_COMMON_PATH}/qemu_trusted_boot.c \ 68 $(PLAT_QEMU_COMMON_PATH)/qemu_rotpk.S 69 70 BL2_SOURCES += ${AUTH_SOURCES} \ 71 plat/common/tbbr/plat_tbbr.c \ 72 ${PLAT_QEMU_COMMON_PATH}/qemu_trusted_boot.c \ 73 $(PLAT_QEMU_COMMON_PATH)/qemu_rotpk.S 74 75 ROT_KEY = $(BUILD_PLAT)/rot_key.pem 76 ROTPK_HASH = $(BUILD_PLAT)/rotpk_sha256.bin 77 78 $(eval $(call add_define_val,ROTPK_HASH,'"$(ROTPK_HASH)"')) 79 80 $(BUILD_PLAT)/bl1/qemu_rotpk.o: $(ROTPK_HASH) 81 $(BUILD_PLAT)/bl2/qemu_rotpk.o: $(ROTPK_HASH) 82 83 certificates: $(ROT_KEY) 84 85 $(ROT_KEY): 86 @echo " OPENSSL $@" 87 $(Q)openssl genrsa 2048 > $@ 2>/dev/null 88 89 $(ROTPK_HASH): $(ROT_KEY) 90 @echo " OPENSSL $@" 91 $(Q)openssl rsa -in $< -pubout -outform DER 2>/dev/null |\ 92 openssl dgst -sha256 -binary > $@ 2>/dev/null 93endif 94 95BL1_SOURCES += drivers/io/io_semihosting.c \ 96 drivers/io/io_storage.c \ 97 drivers/io/io_fip.c \ 98 drivers/io/io_memmap.c \ 99 lib/semihosting/semihosting.c \ 100 lib/semihosting/${ARCH}/semihosting_call.S \ 101 ${PLAT_QEMU_COMMON_PATH}/qemu_io_storage.c \ 102 ${PLAT_QEMU_COMMON_PATH}/${ARCH}/plat_helpers.S \ 103 ${PLAT_QEMU_COMMON_PATH}/qemu_bl1_setup.c 104 105ifeq (${ARM_ARCH_MAJOR},8) 106BL1_SOURCES += lib/cpus/aarch64/aem_generic.S \ 107 lib/cpus/aarch64/cortex_a53.S \ 108 lib/cpus/aarch64/cortex_a57.S 109else 110BL1_SOURCES += lib/cpus/${ARCH}/cortex_a15.S 111endif 112 113BL2_SOURCES += drivers/io/io_semihosting.c \ 114 drivers/io/io_storage.c \ 115 drivers/io/io_fip.c \ 116 drivers/io/io_memmap.c \ 117 lib/semihosting/semihosting.c \ 118 lib/semihosting/${ARCH}/semihosting_call.S \ 119 ${PLAT_QEMU_COMMON_PATH}/qemu_io_storage.c \ 120 ${PLAT_QEMU_COMMON_PATH}/${ARCH}/plat_helpers.S \ 121 ${PLAT_QEMU_COMMON_PATH}/qemu_bl2_setup.c \ 122 ${PLAT_QEMU_COMMON_PATH}/qemu_bl2_mem_params_desc.c \ 123 ${PLAT_QEMU_COMMON_PATH}/qemu_image_load.c \ 124 common/fdt_fixup.c \ 125 common/desc_image_load.c 126 127ifeq ($(add-lib-optee),yes) 128BL2_SOURCES += lib/optee/optee_utils.c 129endif 130 131QEMU_GICV2_SOURCES := drivers/arm/gic/v2/gicv2_helpers.c \ 132 drivers/arm/gic/v2/gicv2_main.c \ 133 drivers/arm/gic/common/gic_common.c \ 134 plat/common/plat_gicv2.c \ 135 ${PLAT_QEMU_COMMON_PATH}/qemu_gicv2.c 136 137QEMU_GICV3_SOURCES := drivers/arm/gic/v3/gicv3_helpers.c \ 138 drivers/arm/gic/v3/gicv3_main.c \ 139 drivers/arm/gic/common/gic_common.c \ 140 plat/common/plat_gicv3.c \ 141 ${PLAT_QEMU_COMMON_PATH}/qemu_gicv3.c 142 143ifeq (${QEMU_USE_GIC_DRIVER}, QEMU_GICV2) 144QEMU_GIC_SOURCES := ${QEMU_GICV2_SOURCES} 145else ifeq (${QEMU_USE_GIC_DRIVER}, QEMU_GICV3) 146QEMU_GIC_SOURCES := ${QEMU_GICV3_SOURCES} 147else 148$(error "Incorrect GIC driver chosen for QEMU platform") 149endif 150 151ifeq (${ARM_ARCH_MAJOR},8) 152BL31_SOURCES += lib/cpus/aarch64/aem_generic.S \ 153 lib/cpus/aarch64/cortex_a53.S \ 154 lib/cpus/aarch64/cortex_a57.S \ 155 lib/semihosting/semihosting.c \ 156 lib/semihosting/${ARCH}/semihosting_call.S \ 157 plat/common/plat_psci_common.c \ 158 ${PLAT_QEMU_COMMON_PATH}/qemu_pm.c \ 159 ${PLAT_QEMU_COMMON_PATH}/topology.c \ 160 ${PLAT_QEMU_COMMON_PATH}/aarch64/plat_helpers.S \ 161 ${PLAT_QEMU_COMMON_PATH}/qemu_bl31_setup.c \ 162 ${QEMU_GIC_SOURCES} 163endif 164 165# Add the build options to pack Trusted OS Extra1 and Trusted OS Extra2 images 166# in the FIP if the platform requires. 167ifneq ($(BL32_EXTRA1),) 168$(eval $(call TOOL_ADD_IMG,bl32_extra1,--tos-fw-extra1)) 169endif 170ifneq ($(BL32_EXTRA2),) 171$(eval $(call TOOL_ADD_IMG,bl32_extra2,--tos-fw-extra2)) 172endif 173 174SEPARATE_CODE_AND_RODATA := 1 175ENABLE_STACK_PROTECTOR := 0 176ifneq ($(ENABLE_STACK_PROTECTOR), 0) 177 PLAT_BL_COMMON_SOURCES += ${PLAT_QEMU_COMMON_PATH}/qemu_stack_protector.c 178endif 179 180BL32_RAM_LOCATION := tdram 181ifeq (${BL32_RAM_LOCATION}, tsram) 182 BL32_RAM_LOCATION_ID = SEC_SRAM_ID 183else ifeq (${BL32_RAM_LOCATION}, tdram) 184 BL32_RAM_LOCATION_ID = SEC_DRAM_ID 185else 186 $(error "Unsupported BL32_RAM_LOCATION value") 187endif 188 189# Process flags 190$(eval $(call add_define,BL32_RAM_LOCATION_ID)) 191 192# Don't have the Linux kernel as a BL33 image by default 193ARM_LINUX_KERNEL_AS_BL33 := 0 194$(eval $(call assert_boolean,ARM_LINUX_KERNEL_AS_BL33)) 195$(eval $(call add_define,ARM_LINUX_KERNEL_AS_BL33)) 196 197ARM_PRELOADED_DTB_BASE := PLAT_QEMU_DT_BASE 198$(eval $(call add_define,ARM_PRELOADED_DTB_BASE)) 199 200# Do not enable SVE 201ENABLE_SVE_FOR_NS := 0 202