xref: /rk3399_ARM-atf/plat/socionext/uniphier/platform.mk (revision 33e8c56973b553ae28075e928db79a1c90a34aa3)
1#
2# Copyright (c) 2017-2020, ARM Limited and Contributors. All rights reserved.
3#
4# SPDX-License-Identifier: BSD-3-Clause
5#
6
7override BL2_AT_EL3			:= 1
8override COLD_BOOT_SINGLE_CPU		:= 1
9override PROGRAMMABLE_RESET_ADDRESS	:= 1
10override USE_COHERENT_MEM		:= 1
11override ENABLE_SVE_FOR_NS		:= 0
12
13# Disabling ENABLE_PIE saves memory footprint a lot, but you need to adjust
14# UNIPHIER_MEM_BASE so that all TF images are loaded at their link addresses.
15override ENABLE_PIE			:= 1
16
17# Cortex-A53 revision r0p4-51rel0
18# needed for LD20, unneeded for LD11, PXs3 (no ACE)
19ERRATA_A53_855873		:= 1
20
21FIP_ALIGN			:= 512
22
23ifeq ($(NEED_BL32),yes)
24$(eval $(call add_define,UNIPHIER_LOAD_BL32))
25endif
26
27# Libraries
28include lib/xlat_tables_v2/xlat_tables.mk
29
30PLAT_PATH		:=	plat/socionext/uniphier
31PLAT_INCLUDES		:=	-I$(PLAT_PATH)/include
32
33# common sources for BL2, BL31 (and BL32 if SPD=tspd)
34PLAT_BL_COMMON_SOURCES	+=	plat/common/aarch64/crash_console_helpers.S \
35				$(PLAT_PATH)/uniphier_console.S		\
36				$(PLAT_PATH)/uniphier_console_setup.c	\
37				$(PLAT_PATH)/uniphier_helpers.S		\
38				$(PLAT_PATH)/uniphier_soc_info.c	\
39				$(PLAT_PATH)/uniphier_xlat_setup.c	\
40				${XLAT_TABLES_LIB_SRCS}
41
42BL2_SOURCES		+=	common/desc_image_load.c		\
43				drivers/io/io_block.c			\
44				drivers/io/io_fip.c			\
45				drivers/io/io_memmap.c			\
46				drivers/io/io_storage.c			\
47				lib/cpus/aarch64/cortex_a53.S		\
48				lib/cpus/aarch64/cortex_a72.S		\
49				$(PLAT_PATH)/uniphier_bl2_setup.c	\
50				$(PLAT_PATH)/uniphier_boot_device.c	\
51				$(PLAT_PATH)/uniphier_emmc.c		\
52				$(PLAT_PATH)/uniphier_image_desc.c	\
53				$(PLAT_PATH)/uniphier_io_storage.c	\
54				$(PLAT_PATH)/uniphier_nand.c		\
55				$(PLAT_PATH)/uniphier_scp.c		\
56				$(PLAT_PATH)/uniphier_usb.c
57
58BL31_SOURCES		+=	drivers/arm/cci/cci.c			\
59				drivers/arm/gic/common/gic_common.c	\
60				drivers/arm/gic/v3/gicv3_helpers.c	\
61				drivers/arm/gic/v3/gicv3_main.c		\
62				lib/cpus/aarch64/cortex_a53.S		\
63				lib/cpus/aarch64/cortex_a72.S		\
64				plat/common/plat_gicv3.c		\
65				plat/common/plat_psci_common.c		\
66				$(PLAT_PATH)/uniphier_bl31_setup.c	\
67				$(PLAT_PATH)/uniphier_boot_device.c	\
68				$(PLAT_PATH)/uniphier_cci.c		\
69				$(PLAT_PATH)/uniphier_gicv3.c		\
70				$(PLAT_PATH)/uniphier_psci.c		\
71				$(PLAT_PATH)/uniphier_scp.c		\
72				$(PLAT_PATH)/uniphier_smp.S		\
73				$(PLAT_PATH)/uniphier_syscnt.c		\
74				$(PLAT_PATH)/uniphier_topology.c
75
76ifeq (${TRUSTED_BOARD_BOOT},1)
77
78include drivers/auth/mbedtls/mbedtls_crypto.mk
79include drivers/auth/mbedtls/mbedtls_x509.mk
80
81BL2_SOURCES		+=	drivers/auth/auth_mod.c			\
82				drivers/auth/crypto_mod.c		\
83				drivers/auth/img_parser_mod.c		\
84				drivers/auth/tbbr/tbbr_cot.c		\
85				plat/common/tbbr/plat_tbbr.c		\
86				$(PLAT_PATH)/uniphier_rotpk.S		\
87				$(PLAT_PATH)/uniphier_tbbr.c
88
89ROT_KEY			= $(BUILD_PLAT)/rot_key.pem
90ROTPK_HASH		= $(BUILD_PLAT)/rotpk_sha256.bin
91
92$(eval $(call add_define_val,ROTPK_HASH,'"$(ROTPK_HASH)"'))
93$(BUILD_PLAT)/bl2/uniphier_rotpk.o: $(ROTPK_HASH)
94
95certificates: $(ROT_KEY)
96$(ROT_KEY): | $(BUILD_PLAT)
97	@echo "  OPENSSL $@"
98	$(Q)openssl genrsa 2048 > $@ 2>/dev/null
99
100$(ROTPK_HASH): $(ROT_KEY)
101	@echo "  OPENSSL $@"
102	$(Q)openssl rsa -in $< -pubout -outform DER 2>/dev/null |\
103	openssl dgst -sha256 -binary > $@ 2>/dev/null
104
105endif
106
107ifeq (${FIP_GZIP},1)
108
109include lib/zlib/zlib.mk
110
111BL2_SOURCES		+=	common/image_decompress.c		\
112				$(ZLIB_SOURCES)
113
114$(eval $(call add_define,UNIPHIER_DECOMPRESS_GZIP))
115
116# compress all images loaded by BL2
117SCP_BL2_PRE_TOOL_FILTER	:= GZIP
118BL31_PRE_TOOL_FILTER	:= GZIP
119BL32_PRE_TOOL_FILTER	:= GZIP
120BL33_PRE_TOOL_FILTER	:= GZIP
121
122endif
123
124.PHONY: bl2_gzip
125bl2_gzip: $(BUILD_PLAT)/bl2.bin.gz
126%.gz: %
127	@echo "  GZIP    $@"
128	$(Q)gzip -n -f -9 $< --stdout > $@
129