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/OK3568_Linux_fs/kernel/drivers/clk/qcom/
H A Ddispcc-sm8250.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2018-2020, The Linux Foundation. All rights reserved.
6 #include <linux/clk-provider.h>
10 #include <linux/reset-controller.h>
12 #include <dt-bindings/clock/qcom,dispcc-sm8250.h>
14 #include "clk-alpha-pll.h"
15 #include "clk-branch.h"
16 #include "clk-rcg.h"
17 #include "clk-regmap-divider.h"
72 .clkr.hw.init = &disp_cc_pll0_init
[all …]
H A Dmmcc-msm8960.c1 // SPDX-License-Identifier: GPL-2.0-only
15 #include <linux/clk-provider.h>
17 #include <linux/reset-controller.h>
19 #include <dt-bindings/clock/qcom,mmcc-msm8960.h>
20 #include <dt-bindings/reset/qcom,mmcc-msm8960.h>
23 #include "clk-regmap.h"
24 #include "clk-pll.h"
25 #include "clk-rcg.h"
26 #include "clk-branch.h"
116 .clkr.hw.init = &(struct clk_init_data){
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H A Dmmcc-msm8998.c1 // SPDX-License-Identifier: GPL-2.0
13 #include <linux/clk-provider.h>
15 #include <linux/reset-controller.h>
17 #include <dt-bindings/clock/qcom,mmcc-msm8998.h>
20 #include "clk-regmap.h"
21 #include "clk-regmap-divider.h"
22 #include "clk-alpha-pll.h"
23 #include "clk-rcg.h"
24 #include "clk-branch.h"
75 .clkr = {
[all …]
H A Dgcc-sc7180.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2019-2020, The Linux Foundation. All rights reserved.
6 #include <linux/clk-provider.h>
14 #include <dt-bindings/clock/qcom,gcc-sc7180.h>
16 #include "clk-alpha-pll.h"
17 #include "clk-branch.h"
18 #include "clk-rcg.h"
19 #include "clk-regmap.h"
39 .clkr = {
66 .clkr.hw.init = &(struct clk_init_data){
[all …]
H A Dgcc-sm8250.c1 // SPDX-License-Identifier: GPL-2.0-only
6 #include <linux/clk-provider.h>
14 #include <dt-bindings/clock/qcom,gcc-sm8250.h>
16 #include "clk-alpha-pll.h"
17 #include "clk-branch.h"
18 #include "clk-rcg.h"
19 #include "clk-regmap.h"
20 #include "clk-regmap-divider.h"
39 .clkr = {
65 .clkr.hw.init = &(struct clk_init_data){
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H A Ddispcc-sc7180.c1 // SPDX-License-Identifier: GPL-2.0-only
6 #include <linux/clk-provider.h>
11 #include <dt-bindings/clock/qcom,dispcc-sc7180.h>
13 #include "clk-alpha-pll.h"
14 #include "clk-branch.h"
15 #include "clk-rcg.h"
16 #include "clk-regmap-divider.h"
42 .clkr = {
66 .clkr.hw.init = &(struct clk_init_data){
69 .hw = &disp_cc_pll0.clkr.hw,
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H A Dgcc-msm8960.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
13 #include <linux/clk-provider.h>
15 #include <linux/reset-controller.h>
17 #include <dt-bindings/clock/qcom,gcc-msm8960.h>
18 #include <dt-bindings/reset/qcom,gcc-msm8960.h>
21 #include "clk-regmap.h"
22 #include "clk-pll.h"
23 #include "clk-rcg.h"
24 #include "clk-branch.h"
[all …]
H A Dgcc-msm8974.c1 // SPDX-License-Identifier: GPL-2.0-only
13 #include <linux/clk-provider.h>
15 #include <linux/reset-controller.h>
17 #include <dt-bindings/clock/qcom,gcc-msm8974.h>
18 #include <dt-bindings/reset/qcom,gcc-msm8974.h>
21 #include "clk-regmap.h"
22 #include "clk-pll.h"
23 #include "clk-rcg.h"
24 #include "clk-branch.h"
65 .clkr.hw.init = &(struct clk_init_data){
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H A Dgcc-ipq6018.c1 // SPDX-License-Identifier: GPL-2.0
12 #include <linux/clk-provider.h>
15 #include <linux/reset-controller.h>
16 #include <dt-bindings/clock/qcom,gcc-ipq6018.h>
17 #include <dt-bindings/reset/qcom,gcc-ipq6018.h>
20 #include "clk-regmap.h"
21 #include "clk-pll.h"
22 #include "clk-rcg.h"
23 #include "clk-branch.h"
24 #include "clk-alpha-pll.h"
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H A Dgcc-msm8994.c1 // SPDX-License-Identifier: GPL-2.0-only
2 /* Copyright (c) 2013-2016, The Linux Foundation. All rights reserved.
15 #include <dt-bindings/clock/qcom,gcc-msm8994.h>
18 #include "clk-regmap.h"
19 #include "clk-alpha-pll.h"
20 #include "clk-rcg.h"
21 #include "clk-branch.h"
68 .clkr = {
84 .clkr.hw.init = &(struct clk_init_data)
96 .clkr = {
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H A Dgcc-sdm660.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2016-2017, The Linux Foundation. All rights reserved.
14 #include <linux/clk-provider.h>
16 #include <linux/reset-controller.h>
18 #include <dt-bindings/clock/qcom,gcc-sdm660.h>
21 #include "clk-regmap.h"
22 #include "clk-alpha-pll.h"
23 #include "clk-rcg.h"
24 #include "clk-branch.h"
28 #define F(f, s, h, m, n) { (f), (s), (2 * (h) - 1), (m), (n) }
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H A Dgcc-sm8150.c1 // SPDX-License-Identifier: GPL-2.0
2 // Copyright (c) 2017-2019, The Linux Foundation. All rights reserved.
11 #include <linux/clk-provider.h>
13 #include <linux/reset-controller.h>
15 #include <dt-bindings/clock/qcom,gcc-sm8150.h>
18 #include "clk-alpha-pll.h"
19 #include "clk-branch.h"
20 #include "clk-pll.h"
21 #include "clk-rcg.h"
22 #include "clk-regmap.h"
[all …]
H A Dgcc-ipq4019.c1 // SPDX-License-Identifier: GPL-2.0-only
12 #include <linux/clk-provider.h>
14 #include <linux/reset-controller.h>
19 #include <dt-bindings/clock/qcom,gcc-ipq4019.h>
22 #include "clk-regmap.h"
23 #include "clk-rcg.h"
24 #include "clk-branch.h"
26 #include "clk-regmap-divider.h"
29 struct clk_regmap_div, clkr)
46 * struct clk_fepll_vco - vco feedback divider corresponds for FEPLL clocks
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H A Dmmcc-apq8084.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2014-2015, The Linux Foundation. All rights reserved.
10 #include <linux/reset-controller.h>
12 #include <dt-bindings/clock/qcom,mmcc-apq8084.h>
13 #include <dt-bindings/reset/qcom,mmcc-apq8084.h>
16 #include "clk-regmap.h"
17 #include "clk-pll.h"
18 #include "clk-rcg.h"
19 #include "clk-branch.h"
222 .clkr.hw.init = &(struct clk_init_data){
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H A Dgcc-msm8998.c1 // SPDX-License-Identifier: GPL-2.0
13 #include <linux/clk-provider.h>
15 #include <linux/reset-controller.h>
17 #include <dt-bindings/clock/qcom,gcc-msm8998.h>
20 #include "clk-regmap.h"
21 #include "clk-alpha-pll.h"
22 #include "clk-pll.h"
23 #include "clk-rcg.h"
24 #include "clk-branch.h"
141 .clkr = {
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H A Dgcc-apq8084.c1 // SPDX-License-Identifier: GPL-2.0-only
13 #include <linux/clk-provider.h>
15 #include <linux/reset-controller.h>
17 #include <dt-bindings/clock/qcom,gcc-apq8084.h>
18 #include <dt-bindings/reset/qcom,gcc-apq8084.h>
21 #include "clk-regmap.h"
22 #include "clk-pll.h"
23 #include "clk-rcg.h"
24 #include "clk-branch.h"
109 .clkr.hw.init = &(struct clk_init_data){
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H A Dmmcc-msm8974.c1 // SPDX-License-Identifier: GPL-2.0-only
13 #include <linux/clk-provider.h>
15 #include <linux/reset-controller.h>
17 #include <dt-bindings/clock/qcom,mmcc-msm8974.h>
18 #include <dt-bindings/reset/qcom,mmcc-msm8974.h>
21 #include "clk-regmap.h"
22 #include "clk-pll.h"
23 #include "clk-rcg.h"
24 #include "clk-branch.h"
187 .clkr.hw.init = &(struct clk_init_data){
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H A Dgcc-sdm845.c1 // SPDX-License-Identifier: GPL-2.0
13 #include <linux/clk-provider.h>
15 #include <linux/reset-controller.h>
17 #include <dt-bindings/clock/qcom,gcc-sdm845.h>
20 #include "clk-regmap.h"
21 #include "clk-pll.h"
22 #include "clk-rcg.h"
23 #include "clk-branch.h"
24 #include "clk-alpha-pll.h"
156 .clkr = {
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H A Dcamcc-sdm845.c1 // SPDX-License-Identifier: GPL-2.0
6 #include <linux/clk-provider.h>
11 #include <dt-bindings/clock/qcom,camcc-sdm845.h>
14 #include "clk-alpha-pll.h"
15 #include "clk-branch.h"
16 #include "clk-rcg.h"
17 #include "clk-regmap.h"
50 .clkr = {
73 .clkr.hw.init = &(struct clk_init_data){
84 .clkr = {
[all …]
H A Dmmcc-msm8996.c1 // SPDX-License-Identifier: GPL-2.0-only
13 #include <linux/clk-provider.h>
15 #include <linux/reset-controller.h>
18 #include <dt-bindings/clock/qcom,mmcc-msm8996.h>
21 #include "clk-regmap.h"
22 #include "clk-regmap-divider.h"
23 #include "clk-alpha-pll.h"
24 #include "clk-rcg.h"
25 #include "clk-branch.h"
263 .clkr = {
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H A Dgcc-msm8939.c1 // SPDX-License-Identifier: GPL-2.0-only
13 #include <linux/clk-provider.h>
15 #include <linux/reset-controller.h>
17 #include <dt-bindings/clock/qcom,gcc-msm8939.h>
18 #include <dt-bindings/reset/qcom,gcc-msm8939.h>
21 #include "clk-regmap.h"
22 #include "clk-pll.h"
23 #include "clk-rcg.h"
24 #include "clk-branch.h"
61 .clkr.hw.init = &(struct clk_init_data){
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H A Dgcc-qcs404.c1 // SPDX-License-Identifier: GPL-2.0
10 #include <linux/clk-provider.h>
12 #include <linux/reset-controller.h>
14 #include <dt-bindings/clock/qcom,gcc-qcs404.h>
16 #include "clk-alpha-pll.h"
17 #include "clk-branch.h"
18 #include "clk-pll.h"
19 #include "clk-rcg.h"
20 #include "clk-regmap.h"
282 .parent_names = (const char *[]){ "xo-board" },
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H A Dgcc-mdm9615.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (c) 2013-2014, The Linux Foundation. All rights reserved.
15 #include <linux/clk-provider.h>
17 #include <linux/reset-controller.h>
19 #include <dt-bindings/clock/qcom,gcc-mdm9615.h>
20 #include <dt-bindings/reset/qcom,gcc-mdm9615.h>
23 #include "clk-regmap.h"
24 #include "clk-pll.h"
25 #include "clk-rcg.h"
26 #include "clk-branch.h"
[all …]
H A Ddispcc-sdm845.c1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (c) 2018-2019, The Linux Foundation. All rights reserved.
7 #include <linux/clk-provider.h>
11 #include <linux/reset-controller.h>
13 #include <dt-bindings/clock/qcom,dispcc-sdm845.h>
15 #include "clk-alpha-pll.h"
16 #include "clk-branch.h"
17 #include "clk-rcg.h"
18 #include "clk-regmap-divider.h"
108 .clkr = {
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H A Dgcc-ipq8074.c1 // SPDX-License-Identifier: GPL-2.0-only
12 #include <linux/clk-provider.h>
15 #include <dt-bindings/clock/qcom,gcc-ipq8074.h>
18 #include "clk-regmap.h"
19 #include "clk-pll.h"
20 #include "clk-rcg.h"
21 #include "clk-branch.h"
22 #include "clk-alpha-pll.h"
23 #include "clk-regmap-divider.h"
24 #include "clk-regmap-mux.h"
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